SD5000I-2 Vishay Siliconix N-Channel Lateral DMOS FETs (Available Only In Extended Hi-Rel Flow) PRODUCT SUMMARY V(BR)DS Min (V) VGS(th) Max (V) rDS(on) Max (W) Crss Max (pF) tON Max (ns) 20 1.5 70 @ VGS = 5 V 0.5 2 FEATURES BENEFITS APPLICATIONS D D D D D D D High-Speed System Performance D Low Insertion Loss at High Frequencies D Low Transfer Signal Loss D Simple Driver Requirement D Single Supply Operation D D D D D D D Quad SPST Switch with Zener Input Protection Low Interelectrode Capacitance and Leakage Ultra-High Speed Switching--tON: 1 ns Ultra-Low Reverse Capacitance: 0.2 pF Low Guaranteed rDS @ 5 V Low Turn-On Threshold Voltage Fast Analog Switch Fast Sample-and-Holds Pixel-Rate Switching Video Switch Multiplexer DAC Deglitchers High-Speed Driver DESCRIPTION The SD5000I-2 monolithic switch features four individual double-diffused enhancement-mode MOSFETs built on a common substrate. This bidirectional device provides low on-resistance and low interelectrode capacitances to minimize insertion loss and crosstalk. Built on Vishay Siliconix' proprietary DMOS process, the SD5000I-2 utilizes lateral construction to achieve low capacitance and ultra-fast switching speeds. For manufacturing reliability, these devices feature poly-silicon gates protected by Zener diodes. The SD5000I is available only in the "-2" extended hi-rel flow. The Vishay Siliconix "-2" flow complies with the requirements of MIL-PRF-19500 for JANTX discrete devices. Dual-In-Line Sidebraze S2 1 14 S1 SUBSTRATE 2 13 NC G2 3 12 G1 D2 4 11 D1 D3 5 10 D4 G3 6 9 G4 S3 7 8 S4 Top View Applications Information--See Applications Note AN502 Document Number: 70296 S-02889--Rev. J, 21-Dec-00 www.vishay.com 1 SD5000I-2 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED) Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . +30 V/-25 V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150_C Gate-Substrate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +30 V/-0.3 V Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C Drain-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Power Dissipationa, b: Drain-Source-Substrate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Lead Temperature (1/16" from case for 10 seconds) . . . . . . . . . . . . . . 300_C (Package) . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW (Each Device) . . . . . . . . . . . . . . . . . . . . . . . 300 mW Notes: a. Derate 4 mW/_C above 25_C SPECIFICATIONSa Limits Parameter Symbolb Test Conditionsb Min Typc Max Unit Static Drain-Source Breakdown Voltage V(BR)DS VGS = VBS = -5 V, ID = 10 nA 20 30 Source-Drain Breakdown Voltage V(BR)SD VGD = VBD = -5 V, IS = 10 nA 20 22 Drain-Substrate Breakdown Voltage V(BR)DBO VGB = 0 V, ID = 10 nA, Source Open 25 35 Source-Substrate Breakdown Voltage V(BR)SBO VGB = 0 V, IS = 10 mA, Drain Open 25 35 Drain-Source Leakage Source-Drain Leakage IDS(off) ISD(off) VGS = VBS = -5 V VGD = VBD = -5 V VDS = 10 V 0.4 VDS = 15 V 0.7 VDS = 20 V 0.9 VSD = 10 V 0.5 VSD = 15 V 0.8 VSD = 20 V Gate Leakage Threshold Voltage Drain-Source On-Resistance Resistance Match IGBS VDB = VSB = 0 V, VGB = 30V VGS(th) VDS = VGS , ID = 1 mA, VSB = 0 V rDS(on) VSB = 0 V ID = 1 mA DrDS(on) 0.1 V 10 nA 1 10 0.01 100 0.8 1.5 VGS = 5 V 58 70 VGS = 10 V 38 VGS = 15 V 30 VGS = 20 V 26 VGS = 5 V 1 V W 5 Dynamic Forward Transconductance gfs Gate-Node Capacitance C(GS+GD+GB) Drain-Node Capacitance C(GD+DB) Source-Node Capacitance C(GS+SB) Reverse Transfer Capacitance VDS = 10 V, VSB = 0 V, ID = 20 mA, f = 1 kHz 12 mS 2.5 3.5 VDS = 10 V, f = 1 MHz VGS = VBS = -15 V 2.0 3 3.7 5 0.2 0.5 f= 3 kHz -107 crss Crosstalk 10 pF dB Switching Turn-On Time Turn-Off Time td(on) 0.5 1 tr 0.6 1 td(off) VSB = 5 V, VIN 0 to 5 V, RG = 25 W VDD = 5 V, RL = 680 W tf Notes: a. TA = 25_C unless otherwise noted. b. B is is the body (substrate) and V(BR) is breakdown. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. www.vishay.com 2 2 ns 6 DMCA Document Number: 70296 S-02889--Rev. J, 21-Dec-00 SD5000I-2 Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Leakage Current vs. Applied Voltage On-Resistance vs. Gate-Source Voltage 10 nA ID (off) @ VGS = VBG = -5 V IS(off) @ VGD = VBD = -5V ISBO @ VGB = 0 V, Drain Open 1 nA VGS = 4 V 240 ID(off) Leakage r DS(on) - On-Resistance ( W ) 300 180 120 IS(off) 100 pA ISBO 5V 10 pA 60 10 V IGSS (Diode) 1 pA 0 0 4 8 12 16 0 20 4 8 20 20 100 VDS = 15 V VBS = 0 V g fs - Forward Transconductance (mS) ID = 5 mA, VBS = 0 V r DS(on) - On-Resistance ( W ) 16 Common-Source Forward Transconductance vs. Drain Current On-Resistance vs. Temperature 80 VGS = 5 V 60 10 V 15 V 40 20 V 20 0 16 TA = 55_C 12 25_C 8 125_C 4 0 -60 -20 20 60 100 1 140 10 100 ID - Drain Current (mA) TA - Temperature (_C) Threshold Voltage vs. Substrate-Source Voltage Leakage Current vs. Temperature 100 5 ID(off) @ VGS = VBS = -5 V, VDS = 10 V IS(off) @ VGD = VBD = -5 V, VSD = 10 V VGS = VDS = VTH ID = 1 mA TA = 25_C 4 IGSS @ VGS = 10 V ISBO @ VSB = 10 V Drain Open 3 Leakage (nA) V GS(th)- Gate-Source Threshold Voltage (V) 12 Applied Voltage (V) VSB - Source-Substrate Breakdown Voltage (V) H 2 IS(off) ID(off) 10 L ISBO IGSS (Diode) 1 0 1 0 -4 -8 -12 VBS - Body-Source Voltage (V) Document Number: 70296 S-02889--Rev. J, 21-Dec-00 -16 -20 25 50 75 100 125 TA - Temperature (_C) www.vishay.com 3 SD5000I-2 Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Capacitance vs. Gate-Source Voltage 100 mA 10 VDS = 10 V, f = 1 MHz VGS = VBS 10 mA ID = 13 mA 8 1 mA I B - Body Leakage Capacitance (pF) Body Leakage Current vs. Drain-Body Voltage 6 C(GS+SB) 4 C(GS+GD+GB) 2 100 nA 10 nA 1 nA 1 mA 100 pA C(GD+DB) 10 pA C(DG) 1 pA 0 0 8 4 12 16 0 20 4 8 12 16 20 VBS - Body-Source Voltage (V) VGS - Gate-Source Voltage (V) Input Admittance Forward Admittance 100 100 VDS = 10 V ID = 10 mA TA = 25_C VDS = 10 V ID = 10 mA TA = 25_C gfs 10 (mS) (mS) 10 bis 1 1 -bfs gis 0.1 0.1 200 100 500 100 1000 f - Frequency (MHz) 200 500 1000 f - Frequency (MHz) Reverse Admittance Output Admittance 1 100 VDS = 10 V ID = 10 mA TA = 25_C VDS = 10 V ID = 10 mA TA = 25_C brs (mS) 10 (mS) 0.1 +grg bog -grg 0.01 1 gog 0.001 0.1 100 200 500 f - Frequency (MHz) www.vishay.com 4 1000 100 200 500 1000 f - Frequency (MHz) Document Number: 70296 S-02889--Rev. J, 21-Dec-00 SD5000I-2 Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Switching Characteristics Output Characteristics 50 700 VBS = 0 V TA = 25_C 600 40 I D - Drain Current (mA) RL (W) 500 400 300 200 VGS = 5 V 30 4V 20 3V 10 100 2V 0 0 0 1 2 5 6 7 0 12 16 20 VDS - Drain-Source Voltage (V) tf - Fall Time (ns) Output Conductance vs. Drain Current Threshold Voltage vs. Temperature 1.0 V GS(th) - Gate-Source Threshold Voltage (V) 5 VBS = 0 V f = 1 kHz gos - Output Conductance (mS) 8 4 0.8 VDS = 5 V 0.6 10 V 0.4 15 V 0.2 0 0 4 8 12 16 20 VGS = VDS = VTH ID = 1 mA 4 3 VBS = -10 V -5 V 2 -0.5 V -1 V 1 0V 0 -60 -20 ID - Drain Current (mA) 20 60 100 140 TA - Temperature (_C) SWITCHING TIME TEST CIRCUIT To Scope +VDD +5 V 510 W RL VIN VOUT To Scope Input pulse: td, tr < 1 ns Pulse width: 100 ns Rep rate: 1 MHz VIN Sampling Scope 51 W Document Number: 70296 S-02889--Rev. J, 21-Dec-00 tr < 360 ps RIN = 1 MW CIN = 2 pF BW = 500 MHz 50% 0V td(off) td(on) +VDD 90% VOUT 50% 10% 0V tr tf www.vishay.com 5