LM73CIMK-0/NOPB - NATIONAL SEMICONDUCTOR

LM73

SMBDAT

SMBCLK

ADDR 1

VDD = 2.7V to 5.5V

Typical bypass 0.1 PF

To hardware

shutdown

To / from processor

2-wire interface

Address (set as desired for one

of three addresses)

ALERT

Product

Folder

Sample &

Buy

Technical

Documents

Tools &

Software

Support &

Community

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

LM73 2.7-V, SOT-23, 11- to 14-Bit Digital Temperature Sensor With 2-Wire Interface

1 Features 3 Description

The LM73 is an integrated, digital-output temperature

1• Single Address Pin Offers Choice of Three sensor featuring an incremental Delta-Sigma ADC

Selectable Addresses Per Version for a Total of with a two-wire interface that is compatible with the

Six Possible Addresses. SMBus and I2C interfaces. The host can query the

• SMBus and I2C-compatible Two-Wire Interface LM73 at any time to read temperature.

• Supports 400-Khz Operation Available in a 6-pin SOT package, the LM73 occupies

• Shutdown Mode With One-shot Feature Available very little board area while operating over a wide

for Very Low Average Power Consumption temperature range (–40°C to 150°C) and providing

±1°C accuracy from –10°C to 80°C. The user can

• Programmable Digital Temperature Resolution optimize between the conversion time and the

From 11 Bits to 14 Bits sensitivity of the LM73 by programming it to report

• Fast Conversion Rate Ideal for Quick Power Up temperature in any of four different resolutions.

and Measuring Rapidly Changing Temperature Defaulting to 11-bit mode (0.25°C/LSB), the LM73

• Open-Drain ALERT Output Pin Goes Active When measures temperature in a maximum time of 14 ms,

making it ideal for applications that require

Temperature is Above a Programmed temperature data very soon after power-up. In its

Temperature Limit maximum resolution, 14-bit mode (0.03125°C/LSB),

• Very Stable, Low-noise Digital Output the LM73 is optimized to sense very small changes in

• UL Recognized Component temperature.

•Key Specifications A single multi-level address line selects one of three

– Supply Current unique device addresses. An open-drain ALERT

output goes active when the temperature exceeds a

– Operating programmable limit. Both the data and clock lines are

– 320 µA (Typical) filtered for excellent noise tolerance and reliable

– 495 µA (Maximum) communication. Additionally, a time-out feature on the

– Shutdown clock and data lines causes the LM73 to

automatically reset these lines if either is held low for

– 8 µA (Maximum) an extended time, thus exiting any bus lock-up

– 1.9 µA (Typical) condition without processor intervention.

– Temperature Accuracy Device Information(1)

–−10°C to 80°C: ±1.0°C (Maximum) PART NUMBER PACKAGE BODY SIZE (NOM)

–−25°C to 115°C: ±1.5°C (Maximum) LM73 SOT (6) 2.90 mm × 1.60 mm

–−40°C to 150°C: ±2°C (Maximum) (1) For all available packages, see the orderable addendum at

– Resolution the end of the datasheet.

– 0.25°C to 0.03125°C Typical Application

– Conversion Time

– 11-Bit (0.25°C): 14 ms (Maximum)

– 14-Bit (0.03125°C): 112 ms (Maximum)

2 Applications

• Portable Electronics

• Notebook Computers

• Automotive

• System Thermal Management

• Office Electronics

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

Table of Contents

7.2 Functional Block Diagram......................................... 9

1 Features.................................................................. 17.3 Feature Description................................................... 9

2 Applications ........................................................... 17.4 Device Functional Modes........................................ 15

3 Description............................................................. 17.5 Register Map........................................................... 16

4 Revision History..................................................... 28 Application and Implementation ........................ 20

5 Pin Configuration and Functions......................... 38.1 Application Information............................................ 20

6 Specifications......................................................... 48.2 Typical Application ................................................. 20

6.1 Absolute Maximum Ratings ...................................... 49 Power Supply Recommendations...................... 22

6.2 ESD Ratings ............................................................ 410 Layout................................................................... 22

6.3 Recommended Operating Conditions....................... 410.1 Layout Guidelines ................................................. 22

6.4 Thermal Information.................................................. 410.2 Layout Example .................................................... 22

6.5 Temperature-to-Digital Converter Characteristics..... 511 Device and Documentation Support................. 23

6.6 Logic Electrical Characteristics- Digital DC

Characteristics ........................................................... 611.1 Community Resources.......................................... 23

6.7 Logic Electrical Characteristics- SMBus Digital 11.2 Trademarks........................................................... 23

Switching Characteristics........................................... 711.3 Electrostatic Discharge Caution............................ 23

6.8 Typical Characteristics.............................................. 811.4 Glossary................................................................ 23

7 Detailed Description.............................................. 912 Mechanical, Packaging, and Orderable

7.1 Overview................................................................... 9Information........................................................... 23

4 Revision History

Changes from Revision E (January 2015) to Revision F Page

• Changed Temperature Accuracy spec typo on the front page............................................................................................... 1

Changes from Revision D (May 2009) to Revision E Page

• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional

Modes,Application and Implementation section, Power Supply Recommendations section, Layout section, Device

and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1

Product Folder Links: LM73

Snap

Back

GND

Snap

Back

GND

VDD

125 D2

Snap

Back

GND

Snap

Back

GND

VDD

2.5k D2

ADDR

SMBCLK

LM73

GND

SMBDAT

VDD

ALERT

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

5 Pin Configuration and Functions

SOT-23

6 PINS

TOP VIEW

Pin Functions

PIN TYPE EQUIVALENT CIRCUIT FUNCTION

NO. NAME

CMOS

Logic Address Select Input: One of three device addresses is selected by

1 ADDR Input connecting to ground, left floating, or connecting to VDD.

(three

levels)

2 GND Ground Ground

3 VDD Power Supply Voltage

CMOS Serial Clock: SMBus clock signal. Operates up to 400 kHz. Low-pass

4 SMBCLK Logic filtered.

Input

Open- Digital output which goes active whenever the measured temperature

5 ALERT Drain exceeds a programmable temperature limit.

Output

Open-

Drain Serial Data: SMBus bi-directional data signal used to transfer serial

6 SMBDAT Input/Outp data synchronous to the SMBCLK. Low-pass filtered.

Product Folder Links: LM73

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)

MIN NOM MAX UNIT

Supply Voltage −0.3 V to 6 V

Voltage at SMBCLK and SMBDAT pins −0.3 V to V 6 V

Voltage at All Other Pins −0.3 (VDD + 0.5) 6 V

Input Current at Any Pin(3) ±5 mA

Storage Temperature, Tstg −65 150 °C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Soldering process must comply with Texas Instruments' Reflow Temperature Profile specifications. Refer to www.ti.com/packaging..

Reflow temperature profiles are different for lead-free and non-lead-free packages.

(3) When the input voltage (VI) at any pin exceeds the power supplies (VI< GND or VI> VDD), the current at that pin should be limited to 5

mA.

6.2 ESD Ratings VALUE UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000

V(ESD) Electrostatic discharge V

Machine Model ±200

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT

LM73CIMK-0, LM73CIMK-1 –40 150 °C

Supply Voltage Range (VDD) 2.7 5.5 V

6.4 Thermal Information LM73

THERMAL METRIC(1) DDC (SOT) UNIT

6 PINS

RθJA Junction-to-ambient thermal resistance 224 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 89

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

Product Folder Links: LM73

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

6.5 Temperature-to-Digital Converter Characteristics

Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V. All limits TA= TJ= 25°C, unless otherwise noted.

TAis the ambient temperature. TJis the junction temperature.

PARAMETER TEST CONDITIONS MIN TYP MAX(1) UNIT

TA=−10°C to 80°C TA= TJ=TMIN to TMAX ±1 °C

VDD = 2.7V

to TA=−25°C to 115°C TA= TJ=TMIN to TMAX ±1.5 °C

VDD = 4.5V TA=−40°C to 150°C TA= TJ=TMIN to TMAX ±2 °C

Accuracy (2) TA=−10°C to 80°C TA= TJ=TMIN to TMAX ±1.5 °C

VDD > 4.5V

to TA=−25°C to 115°C TA= TJ=TMIN to TMAX ±2 °C

VDD = 5.5V TA=−40°C to 150°C TA= TJ=TMIN to TMAX ±2.5 °C

11 Bits

RES1 Bit = 0, RES0 Bit = 0 0.25 °C/LSB

12 Bits

RES1 Bit = 0, RES0 Bit = 1 0.125 °C/LSB

Resolution 13 Bits

RES1 Bit = 1, RES0 Bit = 0 0.0625 °C/LSB

14 Bits

RES1 Bit = 1, RES0 Bit = 1 0.03125 °C/LSB

10.1

RES1 Bit = 0, RES0 Bit = 0 ms

TA= TJ=TMIN to TMAX 14

20.2

RES1 Bit = 0, RES0 Bit = 1 ms

TA= TJ=TMIN to TMAX 28

Temperature

Conversion Time (3) 40.4

RES1 Bit = 1, RES0 Bit = 0 ms

TA= TJ=TMIN to TMAX 56

80.8

RES1 Bit = 1, RES0 Bit = 1 ms

TA= TJ=TMIN to TMAX 112

320

Continuous Conversion Mode, µA

SMBus inactive TA= TJ=TMIN to TMAX 495

120

Quiescent Current Shutdown, bus-idle timers on µA

TA= TJ=TMIN to TMAX 175

1.9

Shutdown, bus-idle timers off µA

TA= TJ=TMIN to TMAX 8

Power-On Reset Measured on VDD input, falling edge TA= TJ=TMIN to TMAX 0.9 V

Threshold

(1) Limits are specified to AOQL (Average Outgoing Quality Level).

(2) Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the

internal power dissipation of the LM73 and the thermal resistance.

(3) This specification is provided only to indicate how often temperature data is updated. The LM73 can be read at any time without regard

to conversion state (and will yield last conversion result).

Product Folder Links: LM73

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

6.6 Logic Electrical Characteristics- Digital DC Characteristics

Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V. All limits TA= TJ= 25°C, unless otherwise noted.

TAis the ambient temperature. TJis the junction temperature.

PARAMETER TEST CONDITIONS MIN TYP(1) MAX(2) UNIT

SMBDAT, SMBCLK INPUTS

Logical 1 Input

VIH TA= TJ=TMIN to TMAX 0.7 × VDD V

Voltage

Logical 0 Input

VIL TA= TJ=TMIN to TMAX 0.3 × VDD V

Voltage

SMBDAT and

VIN;HYST SMBCLK Digital 0.07 × VDD V

Input Hysteresis 0.01

Logical 1 Input

IIH VIN = VDD µA

Current TA= TJ=TMIN to TMAX 2

–0.01

Logical 0 Input

IIL VIN = 0 V µA

Current TA= TJ=TMIN to TMAX –2

CIN Input Capacitance 5 pF

SMBDAT, ALERT OUTPUTS

0.01

High Level Output

IOH VOH = VDD µA

Current TA= TJ=TMIN to TMAX 2

SMBus Low Level TA= TJ=TMIN to TMAX

VOL IOL = 3 mA 0.4 V

Output Voltage

ADDRESS INPUT

VIH;ADD Address Pin High TA= TJ=TMIN to TMAX VDD – 0.100 V

RESS Input Voltage

VIL;ADDR Address Pin Low TA= TJ=TMIN to TMAX 0.100 V

ESS Input Voltage 0.01

IIH; Address Pin High VIN = VDD µA

ADDRESS Input Current TA= TJ=TMIN to TMAX 2

–0.01

IIL;ADDR Address Pin Low VIN = 0 V µA

ESS Input Current TA= TJ=TMIN to TMAX –2

(1) Typicals are at TA= 25°C and represent most likely parametric norm.

(2) Limits are specified to AOQL (Average Outgoing Quality Level).

Product Folder Links: LM73

VIH

VIL

SMBCLK

VIH

SMBDAT

tBUF tHD;STA

tLOW

tHD;DAT

tHIGH

tSU;DAT tSU;STA tSU;STO

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

6.7 Logic Electrical Characteristics- SMBus Digital Switching Characteristics

Unless otherwise noted, these specifications apply for VDD = 2.7 V to 5.5 V, CL(load capacitance) on output lines = 400 pF.

All limits TA= TJ= 25°C, unless otherwise noted. See Figure 1.

PARAMETER TEST CONDITIONS MIN TYP(1) MAX(2) UNIT

No minimum clock

frequency if Time-

fSMB SMBus Clock Frequency TA= TJ=TMIN to TMAX 400 kHz

Out feature is

disabled.

tLOW SMBus Clock Low Time TA= TJ=TMIN to TMAX 300 ns

tHIGH SMBus Clock High Time TA= TJ=TMIN to TMAX 300 ns

tF;SMB CL= 400 pF

Output Fall Time (3) TA= TJ=TMIN to TMAX 250 ns

OIPULL-UP ≤3 mA

SMBDAT and SMBCLK Time

tTIMEO Low for Reset of Serial Interface TA= TJ=TMIN to TMAX 15 45 ms

UT (4)

Data In Setup Time to SMBCLK

tSU;DAT TA= TJ=TMIN to TMAX 100 ns

High

tHD;DA Data Hold Time: Data In Stable TA= TJ=TMIN to TMAX 0 ns

TI after SMBCLK Low

tHD;DA Data Hold Time: Data Out Stable TA= TJ=TMIN to TMAX 30 ns

TO after SMBCLK Low

Start Condition SMBDAT Low to

SMBCLK Low (Start condition

tHD;STA TA= TJ=TMIN to TMAX 60 ns

hold before the first clock falling

edge)

Stop Condition SMBCLK High to

tSU;ST SMBDAT Low (Stop Condition TA= TJ=TMIN to TMAX 50 ns

OSetup)

SMBus Repeated Start-Condition

tSU;STA Setup Time, SMBCLK High to TA= TJ=TMIN to TMAX 50 ns

SMBDAT Low

SMBus Free Time Between Stop

tBUF TA= TJ=TMIN to TMAX 1.2 µs

and Start Conditions

tPOR Power-On Reset Time (5) TA= TJ=TMIN to TMAX 1 ms

(1) Typicals are at TA= 25°C and represent most likely parametric norm.

(2) Limits are specified to AOQL (Average Outgoing Quality Level).

(3) The output fall time is measured from (VIH;MIN + 0.15V) to (VIL;MAX - 0.15V).

(4) Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM73's SMBus state machine,

setting SMBDAT and SMBCLK pins to a high impedance state.

(5) Represents the time from VDD reaching the power-on-reset level to the LM73 communications being functional. After an additional time

equal to one temperature conversion time, valid temperature is available in the Temperature Data Register .

Figure 1. SMBus Communication

Product Folder Links: LM73

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

6.8 Typical Characteristics

Figure 2. Accuracy vs. Temperature Figure 3. Operating Current vs. Temperature

Figure 5. Typical Output Noise

Figure 4. Shutdown Current vs.Temperature

Product Folder Links: LM73

SMBDAT

SMBCLK

Temperature

Sensor

Circuitry

Configuration

Temperature

Two-Wire

Serial Interface

2.7V to 5.5V

LM73

Manufacturer's

ID Register

THIGH Register

TLOW Register

Pointer

and

Decode Logic

Set-Point

Comparator

ADDR

Control/Status

11-Bit to 14-Bit

Delta-Sigma

A/D Converter

GND

VDD

ALERT

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

7 Detailed Description

7.1 Overview

The LM73 is a digital temperature sensor that senses the temperature of its die using a sigma-delta analog-to-

digital converter and stores the temperature in the Temperature Register. The LM73's 2-wire serial interface is

compatible with SMBus 2.0 and I2C. Please see the SMBus 2.0 specification for a detailed description of the

differences between the I2C bus and SMBus.

The temperature resolution is programmable, allowing the host system to select the optimal configuration

between sensitivity and conversion time. The LM73 can be placed in shutdown to minimize power consumption

when temperature data is not required. While in shutdown, a 1-shot conversion mode allows system control of

the conversion rate for ultimate flexibility.

7.2 Functional Block Diagram

7.3 Feature Description

The LM73 features the following registers. See LM73 Registers for a complete list of the pointer address,

content, and reset state of each register.

• Pointer Register

Product Folder Links: LM73

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

Feature Description (continued)

• Temperature Register

• Configuration Register

• THIGH Register

• TLOW Register

• Control/Status Register

• Identification Register

7.3.1 Power-On Reset

The power-on reset (POR) state is the point at which the supply voltage rises above the power-on reset

threshold (specified in the Electrical Characteristics), generating an internal reset. Each of the registers contains

a defined value upon POR and this data remains there until any of the following occurs:

• The first temperature conversion is completed, causing the Temperature Register and various status bits to

be updated internally, depending on the value of the measured temperature.

• The master writes different data to any Read/Write (R/W) bits, or

• The LM73 is powered down.

7.3.2 One-Shot Conversion

The LM73 features a one-shot conversion bit, which is used to initiate a single conversion and comparison cycle

when the LM73 is in shutdown mode. While the LM73 is in shutdown mode, writing a 1 to the One-Shot bit in the

Configuration Register will cause the LM73 to perform a single temperature conversion and update the

Temperature Register and the affected status bits. Operating the LM73 in this one-shot mode allows for

extremely low average-power consumption, making it ideal for low-power applications.

When the One-Shot bit is set, the LM73 initiates a temperature conversion. After this initiation, but before the

completion of the conversion and resultant register updates, the LM73 is in a "one-shot" state. During this state,

the Data Available (DAV) flag in the Control/Status register is 0 and the Temperature Register contains the value

8000h (-256°C). All other registers contain the data that was present before initiating the one-shot conversion.

After the temperature measurement is complete, the DAV flag will be set to 1 and the temperature register will

contain the resultant measured temperature.

7.3.3 Temperature Data Format

The resolution of the temperature data and the size of the data word are user-selectable through bits RES1 and

RES0 in the Control/Status Register. By default, the LM73 temperature stores the measured temperature in an

11-bit (10 bits plus sign) word with one least significant bit (LSB) equal to 0.25°C. The maximum word size is 14

bits (13-bits plus sign) with a resolution of 0.03125 °C/LSB.

CONTROL BIT DATA FORMAT

RES1 RES0 WORD SIZE RESOLUTION

0 0 11 bits 0.25 °C/LSB

0 1 12 bits 0.125 °C/LSB

1 0 13 bits 0.0625 °C/LSB

1 1 14 bits 0.03125 °C/LSB

The temperature data is reported in 2's complement format. The word is stored in the 16-bit Temperature

Table 1. 11-Bit (10-Bit Plus Sign)

DIGITAL OUTPUT

TEMPERATURE BINARY HEX

150°C 0100 1011 0000 0000 4B00h

25°C 0000 1100 1000 0000 0C80h

1°C 0000 0000 1000 0000 0080h

0.25°C 0000 0000 0010 0000 0020h

Product Folder Links: LM73

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

Table 1. 11-Bit (10-Bit Plus Sign) (continued)

DIGITAL OUTPUT

TEMPERATURE BINARY HEX

0°C 0000 0000 0000 0000 0000h

−0.25°C 1111 1111 1110 0000 FFE0h

−1°C 1111 1111 1000 0000 FF80h

−25°C 1111 0011 1000 0000 F380h

−40°C 1110 1100 0000 0000 EC00h

Table 2. 12-Bit (11-Bit Plus Sign)

DIGITAL OUTPUT

TEMPERATURE BINARY HEX

150°C 0100 1011 0000 0000 4B00h

25°C 0000 1100 1000 0000 0C80h

1°C 0000 0000 1000 0000 0080h

0.125°C 0000 0000 0001 0000 0010h

0°C 0000 0000 0000 0000 0000h

−0.125°C 1111 1111 1111 0000 FFF0h

−1°C 1111 1111 1000 0000 FF80h

−25°C 1111 0011 1000 0000 F380h

−40°C 1110 1100 0000 0000 EC00h

Table 3. 13-Bit (12-Bit Plus Sign)

DIGITAL OUTPUT

TEMPERATURE BINARY HEX

150°C 0100 1011 0000 0000 4B00h

25°C 0000 1100 1000 0000 0C80h

1°C 0000 0000 1000 0000 0080h

0.0625°C 0000 0000 0000 1000 0008h

0°C 0000 0000 0000 0000 0000h

−0.0625°C 1111 1111 1111 1000 FFF8h

−1°C 1111 1111 1000 0000 FF80h

−25°C 1111 0011 1000 0000 F380h

−40°C 1110 1100 0000 0000 EC00h

Table 4. 14-Bit (13-Bit Plus Sign)

DIGITAL OUTPUT

TEMPERATURE BINARY HEX

150°C 0100 1011 0000 0000 4B00h

25°C 0000 1100 1000 0000 0C80h

1°C 0000 0000 1000 0000 0080h

0.03125°C 0000 0000 0000 0100 0004h

0°C 0000 0000 0000 0000 0000h

−0.03125°C 1111 1111 1111 1100 FFFCh

−1°C 1111 1111 1000 0000 FF80h

−25°C 1111 0011 1000 0000 F380h

−40°C 1110 1100 0000 0000 EC00h

Product Folder Links: LM73

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

7.3.4 SMBus Interface

The LM73 operates as a slave on the SMBus. The SMBDAT line is bidirectional. The SMBCLK line is an input

only. The LM73 never drives the SMBCLK line and it does not support clock stretching.

The LM73 uses a 7-bit slave address. It is available in two versions. Each version can be configured for one of

three unique slave addresses, for a total of six unique address.

PART ADDRESS DEVICE

NUMBER PIN ADDRESS

Float 1001 000

LM73-0 Ground 1001 001

VDD 1001 010

Float 1001 100

LM73-1 Ground 1001 101

VDD 1001 110

The SMBDAT output is an open-drain output and does not have internal pull-ups. A “high” level will not be

observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice

of resistor value depends on many system factors but, in general, the pull-up resistor should be as large as

possible without effecting the SMBus desired data rate. This will minimize any internal temperature reading

errors due to internal heating of the LM73.

The LM73 features an integrated low-pass filter on both the SMBCLK and the SMBDAT line. These filters

increase communications reliability in noisy environments.

If either the SMBCLK or SMBDAT line is held low for a time greater than tTIMEOUT (see Logic Electrical

Characteristics for the value of tTIMEOUT), the LM73 state machine will reset to the SMBus idle state, releasing the

data line. Once the SMBDAT is released high, the master may initiate an SMBus start.

7.3.5 ALERT Function

The ALERT output is an over-temperature indicator. At the end of every temperature conversion, the measured

temperature is compared to the value in the THIGH Register. If the measured temperature exceeds the value

stored in THIGH, the ALERT output goes active (see Figure 6). This over-temperature condition will also cause the

ALRT_STAT bit in the Control/Status Register to change value (this bit mirrors the logic level of the ALERT pin).

The ALERT pin and the ALRT_STAT bit are cleared when any of the following occur:

• The measured temperature falls below the value stored in the TLOW Register

• A 1 is written to the ALERT Reset bit in the Configuration Register

• The master resets it through an SMBus Alert Response Address (ARA) procedure

If ALERT has been cleared by the master writing a 1 to the ALERT Reset bit, while the measured temperature

still exceeds the THIGH setpoint, ALERT will go active again after the completion of the next temperature

conversion.

Each temperature reading is associated with a Temperature High (THI) and a Temperature Low (TLOW) flag in

the Control/Status Register. A digital comparison determines whether that reading is above the THIGH setpoint or

below the TLOW setpoint. If so, the corresponding flag is set. All digital comparisons to the THIGH, and TLOW values

are based on an 11-bit temperature comparison. Regardless of the resolution setting of the LM73, the lower

three temperature LSBs will not affect the state of the ALERT output, THI flag, and TLOW flag.

Product Folder Links: LM73

TIME

TEMPERATURE

(Active Low)

Measured Temperature

THIGH Limit

TLOW Limit

ALERT 5HVHW%LWVHWWR³1´

One

Conversion Time

ALERT

TIME

TEMPERATURE

Measured Temperature

THIGH Limit

TLOW Limit

ALERT pin

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

Figure 6. ALERT Temperature Response Cleared When Temperature Crosses TLOW

Figure 7. ALERT Temperature Response Cleared by Writing a 1 to the ALERT Reset Bit.

7.3.6 Communicating With the LM73

The data registers in the LM73 are selected by the Pointer Register. At power-up the Pointer Register is set to

00h, the location for the Temperature Register. The Pointer Register latches the last location it was set to. Note

that all Pointer Register bits are decoded; any incorrect pointer values will not be acknowledged and will not be

stored in the Pointer Register.

NOTE

A write to an invalid pointer address is not allowed. If the master writes an invalid address

to the Pointer Register, the LM73 will not acknowledge the address and the Pointer

AWrite to the LM73 will always include the address byte and the pointer byte.

ARead from the LM73 can occur in either of the following ways:

• If the location latched in the Pointer Register is correct (that is, the Pointer Register is pre-set prior to the

read), then the read can simply consist of an address byte, followed by retrieving the data byte. Most of the

time it is expected that the Pointer Register will point to Temperature Registers because that will be the data

most frequently read from the LM73.

• If the Pointer Register needs to be set, then an address byte, pointer byte, repeat start, and another address

byte will accomplish a read.

The data byte is read out of the LM73 by the most significant bit first. At the end of a read, the LM73 can accept

either an Acknowledge or No Acknowledge bit from the Master. No Acknowledge is typically used as a signal to

the slave that the Master has read its last byte.

Product Folder Links: LM73

D7 D6 D5 D4 D3 D2 D1 D0

1 9

Ack

LM73

Start by

Master NoAck

Master

SMBCLK

SMBDAT Stop

Master

R/W

0 1 A2 A0

1 0 A1

1 9

Frame 1

Serial Bus Address Byte Frame 2

Data Byte from LM73

D7 D6 D5 D4 D3 D2 D1 D0

1 9 1 9

Ack

LM73

Repeat

Start by

Master

NoAck

Master

SMBCLK

(continued)

SMBDAT

(continued) Stop

Master

R/W

0 1 A2 A0

1 0 A1

1 9

D15 D14 D13 D12 D11 D10 D9 D8

Ack

Master

Frame 3

Serial Bus Address Byte

Frame 4

Data Byte from LM73

Frame 5

Data Byte from LM73

1 9 1 9

Ack

LM73

Start by

Master

SMBCLK

SMBDAT R/W

0 1 A2 A0

1 0 A1

Ack

LM73

Frame 1

Serial Bus Address Byte

Frame 2

Pointer Byte

0 0 0 0 0 P2 P1 P0

D7 D6 D5 D4 D3 D2 D1 D0

1 9 1 9

Ack

LM73

Start by

Master

NoAck

Master

SMBCLK

SMBDAT

Stop

Master

R/W

0 1 A2 A0

1 0 A1

1 9

D15 D14 D13 D12 D11 D10 D9 D8

Ack

Master

Frame 1

Serial Bus Address Byte

Frame 2

Data Byte from LM73

Frame 3

Data Byte from LM73

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

7.3.6.1 Reading from the LM73

Figure 8. Typical Read from a 2-Byte Register with Preset Pointer

Figure 9. Typical Pointer Set Followed by Immediate Read of a 2-Byte Register

Figure 10. Typical Read from a 1-Byte Register with Preset Pointer

Product Folder Links: LM73

D7 D6 D5 D4 D3 D2 D1 D0

1 9 1 9

Ack

LM73

SMBCLK

(continued)

SMBDAT

(continued) Stop

Master

D15 D14 D13 D12 D11 D10 D9 D8

Ack

LM73

Frame 3

Data Byte to LM73

Frame 4

Data Byte to LM73

1 9 1 9

Ack

LM73

Start by

Master

SMBCLK

SMBDAT R/W

0 1 A2 A0

1 0 A1

Ack

LM73

Frame 1

Serial Bus Address Byte

Frame 2

Pointer Byte

0 0 0 0 0 P2 P1 P0

1 9 1 9

Ack

LM73

Start by

Master

SMBCLK

SMBDAT R/W

0 1 A2 A0

1 0 A1

Ack

LM73

Frame 1

Serial Bus Address Byte

Frame 2

Pointer Byte

0 0 0 0 0 P2 P1 P0 D7 D6 D5 D4 D3 D2 D1 D0

1 9

Frame 3

Data Byte to LM73

Ack

LM73

Stop

Master

D7 D6 D5 D4 D3 D2 D1 D0

1 9

Ack

LM73

Repeat

Start by

Master

NoAck

Master

SMBCLK

(continued)

SMBDAT

(continued) Stop

Master

R/W

0 1 A2 A0

1 0 A1

1 9

Frame 3

Serial Bus Address Byte

Frame 4

Data Byte from LM73

1 9 1 9

Ack

LM73

Start by

Master

SMBCLK

SMBDAT R/W

0 1 A2 A0

1 0 A1

Ack

LM73

Frame 1

Serial Bus Address Byte

Frame 2

Pointer Byte

0 0 0 0 0 P2 P1 P0

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

Figure 11. Typical Pointer Set Followed by Immediate Read of a 1-Byte Register

7.3.6.2 Writing to the LM73

Figure 12. Typical 1-Byte Write

Figure 13. Typical 2-Byte Write

7.4 Device Functional Modes

7.4.1 Shutdown Mode

Shutdown Mode is enabled by writing a “1” to the Full Power Down Bit, Bit 7 of the Configuration Register, and

holding it high for at least the specified maximum conversion time at the existing temperature resolution setting.

(see Temperature Conversion Time specifications under the Temperature-to-Digital Converter Characteristics).

For example, if the LM73 is set for 12-bit resolution before shutdown, then Bit 7 of the Configuration register

must go high and stay high for the specified maximum conversion time for 12-bits resolution.

Product Folder Links: LM73

Control/Status

(Read-Write)

Pointer = 00000100

Identification

(Read-Only)

Pointer = 00000111

Pointer Register

(selects register

for communication)

Interface

DataAddress

SMBDAT

SMBCLK

THIGH

(Read-Write)

Pointer = 00000010

TLOW

(Read-Write)

Pointer = 00000011

Temperature

(Read-Only)

Pointer = 00000000

Configuration

(Read-Write)

Pointer = 00000001

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

Device Functional Modes (continued)

The LM73 will always finish a temperature conversion and update the temperature registers before shutting

down.

Writing a “0” to the Full Power Down Bit restores the LM73 to normal mode. The user should wait at least the

specified maximum conversion time, at the existing resolution setting, before accurate data appears in the

temperature register.

7.5 Register Map

7.5.1 LM73 Registers

The LM73's internal registers are selected by the Pointer register. The Pointer register latches the last location

that it was set to. The pointer register and all internal registers are described below. All registers reset at device

power up.

7.5.1.1 Pointer Register

The diagram below shows the Pointer Register, the six internal registers to which it points, and their associated

pointer addresses.

P7 P6 P5 P4 P3 P2 P1 P0

0 0 0 0 0 Register Select

Product Folder Links: LM73

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

Bits Name Description

7:3 Not Used Must write zeros only.

2:0 Register Select Pointer address. Points to desired register.

See table below.

P2 P1 P0 REGISTER(1)

0 0 0 Temperature

0 0 1 Configuration

0 1 0 THIGH

0 1 1 TLOW

1 0 0 Control / Status

1 1 1 Identification

(1) A write to an invalid pointer address is not allowed. If the master

writes an invalid address to the Pointer Register,

(a) the LM73 will not acknowledge the address and

(b) the Pointer Register will continue to contain the last value stored

in it.

7.5.1.2 Temperature Data Register

Pointer Address 00h (Read Only)

Reset State: 7FFCh (+255.96875°C)

One-Shot State: 8000h (-256°C)

D15 D14 D13 D12 D11 D10 D9 D8

SIGN 128°C 64°C 32°C 16°C 8°C 4°C 2°C

D7 D6 D5 D4 D3 D2 D1 D0

1°C 0.5°C 0.25°C 0.125°C 0.0625°C 0.03125°C reserved reserved

Bits Name Description

15:2 Temperature Data Represents the temperature that was measured by the most recent temperature conversion. On

Power-up, this data is invalid until the Data Available (DAV) bit in the Control/Status register is high

(after the completion of the first temperature conversion). The resolution is user-programable from 11-

bit resolution (0.25°C/LSB) through 14-bit resolution (0.03125°C/LSB). The desired resolution is

programmed with bits 5 and 6 of the Control/Status register.

1:0 Not Used Return zeros upon read.

Product Folder Links: LM73

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

7.5.1.3 Configuration Register

Pointer Address 01h (R/W)

Reset State: 40h

D7 D6 D5 D4 D3 D2 D1 D0

PD reserved ALRT EN ALRT POL ALRT RST ONE SHOT reserved

Bits Name Description

7 Full Power Down Writing a 1 to this bit and holding it high for at least the specified maximum conversion time, at the existing

temperature resolution setting, puts the LM73 in shutdown mode for power conservation.

Writing a 0 to this bit restores the LM73 to normal mode. Waiting one specified maximum conversion time

for the existing resolution setting assures accurate data in the temperature register.

6 reserved User must write only a 1 to this bit

5 ALERT Enable A 0 in this location enables the ALERT output. A 1 disables it. This bit also controls the ALERT Status bit

(the Control/Status Register, Bit 3) since that bit reflects the state of the Alert pin.

4 ALERT Polarity When set to 1, the ALERT pin and ALERT Status bit are active-high. When 0, it is active-low.

3 ALERT Reset Writing a 1 to this bit resets the ALERT pin and the ALERT Status bit. It will always be 0 when read.

2 One Shot When in shutdown mode (Bit 7 is 1), initiates a single temperature conversion and update of the temperature

0). Always returns a 0 when read.

1:0 Reserved User must write only a 0 to these bits.

7.5.1.4 THIGH Upper-Limit Register

Pointer Address 02h (R/W)

Reset State: 7FE0h (+255.75°C)

D15 D14 D13 D12 D11 D10 D9 D8

SIGN 128°C 64°C 32°C 16°C 8°C 4°C 2°C

D7 D6 D5 D4 D3 D2 D1 D0

1°C 0.5°C 0.25°C reserved

Bits Name Description

15:5 Upper-Limit If the measured temperature that is stored in this register exceeds this user-programmable upper

Temperature temperature limit, the ALERT pin will go active and the THIGH flag in the Control/Status register will be

set to 1. Two's complement format.

4:0 Reserved Returns zeros upon read. Recommend writing zeros only in these bits.

7.5.1.5 TLOW Lower-Limit Register

Pointer Address 03h (R/W)

Reset State: 8000h (–256°C)

D15 D14 D13 D12 D11 D10 D9 D8

SIGN 128°C 64°C 32°C 16°C 8°C 4°C 2°C

D7 D6 D5 D4 D3 D2 D1 D0

1°C 0.5°C 0.25°C reserved

Bits Name Description

15:5 Lower-Limit If the measured temperature that is stored in the temperature register falls below this user-

Temperature programmable lower temperature limit, the ALERT pin will be deactivated and the TLOW flag in the

Control/Status register will be set to 1. Two's complement format.

4:0 Reserved Returns zeros upon read. Recommend writing zeros only in these bits.

Product Folder Links: LM73

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

7.5.1.6 Control/Status Register

Pointer Address 04h (R/W)

Reset State: 08h

D7 D6 D5 D4 D3 D2 D1 D0

TO_DIS RES1 RES0 reserved ALRT_STAT THI TLOW DAV

BITS NAME DESCRIPTION

7 Time-Out Disable Disable the time-out feature on the SMBDAT and SMBCLK lines if set to 1. Setting this bit turns off the

bus-idle timers, enabling the LM73 to operate at lowest shutdown current.

6:5 Temperature Selects one of four user-programmable temperature data resolutions

Resolution 00: 0.25°C/LSB, 11-bit word (10 bits plus Sign)

01: 0.125°C/LSB, 12-bit word (11 bits plus Sign)

10: 0.0625°C/LSB, 13-bit word (12 bits plus Sign)

11: 0.03125°C/LSB, 14-bit word (13 bits plus Sign)

4 reserved Always returns zero when read. Recommend customer write zero only.

3 ALERT Pin Status Value is 0 when ALERT output pin is low. Value is 1 when ALERT output pin is high. The ALERT output

pin is reset under any of the following conditions: (1) Cleared by writing a 1 to the ALERT Reset bit in the

configuration register, (2) Measured temperature falls below the TLOW limit, or (3) cleared via the ARA

sequence. Recommend customer write zero only.

2 Temperature High Flag Bit is set to 1 when the measured temperature exceeds the THIGH limit stored in the programmable THIGH

longer exceeds the programmed THIGH limit and (2) upon reading the Control/Status register. If the

temperature is not longer above the THIGH limit, this status bit remains set until it is read by the master so

that the system can check the history of what caused the ALERT output to go active. This bit is not

cleared after every read if the measured temperature is still above the THIGH limit.

1 Temperature Low Flag Bit is set to 1 when the measured temperature falls below the TLOW limit stored in the programmable

TLOW register. Flag is reset to 0 when both of the following conditions are met: (1) measured temperature

is no longer below the programmed TLOW limit and (2) upon reading the Control/Status register. If the

temperature is no longer below the TLOW limit, the status bit remains set until it is read by the master so

that the system can check the history of what cause the ALERT output to go active. This bit is not cleared

after every read if temperature is still below TLOW limit.

0 Data Available Flag This bit is 0 when the LM73 is in the process of converting a new temperature. It is 1 when the

conversion is done. After initiating a temperature conversion while operating in the one-shot mode, this

status bit can be monitored to indicate when the conversion is done. After triggering the one-shot

conversion, the data in the temperature register is invalid until this bit is high (that is, after completion of

the conversion). On power-up, the LM73 is in continuous conversion mode; while in continuous

conversion mode (the default mode after power-on reset) this bit will always be high. Recommend

customer write zero only.

7.5.1.7 Identification Register

Pointer Address 07h (Read Only)

Reset State: 0190h

D15 D14 D13 D12 D11 D10 D9 D8

00000001

D7 D6 D5 D4 D3 D2 D1 D0

10010000

BITS NAME DESCRIPTION

15:8 Manufacturer Always returns 01h to uniquely identify the manufacturer as Texas Instruments.

Identification Byte

7:4 Product Identification Always returns 9h to uniquely identify this part as the LM73 Temperature Sensor.

Nibble

3:0 Die Revision Step Always returns 0h to uniquely identify the revision as level zero.

Nibble

Product Folder Links: LM73

LM73

SMBDAT

SMBCLK

ADDR 1

VDD = 2.7V to 5.5V

Typical bypass 0.1 PF

To hardware

shutdown

To / from processor

2-wire interface

Address (set as desired for one

of three addresses)

ALERT

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

8.1.1 Thermal Path Considerations

To get the expected results when measuring temperature with an integrated circuit temperature sensor like the

LM73, it is important to understand that the sensor measures its own die temperature. For the LM73, the best

thermal path between the die and the outside world is through the LM73's pins. In the SOT23 package, all the

pins on the LM73 will have an equal effect on the die temperature. Because the pins represent a good thermal

path to the LM73 die, the LM73 will provide an accurate measurement of the temperature of the printed circuit

board on which it is mounted. There is a less efficient thermal path between the plastic package and the LM73

die. If the ambient air temperature is significantly different from the printed circuit board temperature, it will have

a small effect on the measured temperature.

8.1.2 Output Considerations: Tight Accuracy, Resolution and Low Noise

The LM73 is well suited for applications that require tight temperature measurement accuracy. In many

applications, the low temperature error can mean better system performance and, by eliminating a system

calibration step, lower production cost.

With digital resolution as fine as 0.03125 °C/LSB, the LM73 senses and reports very small changes in its

temperature, making it ideal for applications where temperature sensitivity is important. For example, the LM73

enables the system to quickly identify the direction of temperature change, allowing the processor to take

compensating action before the system reaches a critical temperature.

The LM73 has very low output noise, typically 0.015°C rms, which makes it ideal for applications where stable

thermal compensation is a priority. For example, in a temperature-compensated oscillator application, the very

small deviation in successive temperature readings translates to a stable frequency output from the oscillator.

8.2 Typical Application

Figure 14. Digital Temperature Sensing

8.2.1 Design Requirements

The LM73 requires positive supply voltage of 2.7 V to 5.5 V to be applied between +VDD and GND. For best

results, bypass capacitors of 100 nF and 10 μF are recommended.

Product Folder Links: LM73

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

Typical Application (continued)

8.2.2 Detailed Design Procedure

The temperature resolution is programmable, allowing the host system to select the optimal configuration

between sensitivity and conversion time. The LM73 can be placed in shutdown to minimize power consumption

when temperature data is not required. While in shutdown, a 1-shot conversion mode allows system control of

the conversion rate for ultimate flexibility.

8.2.3 Application Curve

Figure 15. Typical Performance

Product Folder Links: LM73

VDD

LM73

GND

SMBDAT

SMBCLK

VDD

LM73

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

www.ti.com

9 Power Supply Recommendations

In systems where there is a large amount of capacitance on the VDD node, the LM73 power supply ramp-up

time can become excessively long. Slow power-supply ramp times may result in abnormal temperature readings.

A linear power-on-ramp of less than 0.7 V/msec and an exponential ramp with an RC time constant of more than

1.25 msec is categorized as a slow power-supply ramp. To avoid errors, use the power up sequence described

below.

The software reset sequence is as follows:

1. Allow VDD to reach the specified minimum operating voltage, as specified in the Recommended Operating

Conditions section.

2. Write a 1 to the Full Power Down bit, Bit 7 of the Configuration Register, and hold it high for the specified

maximum conversion time for the initial default of 11-bits resolution. This ensures that a complete reset

operation has occurred. See the Temperature Conversion Time specifications within the Temperature-to-

Digital Converter Characteristics for more details.

3. Write a 0 to the Full Power Down bit to restore the LM73 to normal mode.

10 Layout

10.1 Layout Guidelines

To achieve the expected results when measuring temperature with an integrated circuit temperature sensor like

the LM73, it is important to understand that the sensor measures its own die temperature. For the LM73, the best

thermal path between the die and the outside world is through the LM73's pins. In the SOT-23 package, all the

pins on the LM73 will have an equal effect on the die temperature. Because the pins represent a good thermal

path to the LM73 die, the LM73 will provide an accurate measurement of the temperature of the printed circuit

board on which it is mounted.

10.2 Layout Example

Figure 16. PBC Layout

Product Folder Links: LM73

LM73

www.ti.com

SNIS141F –OCTOBER 2005–REVISED OCTOBER 2015

11 Device and Documentation Support

11.1 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.2 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.3 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

11.4 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Product Folder Links: LM73

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead finish/

Ball material

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM73CIMK-0/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 150 T730

LM73CIMK-1/NOPB ACTIVE SOT-23-THIN DDC 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 150 T731

LM73CIMKX-0/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 150 T730

LM73CIMKX-1/NOPB ACTIVE SOT-23-THIN DDC 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 150 T731

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF LM73 :

•Automotive: LM73-Q1

NOTE: Qualified Version Definitions:

•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM73CIMK-0/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM73CIMK-1/NOPB SOT-

23-THIN DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM73CIMKX-0/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM73CIMKX-1/NOPB SOT-

23-THIN DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Mar-2017

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM73CIMK-0/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LM73CIMK-1/NOPB SOT-23-THIN DDC 6 1000 210.0 185.0 35.0

LM73CIMKX-0/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

LM73CIMKX-1/NOPB SOT-23-THIN DDC 6 3000 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Mar-2017

Pack Materials-Page 2

www.ti.com

PACKAGE OUTLINE

0.20

0.12 TYP 0.25

3.05

2.55

4X 0.95

1.100

0.847

0.1

0.0 TYP

6X 0.5

0.3

0.6

0.3 TYP

1.9

0 -8 TYP

3.05

2.75

1.75

1.45

SOT - 1.1 max heightDDC0006A

SOT

4214841/B 11/2020

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Reference JEDEC MO-193.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

6X (1.1)

6X (0.6)

(2.7)

4X (0.95)

(R0.05) TYP

4214841/B 11/2020

SOT - 1.1 max heightDDC0006A

SOT

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPLOSED METAL SHOWN

SCALE:15X

SYMM

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDERMASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.7)

4X(0.95)

6X (1.1)

6X (0.6)

(R0.05) TYP

SOT - 1.1 max heightDDC0006A

SOT

4214841/B 11/2020

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 THICK STENCIL

SCALE:15X

SYMM

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable

standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you

permission to use these resources only for development of an application that uses the TI products described in the resource. Other

reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third

party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims,

damages, costs, losses, and liabilities arising out of your use of these resources.

TI’s products are provided subject to TI’s Terms of Sale (www.ti.com/legal/termsofsale.html) or other applicable terms available either on

ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable

warranties or warranty disclaimers for TI products.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265