NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no respon-
sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
Recommended Substitutions:
For existing customer transition, and for new customers or new appli-
cations, refer to Allegro sales for alternatives.
Fully Integrated, Hall Effect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
Date of status change: May 3, 2010
These parts are no longer in production The device should not be
purchased for new design applications. Samples are no longer available.
Discontinued Product
ACS755xCB-100
Description
The Allegro ACS755 family of current sensor ICs provides
economical and precise solutions for DC current sensing in
industrial, automotive, commercial, and communications
systems. The device package allows for easy implementation by
the customer. Typical applications include motor control, load
detection and management, power supplies, and overcurrent
fault protection.
The device consists of a precision, low-offset linear Hall
circuit with a copper conduction path located near the die.
Applied current flowing through this copper conduction path
generates a magnetic field which the Hall IC converts into a
proportional voltage. Device accuracy is optimized through the
close proximity of the magnetic signal to the Hall transducer.
A precise, proportional voltage is provided by the low-offset,
chopper-stabilized BiCMOS Hall IC, which is programmed
for accuracy at the factory.
The output of the device will be valid when a current flows
through the primary copper conduction path from terminal 4
to terminal 5, which is the path used for current sampling. The
internal resistance of this conductive path is 100 μΩ typical,
providing low power loss.
ACS755100-DS Rev. 10
Features and Benefits
Monolithic Hall IC for high reliability
Single +5 V supply
3 kVRMS isolation voltage between terminals 4/5 and
pins 1/2/3 for up to 1 minute
27 kHz bandwidth
Automotive temperature range
End-of-line factory-trimmed for gain and offset
Ultra-low power loss: 100 μΩ internal conductor
resistance
Ratiometric output from supply voltage
Extremely stable output offset voltage
Small package size, with easy mounting capability
Output proportional to DC currents
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
Continued on the next page…
Package: 5 pin package (leadform PFF)
Typical Application
+5 V
VOU
T
RF
CF
CBYP
0.1 µF
IP+
IP–
2
GND
4
5
ACS755
3
1
VIOUT
VCC
IP
Application 1. The ACS755 outputs an analog signal, VOUT
.
that varies linearly with the unidirectional DC primary sampled
current, IP
, within the range specified. CF is recommended for
noise management, with values that depend on the application.
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
The thickness of the copper conductor allows survival of the device
at up to 5× overcurrent conditions. The terminals of the conductive
path are electrically isolated from the signal leads (pins 1 through
3). This allows the ACS755 family of sensor ICs to be used in
applications requiring electrical isolation without the use of opto-
isolators or other costly isolation techniques.
The device is fully calibrated prior to shipment from the factory.
The ACS75x family is lead (Pb) free. All leads are plated with
100% matte tin, and there is no Pb inside the package. The heavy
gauge leadframe is made of oxygen-free copper.
Description (continued)
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
Supply Voltage VCC 16 V
Reverse Supply Voltage VRCC –16 V
Output Voltage VIOUT 16 V
Reverse Output Voltage VRIOUT –0.1 V
Maximum Basic Isolation Voltage VISO 353 VAC, 500 VDC, or Vpk V
Maximum Rated Input Current IIN 200 A
Output Current Source IOUT(Source) 3mA
Output Current Sink IOUT(Sink) 10 mA
Nominal Operating Ambient Temperature TA
Range L –40 to 150 ºC
Range S –20 to 85 ºC
Maximum Junction TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC
TÜV America
Certificate Number:
U8V 04 11 54214 001
Fire and Electric Shock
EN60950-1:2001
Selection Guide
Part Number TOP
(°C)
Primary
Sampled
Current, IP
(A)
Sensitivity
Sens (Typ.)
(mV/A)
Bandwidth
(kHz)
Package
Packing1
Terminals Signal Pins
ACS755LCB-100-PFF2–40 to 150 100 40 27 Formed Formed 170 pieces per bulk bag
ACS755SCB-100-PFF2–20 to 85 100 40 27 Formed Formed
1Contact Allegro for additional packing options.
2Variant is in production but has been determined to be LAST TIME BUY. This classification indicates that the variant is obsolete and notice has been
given. Sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for new design applications
because of obsolescence in the near future. Samples are no longer available. Status date change November 2, 2009. Deadline for receipt of LAST
TIME BUY orders is April 30, 2010.
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
IP+
IP–
VIOUT
GND
VCC
4
5
3
2
1
Terminal List Table
Number Name Description
1 VCC Device power supply pin
2 GND Signal ground pin
3 VIOUT Analog output signal pin
4 IP+ Terminal for current being sampled
5 IP– Terminal for current being sampled
Functional Block Diagram
Pin-out Diagram
Amp Out
VCC
+5 V
VIOUT
GND
Filter
Dynamic Offset
Cancellation
0.1 μF
IP–
IP+
Gain Temperature
Coefficient Offset
Voltage
Regulator
Trim Control
To all subcircuits
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS, over operating ambient temperature range unless otherwise stated
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Primary Sampled Current IP0 100 A
Supply Voltage VCC 4.5 5.0 5.5 V
Supply Current ICC VCC = 5.0 V, output open 6.5 8 10 mA
Output Resistance ROUT IOUT = 1.2 mA 1 2 Ω
Output Capacitance Load CLOAD VOUT to GND 10 nF
Output Resistive Load RLOAD VOUT to GND 4.7 kΩ
Primary Conductor Resistance RPRIMARY IP = +100A; TA = 25°C 100 μΩ
Isolation Voltage VISO Pins 1-3 and 4-5; 60 Hz, 1 minute 3.0 kV
PERFORMANCE CHARACTERISTICS, -20°C to +85°C, VCC = 5 V unless otherwise specified
Propagation time tPROP IP = +50 A, TA = 25°C 4 μs
Response time tRESPONSE IP = +50 A, TA = 25°C 13 μs
Rise time trIP = +50 A, TA = 25°C 13 μs
Frequency Bandwidth f –3 dB , TA = 25°C 27 kHz
Sensitivity Sens Over full range of IP
, TA = 25°C 40 mV/A
Over full range of IP 36.5 41.5 mV/A
Noise VNOISE Peak-to-peak, TA = 25°C,
no external filter –65 mV
Linearity ELIN Over full range of IP ±2.8 %
Zero Current Output Voltage VOUT(Q) I = 0 A, TA = 25°C 0.6 V
Electrical Offset Voltage
(Magnetic error not included) VOE
I = 0 A, TA = 25°C –15 15 mV
I = 0 A –25 25 mV
Magnetic Offset Error IERROM I = 0 A, after excursion of 100 A ±0.1 ±0.30 A
Total Output Error
(Including all offsets) ETOT
Over full range of IP
, TA = 25°C ±1 %
Over full range of IP ±9.0 %
PERFORMANCE CHARACTERISTICS, -40°C to +150°C, VCC = 5 V unless otherwise specified
Propagation time tPROP IP = +50 A, TA = 25°C 4 μs
Response time tRESPONSE IP = +50 A, TA = 25°C 13 μs
Rise time trIP = +50 A, TA = 25°C 13 μs
Frequency Bandwidth f –3 dB , TA = 25°C 27 kHz
Sensitivity Sens Over full range of IP
, TA = 25°C 40 mV/A
Over full range of IP 36 42 mV/A
Noise VNOISE Peak-to-peak, TA = 25°C,
no external filter –65 mV
Linearity ELIN Over full range of IP ±2.8 %
Zero Current Output Voltage VOUT(Q) I = 0 A, TA = 25°C 0.6 V
Electrical Offset Voltage
(Magnetic error not included) VOE
I = 0 A, TA = 25°C –15 15 mV
I = 0 A –50 50 mV
Magnetic Offset Error IERROM I = 0 A, after excursion of 100 A ±0.1 ±0.30 A
Total Output Error
(Including all offsets) ETOT
Over full range of IP
, TA = 25°C ±1 %
Over full range of IP ±10.0 %
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Sensitivity (Sens). The change in device output in response to a
1 A change through the primary conductor. The sensitivity is the
product of the magnetic circuit sensitivity (G / A) and the linear
IC amplifier gain (mV/G). The linear IC amplifier gain is pro-
grammed at the factory to optimize the sensitivity (mV/A) for the
full-scale current of the device.
Noise (VNOISE). The product of the linear IC amplifier gain
(mV/G) and the noise floor for the Allegro Hall effect linear IC
(1 G). The noise floor is derived from the thermal and shot
noise observed in Hall elements. Dividing the noise (mV) by the
sensitivity (mV/A) provides the smallest current that the device is
able to resolve.
Linearity (ELIN). The degree to which the voltage output from
the IC varies in direct proportion to the primary current through
its full-scale amplitude. Nonlinearity in the output can be attrib-
uted to the saturation of the flux concentrator approaching the
full-scale current. The following equation is used to derive the
linearity:
where
VIOUT_¼ full-scale IP (V) is the output voltage when the sampled
current approximates 0.25 IP(max), and
VIOUT_¾ full-scale IP (V) is the output voltage when the sampled
current approximates 0.75 IP(max).
Quiescent output voltage (VIOUT(Q)). The output of the device
when the primary current is zero. For a unipolar supply voltage,
it nominally remains at 0.6. Variation in VIOUT(Q) can be attributed
to the resolution of the Allegro linear IC quiescent voltage trim
and thermal drift.
Electrical offset voltage (VOE). The deviation of the device out-
put from its ideal quiescent value due to nonmagnetic causes.
Magnetic offset error (IERROM). The magnetic offset is due to
the residual magnetism (remnant field) of the core material. The
magnetic offset error is highest when the magnetic circuit has
been saturated, usually when the device has been subjected to a
full-scale or high-current overload condition. The magnetic offset
is largely dependent on the material used as a flux concentrator.
The larger magnetic offsets are observed at the lower operating
temperatures.
Accuracy (ETOT). The accuracy represents the maximum devia-
tion of the actual output from its ideal value. This is also known
as the total output error. The accuracy is illustrated graphically in
the output voltage versus current chart on the following page.
Accuracy is divided into four areas:
 0 A at 25°C. Accuracy at the zero current flow at 25°C, with-
out the effects of temperature.
 0 A over Δ temperature. Accuracy at the zero current flow
including temperature effects.
 Full-scale current at 25°C. Accuracy at the the full-scale current
at 25°C, without the effects of temperature.
 Full-scale current over Δ temperature. Accuracy at the full-
scale current flow including temperature effects.
Definitions of Accuracy Characteristics
100 1 –
V
IOUT_3/4 full-scale IPV
IOUT(Q)
V
IOUT_1/4 full-scale IPV
IOUT(Q)

3
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Definitions of Dynamic Response Characteristics
Propagation delay (tPROP). The time required for the device
output to reflect a change in the primary current signal. Propaga-
tion delay is attributed to inductive loading within the linear IC
package, as well as in the inductive loop formed by the primary
conductor geometry. Propagation delay can be considered as a
fixed time offset and may be compensated.
Primary Current
Transducer Output
90
0
I (%)
Propagation Time, tPROP
t
Primary Current
Transducer Output
90
0
I (%)
Response Time, tRESPONSE t
Primary Current
Transducer Output
90
10
0
I (%)
Rise Time, trt
Rise time (tr). The time interval between a) when the device
reaches 10% of its full scale value, and b) when it reaches 90%
of its full scale value. The rise time to a step response is used to
derive the bandwidth of the device, in which ƒ(–3 dB) = 0.35 / tr.
Both tr and tRESPONSE are detrimentally affected by eddy current
losses observed in the conductive IC ground plane.
Response time (tRESPONSE). The time interval between a) when
the primary current signal reaches 90% of its final value, and b)
when the device reaches 90% of its output corresponding to the
applied current.
Output Voltage versus Sampled Current
Accuracy at 0 A and at Full-Scale Current
Increasing VIOUT
(V)
+IP (A)
Accuracy
Accuracy
25°C Only
Accuracy
25°C Only
Accuracy
0 A
vrOe $Temperature
Average
VIOUT
–IP (A)
vrOe $Temperature
Decreasing VIOUT
(V)
IP(max)
Full Scale
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Step Response
50 A Excitation Signal, TA=25°C
x100 Device
Output (mV)
Excitation
Signal
Fully Integrated, Hall Ef fect-Based Linear Current Sensor IC
with High Voltage Isolation and a Low-Resistance Current Conductor
ACS755xCB-100
8
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Copyright ©2004-2010, Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Package CB, 5-pin package
Leadform PFF
Creepage distance, current terminals to signal pins: 7.25 mm
Clearance distance, current terminals to signal pins: 7.25 mm
Package mass: 4.63 g typical
4
R1
1.91
321.4
0.5
R3
0.8
1.5
0.5
R2
Perimeter through-holes recommended
1º±2°
5º±5°
B
23
14.0±0.2
17.5±0.2
4.0±0.2
3.0±0.2
2.9±0.2
3.5±0.2
3.5±0.2
10.00±0.10
13.00±0.10
0.51±0.10
4.40±0.10
7.00±0.10
1.9±0.2
1.50±0.10
1
45
A
A
C
B
C
B
Branding scale and appearance at supplier discretion
Dambar removal intrusion
For Reference Only; not for tooling use (reference DWG-9111, DWG-9110)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Standard Branding Reference View
N = Device part number
T = Temperature code
A = Amperage range
L = Lot number
Y = Last two digits of year of manufacture
W = Week of manufacture
= Supplier emblem
Branded
Face
0.381+0.060
–0.030
1
NNNNNNN
TTT - AAA
LLLLLLL
YYWW
PCB Layout Reference View