PE22100 Document Category: Product Specification Transformer Driver for Isolated Power Supplies, 2 MHz Features Applications * Push pull driver for small transformers * Isolated interface power supply * Operates off a 3.0V or 5V supply * Isolated data acquisition * Adjustable switching frequency up to 2 MHz * Industrial automation and instrumentation * Current limit protection * Isolated gate drivers * Over-temperature protection * Medical equipment * Packaging - 2 x 2 x 0.5 mm QFN Product Description The PE22100 is a push pull driver for driving small transformers for isolated power supply applications. The PE22100 drives the primary of a center-tapped transformer, such as the 782100 family from Murata, from a 3.0V or a 5V supply to deliver an isolated power supply. The device consists of an on-chip oscillator whose frequency is set by an external capacitor. The oscillator output is divided by two in frequency to create anti-phase clock signals that drive two power switches. The device also contains an internal current limit and thermal cutout. The PE22100 is available in a 2 x 2 x 0.5 mm QFN package and is specified for operation from -40 C to +125 C. The PE22100 is manufactured on Peregrine's UltraCMOS(R) process, a patented advanced form of silicon-oninsulator (SOI) technology, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1 * PE22100 Functional Diagram VIN 100nF VDD OUTA VREG VOUT TRANSFORMER MBR0520 LDO VIN 470nF 10F 0.1F PE22100 MBR0520 CSET RSET CTEST OSCILLATOR OUTB EN 82K GND GND SGND (c)2017, Peregrine Semiconductor Corporation. All rights reserved. * Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 3. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. Table 1 * Absolute Maximum Ratings for PE22100 Parameter/Condition Min Max Unit VDD 7 V Voltage on OUTA or OUTB 15 V Switch current 350 mA VREG +0.3 V Enable pin voltage ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 2. Table 2 * ESD Tolerance Parameter/Condition Human Body model all pins/tested to JEDEC JS-001 Max Unit 1 kV Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Recommended Operating Conditions Table 3 lists the recommending operating conditions for the PE22100. Devices should not be operated outside the operating conditions listed below. Table 3 * Recommended Operating Conditions for PE22100 Parameter Min Typ Max Unit 3.0 5.0 5.5 V 10.6 mA Switch voltage on OUTA and OUTB 11 V Transient on OUTA or OUTB(*) 15 V Positive supply voltage, VDD Positive supply current, IDD Note: * Max width 20 ns, max duty cycle 1:100. Page 2 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Electrical Specifications Table 4 provides the PE22100 key electrical specifications at 25 C, unless otherwise specified. Table 4 * PE22100 Electrical Specifications Parameter Condition Min Typ 100 kHz Operating frequency Max Unit 2 MHz As shown Minimum switching frequency CSET =100pF 170 235 275 KHz Maximum switching frequency CSET =8.2pF 2240 2290 2504 KHz Output switch resistance VDD=5V T=-40C to +105C ambient, measured OUTA to GND, OUTB to GND 1 1.3 Oscillating frequency accuracy Excluding external component variation -15 +15 % +126 +162 C Over temperature assert Over temperature hysteresis 3.4 Over current protection assert Over current protection current With 2V across OUTA, OUTB to GND C 540 mA 280 mA Undervoltage-lockout (UVLO) assert 2.5 V UVLO threshold 2.45 V UVLO hysteresis 20 mV Output rise and fall time Cload<50pF 5.5 Internal regulated voltage Internal regulated voltage at VREG at VREG Idd current shutdown Vsw=VDD=5V, both pulled high OUTA and OUTB Enable pin high Input open circuit(*) Enable pin low Input pulled low(*) Enable pin current Enable pin voltage = 0V 2.6 2.2 2.0 Oscillator capacitor RSET=82kohms charge/discharge current 32 V 2.9 2.5 8.3 ns mA V 0.7 V 10.0 A 45 A Note: * The enable pin is internally pulled up to the internal regulator. Voltages higher than VREG can damage the part. DOC-72248-2 - (06/2017) Page 3 www.psemi.com PE22100 Transformer Driver Thermal Data Table 5 * Thermal Data for PE22100 Psi-JT (JT), junction top-of-package, is a thermal metric to estimate junction temperature of a device on the customer application PCB (JEDEC JESD51-2). Parameter Max Unit Tjc 20 C/W JT = (TJ - TT)/P Maximum junction temperature(1) 125 C where Soldering temperature(2) 245 C JT = junction-to-top of package characterization Soldering temperature(3) 260 C JT 1.6 C/W JA, junction-to-ambient thermal resistance 80.8 C/W JB, junction-to-ambient thermal resistance 56.0 C/W parameter, C/W TJ = die junction temperature, C TT = package temperature (top surface, in the center), C P = power dissipated by device, Watts Notes: 1) Simulated / Measured at max TA & max Power dissipation. 2) Reflow soldering J-STD-020D) 3 reflows. 3) Reflow soldering - 3 reflows Page 4 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Typical Performance Data Figure 2-Figure 4 show the typical performance data at VIN = 3.3V, VOUT = 3.3V, and use Murata transformer 782100/33VC. Output Voltage Output Voltage (V) 145 135 125 115 95 105 85 75 65 55 45 35 25 5 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% Efficiency (%) Efficiency 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 15 Output Voltage (V) Output Voltage Figure 4 * Efficiency and Output Voltage, CSET = 220 pF Efficiency 4.5 80.0% 4.0 70.0% 3.5 60.0% 3.0 50.0% 2.5 40.0% 2.0 30.0% 1.5 1.0 20.0% 0.5 10.0% Efficiency (%) Figure 2 * Efficiency and Output Voltage, CSET = 47 pF 0.0% 0.0 5 25 45 65 85 105 125 145 165 185 Iload (mA) Iload (mA) Figure 3 * Efficiency and Output Voltage, CSET = 100 pF Efficiency 90% 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 80% 70% 60% 50% 40% 30% 20% Efficiency(%) Output Voltage(V) Output Voltage 10% 0% 5 20 35 50 65 80 95 110 125 140 155 170 185 200 Iload (mA) DOC-72248-2 - (06/2017) Page 5 www.psemi.com PE22100 Transformer Driver Figure 5-Figure 6 show the typical performance data at VIN = 3.3V, VOUT = 5V, and use transformer 782100/ 35JVC. Output Voltage Efficiency 90% 8.0 8 80% 7.0 7 70% 6 60% 5 50% 4 40% 3 30% 2 20% 1 10% 0 0% 5 15 25 35 45 55 65 75 85 Output Voltage (V) 9 Efficiency (%) Output Voltage (V) Output Voltage Figure 7 * Efficiency and Output Voltage, CSET = 100 pF Efficiency 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 6.0 5.0 4.0 3.0 2.0 1.0 0.0 5 95 15 25 35 45 55 65 75 85 Efficiency (%) Figure 5 * Efficiency and Output Voltage, CSET = 47 pF 95 Iload (mA) Iload (mA) Figure 6 * Efficiency and Output Voltage, CSET = 220 pF Efficiency 80% 6.8 70% 6.6 60% 6.4 50% 6.2 40% 6.0 30% 5.8 20% 5.6 10% 5.4 Efficiency Output Voltage(V) Output Voltage 7.0 0% 5 20 35 50 65 80 95 Iload (mA) Page 6 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Figure 8-Figure 9 show the typical performance data at VIN = 5V, VOUT = 5V, and use transformer 782100/ 55JVC. Output Voltage 90% 80% 70% 60% 50% 40% 30% 20% 10% 0% 5 25 45 65 85 Output Voltage (V) Efficiency 9 8 7 6 5 4 3 2 1 0 Efficiency (%) Output Voltage (V) Output Voltage Figure 10 * Efficiency and Output Voltage, CSET = 100 pF Efficiency 8.0 90% 7.0 80% 6.0 70% 60% 5.0 50% 4.0 40% 3.0 30% 2.0 20% 1.0 10% Efficiency (%) Figure 8 * Efficiency and Output Voltage, CSET = 47 pF 0% 0.0 5 20 35 50 65 80 95 110125140155170185200 105 125 145 165 185 Iload (mA) Iload (mA) Figure 9 * Efficiency and Output Voltage, CSET = 220 pF Efficiency 80% 7.0 70% 6.8 60% 6.6 50% 6.4 40% 6.2 30% 6.0 20% 5.8 10% Efficiency (%) Output Volage (V) Output Voltage 7.2 0% 5.6 5 25 45 65 85 105 125 145 165 185 Iload (mA) DOC-72248-2 - (06/2017) Page 7 www.psemi.com PE22100 Transformer Driver Figure 11-Figure 13 show the typical performance data at V IN = 5V, VOUT = 3.3V, and use transformer 7821053VC. Output Voltage Output Voltage Effciency 5.0 60.0% 4.0 50.0% 40.0% 3.0 30.0% 2.0 20.0% 1.0 10.0% 0.0 Output Voltage (V) 70.0% Efficiency (%) 80.0% 6.0 Output Volatge (V) Figure 13 * Efficiency and Output Voltage, CSET = 220 pF 0.0% 5 25 45 65 70.0% 60.0% 50.0% 40.0% 30.0% 20.0% 10.0% 0.0% 5 85 105 125 145 165 185 Iload (mA) Efficiency 4.6 4.5 4.4 4.3 4.2 4.1 4.0 3.9 3.8 3.7 3.6 Efficiency (%) Figure 11 * Efficiency and Output Voltage, CSET = 47 pF 25 45 65 85 105 125 145 165 185 Iload (mA) Figure 12 * Efficiency and Output Voltage, CSET = 100 pF Efficiency 80% 4.8 70% 4.6 60% 50% 4.4 40% 4.2 30% 4.0 20% 3.8 10% 3.6 Efficiency (%) Output Voltage (V) Output Voltage 5.0 0% 5 20 35 50 65 80 95 110 125 140 155 170 185200 Iload (mA) Page 8 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Test Circuit 1 The test circuit is used for taking efficiency and output voltage measurements in Figure 2-Figure 13. All data is taken from the input and output voltage points and includes the diode drop. Figure 14 * Test Circuit 1(*) VIN 100nF VDD OUTA VOUT TRANSFORMER MBR0520 VREG LDO VIN 470nF 10F 0.1F PE22100 MBR0520 CSET RSET CTEST OSCILLATOR OUTB EN 82K GND GND SGND Note: * Efficiency measurements are made for the full circuit and include losses from the Schottky diodes. DOC-72248-2 - (06/2017) Page 9 www.psemi.com PE22100 Transformer Driver Typical Operating Circuit The circuit in Figure 15 shows a typical configuration of PE22100 to generate an isolated power supply. Figure 15 * Typical Operating Circuit 3.3V 100nF ISOLATED 6.8V VDO OUTA VREG 1:2.2 MBR0520 LDO 3.3V 470nF 10F 0.1F PE22100 MBR0520 CSET RSET OSCILLATOR OUTB EN 100pF 82K GND GND SGND Page 10 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Theory of Operation The PE22100 is a push pull transformer driver designed for use in isolated DC-DC applications. The device includes an oscillator that drives two internal FETs via an internal gate drive circuit. The gate drive circuitry provides two complimentary output signals that turn the output transistors on and off. The oscillator's output frequency is set by RSET, and then internally divided by two to drive the transistors with a 50/50 duty cycle. Operation of a Push Pull Converter Push pull converters use center tapped transformers to transfer power from the primary to the secondary. The PE22100 contains two FETs to ground, represented by SW1 and SW2, that operate in two phases (see Figure 16). Figure 16 * PE22100 Operating Modes(*) D1 V+ 2 3 1 4 D1 V+ 2 3 1 4 D2 SW1 D2 SW2 SW1 Phase 1 SW2 Phase 2 Note: * The numbers and colors in Figure 16 correspond to the scope plot in Figure 17. In Phase 1, the primary is energized ( ) via SW2 being switched "ON" to ground. Then, during Phase 2, when SW2 is switched "OFF", the stored energy transfers ( In Phase 2, the primary is energized ( ) to the output capacitor via D2. ) via SW1 being switched "ON" to ground. Then, during Phase 1, when SW1 is switched "OFF", the stored energy transfers ( ) to the output capacitor via D1. Cycling between Phases 1 and 2 continuously ensures that current is supplied to the output capacitor. DOC-72248-2 - (06/2017) Page 11 www.psemi.com PE22100 Transformer Driver Figure 17 * Switching Waveforms of the Transformer Colors(*) Note: * The switching waveforms of transformer colors correspond to the test points in Figure 15 (RSET= 82 k and CSET = 47 pF). Page 12 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Recommended Isolation Transformers Setting the Oscillator Frequency The transformer used with the PE22100 must have sufficient energy handling capability (i.e., Et constant) to prevent saturation. The transformers in Table 6 have been tested to work with the PE22100. The oscillator is based on a relaxation oscillator charging an external capacitor CSET. The charge and discharge current are set by the RSET value (see Figure 18). This forms an oscillator that charges and discharges capacitor CSET between 1.0V and 1.5V. Table 6 * Compatible Transformers Figure 18 * Internal Oscillator Structure Application Murata Part Number Isolation VxT V/S 37.5 A 3.3-3.3V 782100/33VC 4 kV 13 3.3-5V 782100/35JVC 4 kV 30 5-5V 782100/55JVC 4 kV 37 5-3.3V 782100/53VC 4 kV 13 + - DIVIDE BY 2 CLOCK CSET 37.5 A 1.0V + - + - 1.5V Current Limit and Over-Temperature Detection The PE22100 contains a built-in current limit feature. If the current in either OUTA or OUTB to GND exceeds 600 mA, both outputs will enter over current mode. In over current mode, the outputs continue to switch on and off in antiphase, but at a reduced over-current mode of 320 mA. To calculate the oscillator frequency at CSET: Frequency = For example, the oscillator frequency at CSET for an external capacitor of 100 pF will be: Both outputs maintain this current limit for 4096 clock cycles, as set by CSET, or until the over-temperature detection threshold is crossed, whichever occurs first. After 4096 clock cycles, the current limit is checked again. * If the current limit is below the threshold, the PE22100 exits current limit mode. * If the current limit is above the current limit threshold, the PE22100 enters current limit mode for another 4096 clock cycles. 37.5 A CSET Frequency = 37.5 a 37.5 x 10-6 = = 375 kHz CSET 100 x 10-12 Internally, the PE22100 divides this value by a factor of 2, for an internal oscillator frequency of 375/2 = 187.5 kHz. This is the frequency that drives the output transistors. The PE22100 can be driven up to rates of 2 MHz at CSET. As CSET is decreased, be sure external PCB stray capacitances do not introduce errors into the oscillator frequency. If the die temperature exceeds +140 C, the internal FETs switch off, forming an open circuit at OUTA and OUTB. The temperature detector has an approximate hysteresis of +3.4 C. As the temperature falls below the threshold, OUTA and OUTB resume normal operation. DOC-72248-2 - (06/2017) Page 13 www.psemi.com PE22100 Transformer Driver Applications Information The PE22100 often is used to generate isolated supplies for transceivers in isolated interface applications, as shown in Figure 19. In this application, the output is further regulated by a linear regulator to provide an isolated regulated supply for the transceivers. The efficiency loss due to the linear regulator should be taken into account for the system efficiency calculation. At low load currents, switching transitions from the primary side can be capacitively coupled to the secondary side. Adding a zener diode across the output voltage will clamp this voltage. Figure 19 * Typical Application 5V 100 nF OUTPUT VOLTAGE VDO OUTA VREG MBR0520 LDO LDO 5V 10 F 470 nF 10 F 0.1 1 F F PE22100 MBR0520 CSET 100 pF 82 k OSCILLATOR OUTB EN GND GND SGND MICROCONTROLLER DATA ISOLATION BARRIER RSET OPTO COUPLERS Page 14 DATA TRANSCEIVER RS485 CAN RS232 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Evaluation Kit The PE22100 evaluation board (EVB) is designed on a 2.54 mm pitch to allow customers to evaluate the PE22100 on plug board. The EVB is assembled with a PE22100 driving a 782100/55JVC transformer, which is rectified by D1 and D2 to generate an isolated supply voltage. To change the operating frequency, replace C6. Figure 20 * Evaluation Kit Layout for PE22100 DOC-72248-2 - (06/2017) Page 15 www.psemi.com PE22100 Transformer Driver Pin Information Table 7 * Pin Descriptions for PE22100 This section provides pinout information for the PE22100. Figure 21 shows the pin map of this device for the available package. Table 7 provides a description for each pin. Pin No. Pin Name 1, 12 OUTA Power switch output A connection 2, 8 GND Ground 3 CSET Connect an external capacitor to ground to set the oscillator frequency OUTB VREG Internal regulator bypass should be connected to 470 pF to ground 6 RSET Connect an external 82 k to ground 7 VDD Positive input for the chip to connect to 3.3V or 5V 9, 10 OUTB Power switch output B connection SGND Power FET ground connection is a high power path and should be connected to the same potential as GND GND Exposed pad: ground for proper operation 10 5 9 Exposed Ground Pad 3 8 GND 6 11 RSET VDD 5 7 OUTB VREG CSET 1 2 EN 4 GND 4 Enable pin active high internally pulled up. Either leave floating or drive a logic low to disable the part. Do not drive EN above VREG. EN OUTA 11 12 OUTA Pin 1 Dot Marking SGND Figure 21 * Pin Configuration (Top View) Description Pad Page 16 DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Packaging Information This section provides packaging data including the moisture sensitivity level, package drawing, package marking and tape-and-reel information. Moisture Sensitivity Level The moisture sensitivity level rating for the PE22100 in the 2 x 2 x 0.5 mm QFN package is MSL1. Package Drawing Figure 22 * Package Mechanical Drawing for 2 x 2 x 0.5 mm QFN 0.25 (X12) 0.10 C 2.00 A (X2) 0.800.05 B 9 7 0.290.05 (x12) 0.475 (X12) 0.50 (x8) 0.50 6 (x8) 10 0.800.05 2.00 0.85 2.40 12 0.200.05 (X12) 0.10 C 4 1 3 (X2) 1.00 PIN #1 Identifier BOTTOM VIEW TOP VIEW 0.10 C 0.10 0.05 0.500.05 0.05 C Chamfer 0.25x45 0.85 2.40 RECOMMENDED LAND PATTERN C A B C ALL FEATURES SEATING PLANE 0.127 Ref. SIDE VIEW 0.05 MAX C Top-Marking Specification Figure 23 * Package Marking Specifications for PE22100 PPZZ YYWW PP YY WW ZZ = = = = = Pin 1 indicator Alpha code "EK" Last two digits of assembly year Assembly work week Assembly lot code (maximum two characters) DOC-72248-2 - (06/2017) Page 17 www.psemi.com PE22100 Transformer Driver Tape and Reel Specification Figure 24 * Tape and Reel Specifications for 2 x 2 x 0.5 mm QFN Direction of Feed Section A-A P1 P0 see note 1 T P2 see note 3 D1 D0 A E F see note 3 B0 A0 K0 A W0 Notes: A0 B0 K0 D0 D1 E F P0 P1 P2 T W0 2.30 2.30 0.70 2.00 + 0.1/ -0.0 1.0 min 1.75 0.10 3.50 0.05 4.00 4.00 2.00 0.05 0.30 0.05 8.00 0.3 1. 10 Sprocket hole pitch cumulative tolerance 0.2 2. Camber in compliance with EIA 481 3. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole ASME Y14.5 - 2009 Page 18 Pin 1 Device Orientation in Tape DOC-72248-2 - (06/2017) www.psemi.com PE22100 Transformer Driver Ordering Information Table 8 lists the available ordering codes for the PE22100 as well as available shipping methods. Table 8 * Order Codes for PE22100 Order Codes PE22100A-X Description Packaging Shipping Method PE22100 Transformer driver 2 x 2 mm QFN 500 units/T&R Document Categories Advance Information The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification The datasheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The datasheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). Sales Contact For additional information, contact Sales at sales@psemi.com. Disclaimers The information in this document is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this document are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. Patent Statement Peregrine products are protected under one or more of the following U.S. patents: patents.psemi.com Copyright and Trademark (c)2017, Peregrine Semiconductor Corporation. All rights reserved. The Peregrine name, logo, UTSi and UltraCMOS are registered trademarks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Product Specification www.psemi.com DOC-72248-2 - (06/2017)