BF720T1-D - ON Semiconductor

NPN Silicon Transistor

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector-Emitter Voltage VCEO 300 Vdc

Collector-Base Voltage VCBO 300 Vdc

Collector-Emitter Voltage VCER 300 Vdc

Emitter-Base Voltage VEBO 5.0 Vdc

Collector Current IC100 mAdc

Total Power Dissipation up to TA = 25°C PD1.5 Watts

Storage Temperature Range Tstg –65 to +150 °C

Junction Temperature TJ150 °C

DEVICE MARKING

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance

from Junction-to-Ambient(1) RθJA 83.3 °C/W

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)

Characteristics Symbol Min Max Unit

OFF CHARACTERISTICS

Collector-Emitter Breakdown Voltage

(IC = 1.0 mAdc, IB = 0) V(BR)CEO 300 — Vdc

Collector-Base Breakdown Voltage

(IC = 100 µAdc, IE = 0) V(BR)CBO 300 — Vdc

Collector-Emitter Breakdown Voltage

(IC = 100 µAdc, RBE = 2.7 kΩ)V(BR)CER 300 — Vdc

Emitter-Base Breakdown Voltage

(IE = 10 µAdc, IC = 0) V(BR)EBO 5.0 — Vdc

Collector-Base Cutoff Current

(VCB = 200 Vdc, IE = 0) ICBO — 10 nAdc

Collector–Emitter Cutoff Current

(VCE = 250 Vdc, RBE = 2.7 kΩ)

(VCE = 200 Vdc, RBE = 2.7 kΩ, TJ = 150°C)

ICER —

—50

10 nAdc

µAdc

1. Device mounted on a glass epoxy printed circuit board 1.575 in. x 1.575 in. x 0.059 in.; mounting pad for the collector lead min. 0.93 in2.

Preferred devices are ON Semiconductor recommended choices for future use and best overall value.

ON Semiconductor

 Semiconductor Components Industries, LLC, 2001

November, 2001 – Rev. 5 1Publication Order Number:

BF720T1/D

BF720T1

NPN SILICON

TRANSISTOR

SURFACE MOUNT

ON Semiconductor Preferred Device

CASE 318E-04, STYLE 1

SOT–223 (TO-261AA)

123

COLLECTOR 2,4

BASE

EMITTER 3

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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)

Characteristic Symbol Min Max Unit

ON CHARACTERISTICS

DC Current Gain

(IC = 25 mAdc, VCE = 20 Vdc) hFE 50 — —

Collector-Emitter Saturation Voltage

(IC = 30 mAdc, IB = 5.0 mAdc) VCE(sat) — 0.6 Vdc

DYNAMIC CHARACTERISTICS

Current–Gain — Bandwidth Product

(IC = 10 mAdc, VCE = 10 Vdc, f = 35 MHz) fT60 — MHz

Feedback Capacitance

(VCE = 30 Vdc, IC = 0, f = 1.0 MHz) Cre — 1.6 pF

Figure 1.

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C, CAPACITANCE (pF)

Figure 1. DC Current Gain

VR, REVERSE VOLTAGE (VOLTS)

0.1

100

0.1

1.0 10 1000

Ceb @ 1MHz

Figure 2. Capacitance

IC, COLLECTOR CURRENT (mA)

10070503020107.05.03.02.0

TJ = 25°C

VCE = 20 V

f = 20 MHz

f, CURRENT-GAIN  BANDWIDTH (MHz)

1.0

IC, COLLECTOR CURRENT (mA)

Figure 3. Current–Gain – Bandwidth

V, VOLTAGE (VOLTS)

1.4

0.0

1.2

1.0

0.8

0.6

0.4

0.2

100100.1 1.0

100

1.0 Ccb @ 1MHz

VBE(on) @ 25°C, VCE = 10 V

VCE(sat) @ 25°C, IC/IB = 10

VBE(sat) @ 25°C, IC/IB = 10

VCE(sat) @ 125°C, IC/IB = 10

VCE(sat) @ -55°C, IC/IB = 10

VBE(sat) @ 125°C, IC/IB = 10

VBE(sat) @ -55°C, IC/IB = 10

VBE(on) @ 125°C, VCE = 10 V

VBE(on) @ -55°C, VCE = 10 V

Figure 4. “ON” Voltages

IC, COLLECTOR CURRENT (mA)

120

0.1 1.0 10

100

hFE, DC CURRENT GAIN

TJ = +125°C

25°C

-55°C

VCE = 10 Vdc

100

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PD = TJ(max) – TA

RθJA

PD = 150°C – 25°C

83.3°C/W = 1.50 watts

INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS

Surface mount board layout is a critical portion of the total

design. The footprint for the semiconductor packages must

be the correct size to insure proper solder connection

SOT–223 POWER DISSIPATION

The power dissipation of the SOT–223 is a function of

the pad size. This can vary from the minimum pad size for

soldering t o the pad size given for maximum power dissipa-

tion. Power dissipation for a surface mount device is deter-

mined b y T J(max), the maximum rated junction temperature

of the die, RθJA, the thermal resistance from the device

junction t o ambient; and the operating temperature, TA. Us-

ing the values provided on the data sheet for the SOT–223

package, PD can be calculated as follows.

The values for the equation are found in the maximum

ratings table on the data sheet. Substituting these values into

the equation for an ambient temperature TA of 25°C, one

can calculate the power dissipation of the device which in

this case is 1.5 watts.

interface between the board and the package. With the

correct pad geometry, the packages will self align when

subjected to a solder reflow process.

0.079

2.0

0.15

3.8

0.248

6.3

0.079

2.0

0.059

1.5

0.059

1.5

0.059

1.5

0.091

2.3

inches

0.091

2.3

SOT–223

0.8 Watts

1.25 Watts* 1.5 Watts

R , Thermal Resistance, Junction

to Ambient (C/W)

A, Area (square inches)

0.0 0.2 0.4 0.6 0.8 1.0

160

140

120

100

Figure 5. Thermal Resistance versus Collector

Pad Area for the SOT-223 Package (Typical)

Board Material = 0.0625″

G10/FR4, 2 oz Copper

TA = 25°C

*Mounted on the DPAK footprint

The 83.3°C/W for the SOT-223 package assumes the

use of the recommended footprint on a glass epoxy

printed circuit board to achieve a power dissipation of 1.5

watts. There are other alternatives to achieving higher

power dissipation from the SOT-223 package. One is to

increase the area of the collector pad. By increasing the

area of the collector pad, the power dissipation can be

increased. Although the power dissipation can almost be

Another alternative would be to use a ceramic substrate

or an aluminum core board such as Thermal Clad. Using

a board material such as Thermal Clad, an aluminum core

board, the power dissipation can be doubled using the same

footprint.

doubled with this method, area is taken up on the printed

circuit board which can defeat the purpose of using

surface mount technology. A graph of RθJA versus collec-

tor pad area is shown in Figure 5.

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•The soldering temperature and time should not exceed

260°C for more than 10 seconds.

•When shifting from preheating to soldering, the

maximum temperature gradient should be 5°C or less.

•After soldering has been completed, the device should

be allowed to cool naturally for at least three minutes.

Gradual cooling should be used as the use of forced

cooling will increase the temperature gradient and

result in latent failure due to mechanical stress.

•Mechanical stress or shock should not be applied dur-

ing cooling

* Soldering a device without preheating can cause exces-

sive thermal shock and stress which can result in damage

to the device.

SOLDERING PRECAUTIONS

The melting temperature of solder is higher than the rated

temperature of the device. When the entire device is heated

to a high temperature, failure to complete soldering within

a short time could result in device failure. Therefore, the

following items should always be observed in order to

minimize the thermal stress to which the devices are

subjected.

•Always preheat the device.

•The delta temperature between the preheat and

soldering should be 100°C or less.*

•When preheating and soldering, the temperature of the

leads and the case must not exceed the maximum

temperature ratings as shown on the data sheet. When

using infrared heating with the reflow soldering

method, the difference should be a maximum of 10°C.

For any given circuit board, there will be a group of

control settings that will give the desired heat pattern. The

operator must set temperatures for several heating zones,

and a figure for belt speed. Taken together, these control

settings make up a heating “profile” for that particular

circuit board. On machines controlled by a computer, the

computer remembers these profiles from one operating

session t o the next. Figure 7 shows a typical heating profile

for use when soldering a surface mount device to a printed

circuit board. This profile will vary among soldering

systems but it is a good starting point. Factors that can

affect the profile include the type of soldering system in

use, density and types of components on the board, type of

solder used, and the type of board or substrate material

being used. This profile shows temperature versus time.

SOLDER STENCIL GUIDELINES

Prior to placing surface mount components onto a printed

circuit board, solder paste must be applied to the pads. A

solder stencil is required to screen the optimum amount of

solder paste onto the footprint. The stencil is made of brass

or stainless steel with a typical thickness of 0.008 inches.

The stencil opening size for the surface mounted package

should be the same as the pad size on the printed circuit

board, i.e., a 1:1 registration.

TYPICAL SOLDER HEATING PROFILE

The line on the graph shows the actual temperature that

might be experienced on the surface of a test board at or

near a central solder joint. The two profiles are based on a

high density and a low density board. The Vitronics

SMD310 convection/infrared reflow soldering system was

used to generate this profile. The type of solder used was

62/36/2 Tin Lead Silver with a melting point between

177–189°C. When this type of furnace is used for solder

reflow work, the circuit boards and solder joints tend to

heat first. The components on the board are then heated by

conduction. The circuit board, because it has a lar ge surface

area, absorbs the thermal energy more efficiently, then

distributes this energy to the components. Because of this

effect, the main body of a component may be up to 30

degrees cooler than the adjacent solder joints.

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STEP 1

PREHEAT

ZONE 1

RAMP"

STEP 2

VENT

SOAK"

STEP 3

HEATING

ZONES 2 & 5

RAMP"

STEP 4

HEATING

ZONES 3 & 6

SOAK"

STEP 5

HEATING

ZONES 4 & 7

SPIKE"

STEP 6

VENT

STEP 7

COOLING

200°C

150°C

100°C

50°C

TIME (3 TO 7 MINUTES TOTAL) TMAX

SOLDER IS LIQUID FOR

40 TO 80 SECONDS

(DEPENDING ON

MASS OF ASSEMBLY)

205° TO 219°C

PEAK AT

SOLDER JOINT

DESIRED CURVE FOR LOW

MASS ASSEMBLIES

100°C

150°C

160°C

140°C

Figure 6. Typical Solder Heating Profile

DESIRED CURVE FOR HIGH

MASS ASSEMBLIES

170°C

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PACKAGE DIMENSIONS

TO-261AA

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

123

0.08 (0003)

DIM

MIN MAX MIN MAX

MILLIMETERS

0.249 0.263 6.30 6.70

INCHES

B0.130 0.145 3.30 3.70

C0.060 0.068 1.50 1.75

D0.024 0.035 0.60 0.89

F0.115 0.126 2.90 3.20

G0.087 0.094 2.20 2.40

H0.0008 0.0040 0.020 0.100

J0.009 0.014 0.24 0.35

K0.060 0.078 1.50 2.00

L0.033 0.041 0.85 1.05

M0 10 0 10

S0.264 0.287 6.70 7.30



CASE 318E–04

ISSUE H

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

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BF720T1/D

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