BUZ71
BUZ71FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTORS
■TYPICAL RDS(on) = 0.06 Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW GATE CHARGE
■HIGH CURRENT CAPABILITY
■175oC OPERATING TEMPERATURE
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SOLENOID AND RELAY DRIVERS
■REGULATORS
■DC-DC & DC-AC CONVERTERS
■MOTOR CONTROL, AUDIO AMPLIFIERS
■AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.) INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
BUZ71
BUZ71FI 50 V
50 V <0.1Ω
<0.1Ω18 A
12 A
123
TO-220 ISOWATT220
May 1993
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
BUZ71 BUZ71FI
VDS Drain-source Voltage (VGS =0) 50 V
V
DGR Drain- gate Voltage (RGS =20kΩ)50V
V
GS Gate-source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C1812A
I
DM Drain Current (pulsed) 72 72 A
Ptot Total Dissipation at Tc=25o
C8035W
V
ISO Insulation Withstand Voltage (DC) 2000 V
Tstg Storage Temperature -65 to 175 oC
TjMax. Operating Junction Temperature 175 oC
DIN Humidity Category (DIN 40040) E
IEC Climatic Category (DIN IEC 68-1) 55/150/56
123
1/8
THERMAL DATA
TO-220 ISOWATT220
Rthj-case Thermal Resistance Junction-case Max 1.88 4.29 oC/W
Rthj-amb Thermal Resistance Junction-ambient Max 62.5 oC/W
AVALANCHE CHARACTERISTICS
Symbol Parameter Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 18 A
EAS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =25V) 60 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 15 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 12 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS =0 50 V
I
DSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS =MaxRating T
j=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=1mA 2.1 3 4 V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D=9A 0.06 0.1 Ω
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS =25V I
D=9A 5 8 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS =0 520
250
80
700
350
120
pF
pF
pF
SWITCHING
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
tr
td(off)
tf
Turn-on Time
Rise Time
Turn-off Delay Time
Fall Time
VDD =30V I
D=3A
R
GS =50 Ω VGS =10V 45
65
115
80
65
95
160
120
ns
ns
ns
ns
BUZ71/FI
2/8
ELECTRICAL CHARACTERISTICS (continued)
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM Source-drain Current
Source-drain Current
(pulsed)
18
72 A
A
VSD (∗) Forward On Voltage ISD =36A V
GS =0 2 V
t
rr
Qrr
Reverse Recovery
Time
Reverse Recovery
Charge
ISD = 18 A di/dt = 100 A/µs
VDD =15V T
j= 150 oC85
0.13
ns
µC
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Safe Operating Area For TO-220 Package Safe Operating Area For ISOWATT220 Package
Thermal Impedance For TO-220 Package Thermal Impedance For ISOWATT220 Package
BUZ71/FI
3/8
Derating Curve For TO-220 Package
Output Characteristics
Transconductance
Derating Curve For ISOWATT220 Package
Transfer Characteristics
Static Drain-Source On Resistance
BUZ71/FI
4/8
Maximum Drain Current vs Temperature Gate Charge vs Gate-Source Voltage
Capacitance Variation Normalized Gate Threshold Voltage vs
Temperature
Source-Drain Diode Forward CharacteristicsNormalized On Resistance vs Temperature
BUZ71/FI
5/8
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
BUZ71/FI
6/8
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.4 0.7 0.015 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
L2
A
B
D
E
H
G
L6
Ø
F
L3
G1
123
F2
F1
L7
L4
ISOWATT220 MECHANICAL DATA
P011G
BUZ71/FI
7/8
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information norforany infringementof patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder anypatent or patent rights of SGS-THOMSON Microelectronics.Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts arenot authorizedfor use as criticalcomponents inlife supportdevices or systemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All RightsReserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia -Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland - Taiwan - Thailand - UnitedKingdom - U.S.A
BUZ71/FI
8/8
IRF540
IRF540FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTORS
■TYPICAL RDS(on) = 0.045 Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW GATE CHARGE
■HIGH CURRENT CAPABILITY
■175oC OPERATING TEMPERATURE
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SOLENOID AND RELAY DRIVERS
■REGULATORS
■DC-DC & DC-AC CONVERTERS
■MOTOR CONTROL, AUDIO AMPLIFIERS
■AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
123
TO-220 ISOWATT220
July 1993
TYPE VDSS RDS(on) ID
IRF540
IRF540FI 100 V
100 V < 0.077 Ω
< 0.077 Ω30 A
16 A
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
IRF540 IRF540FI
VDS Drain-source Voltage (VGS =0) 100 V
V
DGR Drain- gate Voltage (RGS =20kΩ)100V
V
GS Gate-source Voltage ±20 V
IDDrain Current (cont.) at Tc=25o
C3016A
I
D
Drain Current (cont.) at Tc=100o
C2111A
I
DM(•) Drain Current (pulsed) 120 120 A
Ptot Total Dissipation at Tc=25o
C 150 45 W
Derating Factor 1 0.3 W/oC
VISO Insulation Withstand Voltage (DC) 2000 V
Tstg Storage Temperature -65 to 175 oC
TjMax. Operating Junction Temperature 175 oC
(•) Pulsewidth limited by safe operating area
123
1/9
THERMAL DATA
TO-220 ISOWATT220
Rthj-case Thermal Resistance Junction-case Max 1 3.33 oC/W
Rthj-amb
Rthc-s
Tl
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
62.5
0.5
300
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 30 A
EAS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =25V) 200 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 50 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 21 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS = 0 100 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA22.94V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D= 17 A 0.045 0.077 Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max VGS =10V 30 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=17A 10 18 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 1600
460
140
2100
600
200
pF
pF
pF
IRF540/FI
2/9
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING RESISTIVE LOAD
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
tr
td(off)
tf
Turn-on Time
Rise Time
Turn-off Delay Time
Fall Time
VDD =50V I
D=5A
R
i=50 Ω VGS =10V
(see test circuit)
55
110
290
125
80
160
410
180
ns
ns
ns
ns
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ID=30A V
GS =10V
V
DD = Max Rating x 0.8
(see test circuit)
55
11
26
80 nC
nC
nC
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
30
120 A
A
VSD (∗) Forward On Voltage ISD =30A V
GS =0 1.6 V
t
rr
Qrr
Reverse Recovery
Time
Reverse Recovery
Charge
ISD = 30 A di/dt = 100 A/µs
Tj=150o
CV
DD =50V 140
0.7
ns
µC
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area for TO-220 Package Safe Operating Area for ISOWATT220 Package
IRF540/FI
3/9
Thermal Impedance for TO-220 Package
Derating Curve for TO-220 Package
Output Characteristics
Thermal Impedance for ISOWATT220 Package
Derating Curve for ISOWATT220 Package
Transfer Characteristics
IRF540/FI
4/9
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs
Temperature
IRF540/FI
5/9
Source-drain Diode Forward Characteristics
Unclamped Inductive Load Test Circuit Unclamped Inductive Waveforms
Switching Time Test Circuit Gate Charge Test Circuit
IRF540/FI
6/9
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
IRF540/FI
7/9
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.4 0.7 0.015 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
L2
A
B
D
E
H
G
L6
Ø
F
L3
G1
123
F2
F1
L7
L4
ISOWATT220 MECHANICAL DATA
P011G
IRF540/FI
8/9
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder anypatent or patent rights of SGS-THOMSON Microelectronics.Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts arenot authorizedfor use as criticalcomponents inlife supportdevices or systemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All RightsReserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia -Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland - Taiwan - Thailand - UnitedKingdom - U.S.A
IRF540/FI
9/9
IRF840/FI
IRF841/FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTORS
■TYPICAL RDS(on) = 0.74 Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SWITCH MODE POWERSUPPLIES (SMPS)
■CHOPPER REGULATORS, CONVERTERS,
MOTOR CONTROL, LIGHTING FOR
INDUSTRIAL AND CONSUMER
ENVIRONMENT INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
IRF840
IRF840FI 500 V
500 V <0.85Ω
<0.85Ω8A
4.5 A
IRF841
IRF841FI 450 V
450 V <0.85Ω
<0.85Ω8A
4.5 A
123
TO-220 ISOWATT220
May 1993
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
IRF
840 841 840FI 841FI
VDS Drain-source Voltage (VGS = 0) 500 450 500 450 V
VDGR Drain- gate Voltage (RGS =20kΩ) 500 450 500 450 V
VGS Gate-source Voltage ±20 V
IDDrain Current (cont.) at Tc=25o
C884.54.5A
I
D
Drain Current (cont.) at Tc= 100 oC 5.1 5.1 2.8 2.8 A
IDM(•) Drain Current (pulsed) 32 32 32 32 A
Ptot Total Dissipation at Tc=25o
C 125 40 W
Derating Factor 1 0.32 W/oC
VISO Insulation Withstand Voltage (DC) 2000
Tstg Storage Temperature -65 to 150 oC
TjMax. Operating Junction Temperature 150 oC
(•) Pulsewidth limited by safe operating area
123
1/10
THERMAL DATA
TO-220 ISOWATT220
Rthj-case Thermal Resistance Junction-case Max 1 3.12 oC/W
Rthj-amb
Rthc-s
Tl
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
62.5
0.5
300
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 8A
E
AS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =25V) 510 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 13 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 5.1 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS =0
for IRF840/840FI
for IRF841/841FI 500
450 V
V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA234V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D=4.4A 0.74 0.85 Ω
I
D(on) On State Drain Current VDS >I
D(on) xR
DS(on)max VGS =10V 8 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=4.4A 4.9 6 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 1100
190
80
1500
240
110
pF
pF
pF
IRF840/FI - IRF841/FI
2/10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING RESISTIVE LOAD
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
tr
td(off)
tf
Turn-on Time
Rise Time
Turn-off Delay Time
Fall Time
VDD =200V I
D=4A
R
i=4.7 Ω
(see test circuit)
40
35
80
20
50
43
100
25
ns
ns
ns
ns
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
ID=8A V
GS =10V
V
DD = Max Rating x 0.8
(see test circuit)
75
9
39
95 nC
nC
nC
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
8
32 A
A
VSD (∗) Forward On Voltage ISD =8A V
GS =0 2 V
t
rr
Qrr
Reverse Recovery
Time
Reverse Recovery
Charge
ISD = 8 A di/dt = 100 A/µs
VDD = 100 V Tj= 150 oC700
12
ns
µC
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area for TO-220 Safe Operating Area for ISOWATT220
IRF840/FI - IRF841/FI
3/10
Thermal Impedance for TO-220
Derating Curve for TO-220
Output Characteristics
Thermal Impedance for ISOWATT220
Derating Curve for ISOWATT220
Output Characteristics
IRF840/FI - IRF841/FI
4/10
Transfer Characteristics Transconductance
Static Drain-source On Resistance Maximum Drain Current vs Temperature
Capacitance VariationsGate Charge vs Gate-source Voltage
IRF840/FI - IRF841/FI
5/10
Normalized Breakdown Voltage vs Temperature Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
Unclamped Inductive Load Test Circuit Unclamped Inductive Waveforms
IRF840/FI - IRF841/FI
6/10
Gate Charge Test CircuitSwitching Time Test Circuit
IRF840/FI - IRF841/FI
7/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
IRF840/FI - IRF841/FI
8/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.4 0.7 0.015 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
L2
A
B
D
E
H
G
L6
Ø
F
L3
G1
123
F2
F1
L7
L4
ISOWATT220 MECHANICAL DATA
P011G
IRF840/FI - IRF841/FI
9/10
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder anypatent or patent rights of SGS-THOMSON Microelectronics.Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts arenot authorizedfor use as criticalcomponents inlife supportdevices or systemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All RightsReserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia -Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland - Taiwan - Thailand - UnitedKingdom - U.S.A
IRF840/FI - IRF841/FI
10/10
STE150N10
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
■HIGH CURRENT POWER MODULE
■AVALANCHE RUGGED TECHNOLOGY
(SEE STH60N10 FOR RATING)
■VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
■EASY TO MOUNT
■SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
■EXTREMELY LOW Rth JUNCTION TO CASE
■VERY LOW DRAIN TO CASE CAPACITANCE
■VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
■ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
■SMPS & UPS
■MOTOR CONTROL
■WELDING EQUIPMENT
■OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
July 1993
TYPE VDSS RDS(on) ID
STE150N10 100 V < 0.009 Ω150 A
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDS Drain-Source Voltage (VGS = 0) 100 V
VDGR Drain-Gate Voltage (RGS =20kΩ) 100 V
VGS Gate-Source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C 150 A
IDDrain Current (continuous) at Tc=100o
C 100 A
IDM(•) Drain Current (pulsed) 450 A
Ptot Total Dissipation at Tc=25o
C 410 W
Derating Factor 3.3 W/oC
Tstg Storage Temperature -55 to 150 oC
TjMax. Operating Junction Temperature 150 oC
VISO Insulation Withstand Voltage (AC-RMS) 2500 V
(•) Pulse width limited by safe operating area
3
2
1
4
INTERNAL SCHEMATIC DIAGRAM
ISOTOP
1/8
THERMAL DATA
Rthj-case
Rthc-h Thermal Resistance Junction-case Max
Thermal Resistance Case-heatsink With Conductive
Grease Applied Max
0.3
0.05
oC/W
oC/W
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=1mA V
GS = 0 V 100 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C300
1.5 µA
mA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±300 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=1mA 2 4 V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D= 90 A 0.009 Ω
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS =15V I
D=90A 85 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS =0V 13.5
3600
900
nF
pF
pF
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =50V I
D=75A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 1)
80
140 ns
ns
(di/dt)on Turn-on Current Slope VDD =80V I
D= 150 A
RG=4.7ΩV
GS =10V
(see test circuit, figure 3)
700 A/µs
QgTotal Gate Charge VDD =80V I
D=150A
V
GS =10V 320 nC
STE150N10
2/8
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =80V I
D= 150 A
RG=4.7ΩV
GS =10V
(see test circuit, figure 3)
90
340
400
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
150
450 A
A
VSD (∗) Forward On Voltage ISD =150A V
GS =0 1.6 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD = 150 A di/dt = 100 A/µs
VDD =50V T
j=150o
C
(see test circuit, figure 3)
230
1750
15
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area Thermal Impedance
STE150N10
3/8
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
STE150N10
4/8
Capacitance Variations Normalized Gate Threshold Voltage vs
Temperature
Normalized Breakdown Voltage vs Temperature Normalized On Resistance vs Temperature
Turn-off Drain-source Voltage SlopeTurn-on Current Slope
STE150N10
5/8
Cross-over Time Source-drain Diode Forward Characteristics
Fig. 1: Switching Times Test Circuits For
Resistive Load Fig. 2: Gate Charge Test Circuit
Fig. 3: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STE150N10
6/8
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 11.8 12.2 0.466 0.480
B 8.9 9.1 0.350 0.358
C 1.95 2.05 0.076 0.080
D 0.75 0.85 0.029 0.033
E 12.6 12.8 0.496 0.503
F 25.15 25.5 0.990 1.003
G 31.5 31.7 1.240 1.248
H 4 0.157
J 4.1 4.3 0.161 0.169
K 14.9 15.1 0.586 0.594
L 30.1 30.3 1.185 1.193
M 37.8 38.2 1.488 1.503
N 4 0.157
O 7.8 8.2 0.307 0.322
P 5.5 0.216
B
E
H
O
N
J
K
L
M
F
A
C
G
D
ISOTOP MECHANICAL DATA
0041565
STE150N10
7/8
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunderany patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorizedforuse ascritical componentsin lifesupport devices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France- Germany - HongKong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STE150N10
8/8
STE15N100
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
■HIGH CURRENT POWER MODULE
■AVALANCHE RUGGED TECHNOLOGY
(SEE STH6N100 FOR RATING)
■VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
■EASY TO MOUNT
■SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
■EXTREMELY LOW Rth JUNCTION TO CASE
■VERY LOW DRAIN TO CASE CAPACITANCE
■VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
■ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
■SMPS & UPS
■MOTOR CONTROL
■WELDING EQUIPMENT
■OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
July 1993
TYPE VDSS RDS(on) ID
STE15N100 1000 V < 0.77 Ω15 A
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDS Drain-Source Voltage (VGS = 0) 1000 V
VDGR Drain-Gate Voltage (RGS =20kΩ) 1000 V
VGS Gate-Source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C15A
I
D
Drain Current (continuous) at Tc=100o
C9.5A
I
DM(•) Drain Current (pulsed) 60 A
Ptot Total Dissipation at Tc=25o
C 400 W
Derating Factor 3.2 W/oC
Tstg Storage Temperature -55 to 150 oC
TjMax. Operating Junction Temperature 150 oC
VISO Insulation Withstand Voltage (AC-RMS) 2500 V
(•) Pulse width limited by safe operating area
3
2
1
4
INTERNAL SCHEMATIC DIAGRAM
ISOTOP
1/8
THERMAL DATA
Rthj-case
Rthc-h Thermal Resistance Junction-case Max
Thermal Resistance Case-heatsink With Conductive
Grease Applied Max
0.31
0.05
oC/W
oC/W
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=1mA V
GS = 0 V 1000 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C500
1.5 µA
mA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±300 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=1mA 2 4 V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D=9A 0.77 Ω
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS =15V I
D=9A 8 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS =0V 7
850
250
nF
pF
pF
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =500V I
D=9A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 1)
65
78 ns
ns
(di/dt)on Turn-on Current Slope VDD = 800 V ID=15A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 3)
570 A/µs
QgTotal Gate Charge VDD = 800 V ID=15A
V
GS =10V 375 nC
STE15N100
2/8
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD = 800 V ID=15A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 3)
75
18
105
95
25
136
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
15
60 A
A
VSD (∗) Forward On Voltage ISD =15A V
GS =0 2.5 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD =15A di/dt=100A/µs
V
DD = 100 V Tj=150o
C
(see test circuit, figure 3)
1150
30
52
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area Thermal Impedance
STE15N100
3/8
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
STE15N100
4/8
Capacitance Variations Normalized Gate Threshold Voltage vs
Temperature
Normalized Breakdown Voltage vs Temperature Normalized On Resistance vs Temperature
Turn-off Drain-source Voltage SlopeTurn-on Current Slope
STE15N100
5/8
Cross-over Time Source-drain Diode Forward Characteristics
Fig. 1: Switching Times Test Circuits For
Resistive Load Fig. 2: Gate Charge Test Circuit
Fig. 3: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STE15N100
6/8
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 11.8 12.2 0.466 0.480
B 8.9 9.1 0.350 0.358
C 1.95 2.05 0.076 0.080
D 0.75 0.85 0.029 0.033
E 12.6 12.8 0.496 0.503
F 25.15 25.5 0.990 1.003
G 31.5 31.7 1.240 1.248
H 4 0.157
J 4.1 4.3 0.161 0.169
K 14.9 15.1 0.586 0.594
L 30.1 30.3 1.185 1.193
M 37.8 38.2 1.488 1.503
N 4 0.157
O 7.8 8.2 0.307 0.322
P 5.5 0.216
B
E
H
O
N
J
K
L
M
F
A
C
G
D
ISOTOP MECHANICAL DATA
0041565
STE15N100
7/8
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin lifesupport devices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France- Germany - HongKong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STE15N100
8/8
STE47N50
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
■HIGH CURRENT POWER MODULE
■AVALANCHE RUGGED TECHNOLOGY
(SEE IRFP450 FOR RATING)
■VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
■EASY TO MOUNT
■SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
■EXTREMELY LOW Rth JUNCTION TO CASE
■VERY LOW DRAIN TO CASE CAPACITANCE
■VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
■ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
■SMPS & UPS
■MOTOR CONTROL
■WELDING EQUIPMENT
■OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
July 1993
TYPE VDSS RDS(on) ID
STE47N50 500 V < 0.1 Ω47 A
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDS Drain-Source Voltage (VGS = 0) 500 V
VDGR Drain-Gate Voltage (RGS =20kΩ) 500 V
VGS Gate-Source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C47A
I
D
Drain Current (continuous) at Tc=100o
C30A
I
DM(•) Drain Current (pulsed) 188 A
Ptot Total Dissipation at Tc=25o
C 450 W
Derating Factor 3.6 W/oC
Tstg Storage Temperature -55 to 150 oC
TjMax. Operating Junction Temperature 150 oC
VISO Insulation Withstand Voltage (AC-RMS) 2500 V
(•) Pulse width limited by safe operating area
3
2
1
4
INTERNAL SCHEMATIC DIAGRAM
ISOTOP
1/8
THERMAL DATA
Rthj-case
Rthc-h Thermal Resistance Junction-case Max
Thermal Resistance Case-heatsink With Conductive
Grease Applied Max
0.27
0.05
oC/W
oC/W
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=1mA V
GS = 0 V 500 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C400
2µA
mA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±400 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=1mA 2 4 V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D=28A 0.1 Ω
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS =15V I
D=28A 28 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS =0V 12
2400
1000
nF
pF
pF
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =250V I
D=28A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 1)
90
130 ns
ns
(di/dt)on Turn-on Current Slope VDD = 400 V ID=45A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 3)
550 A/µs
QgTotal Gate Charge VDD = 400 V ID=45A
V
GS =10V 550 nC
STE47N50
2/8
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD = 400 V ID=45A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 3)
120
55
170
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
47
188 A
A
VSD (∗) Forward On Voltage ISD =47A V
GS =0 1.4 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD =47A di/dt=100A/µs
V
DD = 100 V Tj=150o
C
(see test circuit, figure 3)
1100
40
73
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area Thermal Impedance
STE47N50
3/8
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
STE47N50
4/8
Capacitance Variations Normalized Gate Threshold Voltage vs
Temperature
Normalized Breakdown Voltage vs Temperature Normalized On Resistance vs Temperature
Turn-off Drain-source Voltage SlopeTurn-on Current Slope
STE47N50
5/8
Cross-over Time Source-drain Diode Forward Characteristics
Fig. 1: Switching Times Test Circuits For
Resistive Load Fig. 2: Gate Charge Test Circuit
Fig. 3: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STE47N50
6/8
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 11.8 12.2 0.466 0.480
B 8.9 9.1 0.350 0.358
C 1.95 2.05 0.076 0.080
D 0.75 0.85 0.029 0.033
E 12.6 12.8 0.496 0.503
F 25.15 25.5 0.990 1.003
G 31.5 31.7 1.240 1.248
H 4 0.157
J 4.1 4.3 0.161 0.169
K 14.9 15.1 0.586 0.594
L 30.1 30.3 1.185 1.193
M 37.8 38.2 1.488 1.503
N 4 0.157
O 7.8 8.2 0.307 0.322
P 5.5 0.216
B
E
H
O
N
J
K
L
M
F
A
C
G
D
ISOTOP MECHANICAL DATA
0041565
STE47N50
7/8
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin lifesupport devices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France- Germany - HongKong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STE47N50
8/8
STE50N40
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR IN ISOTOP PACKAGE
■HIGH CURRENT POWER MODULE
■AVALANCHE RUGGED TECHNOLOGY
(SEE IRFP350 FOR RATING)
■VERY LARGE SOA - LARGE PEAK POWER
CAPABILITY
■EASY TO MOUNT
■SAME CURRENT CAPABILITY FOR THE
TWO SOURCE TERMINALS
■EXTREMELY LOW Rth JUNCTION TO CASE
■VERY LOW DRAIN TO CASE CAPACITANCE
■VERY LOW INTERNAL PARASITIC
INDUCTANCE (TYPICALLY < 5 nH)
■ISOLATED PACKAGE UL RECOGNIZED
(FILE No E81743)
INDUSTRIAL APPLICATIONS:
■SMPS & UPS
■MOTOR CONTROL
■WELDING EQUIPMENT
■OUTPUT STAGE FOR PWM, ULTRASONIC
CIRCUITS
July 1993
TYPE VDSS RDS(on) ID
STE50N40 400 V < 0.075 Ω50 A
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDS Drain-Source Voltage (VGS = 0) 400 V
VDGR Drain-Gate Voltage (RGS =20kΩ) 400 V
VGS Gate-Source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C50A
I
D
Drain Current (continuous) at Tc=100o
C34A
I
DM(•) Drain Current (pulsed) 200 A
Ptot Total Dissipation at Tc=25o
C 450 W
Derating Factor 3.6 W/oC
Tstg Storage Temperature -55 to 150 oC
TjMax. Operating Junction Temperature 150 oC
VISO Insulation Withstand Voltage (AC-RMS) 2500 V
(•) Pulse width limited by safe operating area
3
2
1
4
INTERNAL SCHEMATIC DIAGRAM
ISOTOP
1/6
THERMAL DATA
Rthj-case
Rthc-h Thermal Resistance Junction-case Max
Thermal Resistance Case-heatsink With Conductive
Grease Applied Max
0.27
0.05
oC/W
oC/W
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=1mA V
GS = 0 V 400 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C400
2µA
mA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±400 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=1mA 2 4 V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D= 30 A 0.075 Ω
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS =15V I
D=30A 28 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS =0V 12
2400
1000
nF
pF
pF
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =200V I
D=30A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 1)
80
120 ns
ns
(di/dt)on Turn-on Current Slope VDD = 320 V ID=50A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 3)
1000 A/µs
QgTotal Gate Charge VDD = 320 V ID=50A
V
GS =10V 580 nC
STE50N40
2/6
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD = 320 V ID=50A
R
G=4.7ΩV
GS =10V
(see test circuit, figure 3)
90
40
135
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
50
200 A
A
VSD (∗) Forward On Voltage ISD =50A V
GS =0 1.6 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD =50A di/dt=100A/µs
V
DD = 100 V Tj=150o
C
(see test circuit, figure 3)
980
31.8
65
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area Thermal Impedance
STE50N40
3/6
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
STE50N40
4/6
Capacitance Variations Normalized Gate Threshold Voltage vs
Temperature
Normalized Breakdown Voltage vs Temperature Normalized On Resistance vs Temperature
Turn-off Drain-source Voltage SlopeTurn-on Current Slope
STE50N40
5/6
Cross-over Time Source-drain Diode Forward Characteristics
Fig. 1: Switching Times Test Circuits For
Resistive Load Fig. 2: Gate Charge Test Circuit
Fig. 3: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STE50N40
6/6
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 11.8 12.2 0.466 0.480
B 8.9 9.1 0.350 0.358
C 1.95 2.05 0.076 0.080
D 0.75 0.85 0.029 0.033
E 12.6 12.8 0.496 0.503
F 25.15 25.5 0.990 1.003
G 31.5 31.7 1.240 1.248
H 4 0.157
J 4.1 4.3 0.161 0.169
K 14.9 15.1 0.586 0.594
L 30.1 30.3 1.185 1.193
M 37.8 38.2 1.488 1.503
N 4 0.157
O 7.8 8.2 0.307 0.322
P 5.5 0.216
B
E
H
O
N
J
K
L
M
F
A
C
G
D
ISOTOP MECHANICAL DATA
0041565
STE50N40
7/6
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin lifesupport devices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France- Germany - HongKong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STE50N40
8/6
STH6N100
STH6N100FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
■TYPICAL RDS(on) = 1.75 Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW INPUT CAPACITANCE
■LOW GATE CHARGE
■APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SWITCH MODE POWERSUPPLIES (SMPS)
■CONSUMER AND INDUSTRIAL LIGHTING
■DC-AC INVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLY (UPS)
INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
STH6N100
STH6N100FI 1000 V
1000 V <2Ω
<2Ω6A
3.7 A
123
TO-218 ISOWATT218
May 1993
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STH6N100 STH6N100
VDS Drain-source Voltage (VGS = 0) 1000 V
VDGR Drain- gate Voltage (RGS =20kΩ) 1000 V
VGS Gate-source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C63.7A
I
D
Drain Current (continuous) at Tc=100o
C3.7 2.3A
I
DM(•) Drain Current (pulsed) 24 24 A
Ptot Total Dissipation at Tc=25o
C 180 70 W
Derating Factor 1.44 0.56 W/oC
VISO Insulation Withstand Voltage (DC) 4000 V
Tstg Storage Temperature -65 to 150 oC
TjMax. Operating Junction Temperature 150 oC
(•) Pulsewidth limited by safe operating area
123
1/10
THERMAL DATA
TO-218 ISOWATT218
Rthj-case Thermal Resistance Junction-case Max 0.69 1.78 oC/W
Rthj-amb
Rthc-sink
Tl
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
30
0.1
300
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 6A
E
AS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =25V) 850 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 16 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 3.7 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS = 0 1000 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA234V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D=3A
V
GS =10V I
D=3A T
c=100
o
C1.75 2
4Ω
Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max
VGS =10V 6A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=3A 4 5.5 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 2150
260
105
2800
330
130
pF
pF
pF
STH6N100/FI
2/10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =500V I
D=3A
R
G=50 Ω VGS =10V
(see test circuit, figure 3)
70
210 90
280 ns
ns
(di/dt)on Turn-on Current Slope VDD =800V I
D=6A
R
G=50ΩV
GS =10V
(see test circuit, figure 5)
180 A/µs
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 400 V ID=6A V
GS =10V 125
15
55
150 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =800V I
D=6A
R
G=50 Ω VGS =10V
(see test circuit, figure 5)
190
50
265
250
65
345
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
6
24 A
A
VSD (∗) Forward On Voltage ISD =6A V
GS =0 2 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD =6A di/dt=100A/µs
V
DD = 100 V Tj=150o
C
(see test circuit, figure 5)
1100
31
57
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas For TO-218 Safe Operating Areas For ISOWATT218
STH6N100/FI
3/10
Thermal Impedeance For TO-218
Derating Curve For TO-218
Output Characteristics
Thermal Impedance For ISOWATT218
Derating Curve For ISOWATT218
Transfer Characteristics
STH6N100/FI
4/10
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs
Temperature
STH6N100/FI
5/10
Turn-on Current Slope Turn-off Drain-source Voltage Slope
Cross-over Time Switching Safe Operating Area
Accidental Overload Area Source-drain Diode Forward Characteristics
STH6N100/FI
6/10
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Resistive Load Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
Fig. 1: Unclamped Inductive Load Test Circuits
STH6N100/FI
7/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.7 4.9 0.185 0.193
C 1.17 1.37 0.046 0.054
D 2.5 0.098
E 0.5 0.78 0.019 0.030
F 1.1 1.3 0.043 0.051
G 10.8 11.1 0.425 0.437
H 14.7 15.2 0.578 0.598
L2 – 16.2 – 0.637
L3 18 0.708
L5 3.95 4.15 0.155 0.163
L6 31 1.220
R – 12.2 – 0.480
Ø 4 4.1 0.157 0.161
R
A
C
D
E
H
F
G
L6
Ø
L3
L2
L5
123
TO-218 (SOT-93) MECHANICAL DATA
P025A
STH6N100/FI
8/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 5.35 5.65 0.210 0.222
C 3.3 3.8 0.130 0.149
D 2.9 3.1 0.114 0.122
D1 1.88 2.08 0.074 0.081
E 0.45 1 0.017 0.039
F 1.05 1.25 0.041 0.049
G 10.8 11.2 0.425 0.441
H 15.8 16.2 0.622 0.637
L1 20.8 21.2 0.818 0.834
L2 19.1 19.9 0.752 0.783
L3 22.8 23.6 0.897 0.929
L4 40.5 42.5 1.594 1.673
L5 4.85 5.25 0.190 0.206
L6 20.25 20.75 0.797 0.817
M 3.5 3.7 0.137 0.145
N 2.1 2.3 0.082 0.090
U 4.6 0.181
L1
A
C
D
E
H
G
M
F
L6
123
U
L5
L4
D1
N
L3
L2
ISOWATT218 MECHANICAL DATA
P025C
STH6N100/FI
9/10
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin lifesupport devices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France- Germany - HongKong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STH6N100/FI
10/10
STH8N80/FI
STW8N80
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTORS
■TYPICAL RDS(on) = 0.98 Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW INPUT CAPACITANCE
■LOW GATE CHARGE
■APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SWITCH MODE POWERSUPPLIES (SMPS)
■CONSUMER AND INDUSTRIAL LIGHTING
■DC-AC INVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLY (UPS)
INTERNAL SCHEMATIC DIAGRAM
May 1993
TYPE VDSS RDS(on) ID
STH8N80
STH8N80FI
STW8N80
800 V
800 V
800 V
<1.2Ω
<1.2Ω
<1.2 Ω
8.2 A
5.1 A
8.2 A
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STH/STW8N80 STH8N80FI
VDS Drain-source Voltage (VGS =0) 800 V
V
DGR Drain- gate Voltage (RGS =20kΩ)800V
V
GS Gate-source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C8.25.1A
I
D
Drain Current (continuous) at Tc=100o
C5.1 3.2A
I
DM(•) Drain Current (pulsed) 35 35 A
Ptot Total Dissipation at Tc=25o
C 180 70 W
Derating Factor 1.44 0.56 W/oC
VISO Insulation Withstand Voltage (DC) 4000 V
Tstg Storage Temperature -65 to 150 oC
TjMax. Operating Junction Temperature 150 oC
(•) Pulsewidth limited by safe operating area
123
TO-218 ISOWATT218 123
123
TO-247
1/11
THERMAL DATA
TO-218/TO-247 ISOWATT218
Rthj-case Thermal Resistance Junction-case Max 0.69 1.78 oC/W
Rthj-amb
Rthc-sink
Tl
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
30
0.1
300
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 8.2 A
EAS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =50V) 800 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 18 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 4.5 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS = 0 800 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA234V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D=4A
V
GS =10V I
D=4A T
c=100
o
C0.98 1.2
2.4 Ω
Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max
VGS =10V 8.2 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=4A 4 7 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 2100
270
115
2700
350
150
pF
pF
pF
STH8N80/FI - STW8N80
2/11
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =400V I
D=4A
R
G=50 Ω VGS =10V
(see test circuit, figure 3)
90
280 120
350 ns
ns
(di/dt)on Turn-on Current Slope VDD =640V I
D=8A
R
G=50 Ω VGS =10V
(see test circuit, figure 5)
145 A/µs
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 400 V ID=8A V
GS =10V 125
12
65
170 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =640V I
D=8A
R
G=50 Ω VGS =10V
(see test circuit, figure 5)
160
50
235
200
65
300
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
8.2
35 A
A
VSD (∗) Forward On Voltage ISD =8.2A V
GS =0 2.5 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD =8.2A di/dt=100A/µs
V
R=100V T
j= 150 oC
(see test circuit, figure 5)
900
24.8
55
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas For TO-218 and TO-247 Safe Operating Areas For ISOWATT218
STH8N80/FI - STW8N80
3/11
Thermal Impedeance For TO-218 and TO-247
Derating Curve For TO-218 and TO-247
Output Characteristics
Thermal Impedance For ISOWATT218
Derating Curve For ISOWATT218
Transfer Characteristics
STH8N80/FI - STW8N80
4/11
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs
Temperature
STH8N80/FI - STW8N80
5/11
Turn-on Current Slope Turn-off Drain-source Voltage Slope
Cross-over Time Switching Safe Operating Area
Accidental Overload Area Source-drain Diode Forward Characteristics
STH8N80/FI - STW8N80
6/11
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Resistive Load Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
Fig. 1: Unclamped Inductive Load Test Circuits
STH8N80/FI - STW8N80
7/11
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.7 5.3 0.185 0.208
A1 2.87 0.113
A2 1.5 2.5 0.059 0.098
b 1 1.4 0.039 0.055
b1 2.25 0.088
b2 3.05 3.43 0.120 0.135
C 0.4 0.8 0.015 0.031
D 20.4 21.18 0.803 0.833
e 5.43 5.47 0.213 0.215
E 15.3 15.95 0.602 0.628
L 15.57 0.613
L1 3.7 4.3 0.145 0.169
Q 5.3 5.84 0.208 0.230
ØP 3.5 3.71 0.137 0.146
D
Q
ø
A
A2
A1
C
E
e
b1
b
b2
L
L1
TO-247 MECHANICAL DATA
STH8N80/FI - STW8N80
8/11
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.7 4.9 0.185 0.193
C 1.17 1.37 0.046 0.054
D 2.5 0.098
E 0.5 0.78 0.019 0.030
F 1.1 1.3 0.043 0.051
G 10.8 11.1 0.425 0.437
H 14.7 15.2 0.578 0.598
L2 – 16.2 – 0.637
L3 18 0.708
L5 3.95 4.15 0.155 0.163
L6 31 1.220
R – 12.2 – 0.480
Ø 4 4.1 0.157 0.161
R
A
C
D
E
H
F
G
L6
Ø
L3
L2
L5
123
TO-218 (SOT-93) MECHANICAL DATA
P025A
STH8N80/FI - STW8N80
9/11
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 5.35 5.65 0.210 0.222
C 3.3 3.8 0.130 0.149
D 2.9 3.1 0.114 0.122
D1 1.88 2.08 0.074 0.081
E 0.45 1 0.017 0.039
F 1.05 1.25 0.041 0.049
G 10.8 11.2 0.425 0.441
H 15.8 16.2 0.622 0.637
L1 20.8 21.2 0.818 0.834
L2 19.1 19.9 0.752 0.783
L3 22.8 23.6 0.897 0.929
L4 40.5 42.5 1.594 1.673
L5 4.85 5.25 0.190 0.206
L6 20.25 20.75 0.797 0.817
M 3.5 3.7 0.137 0.145
N 2.1 2.3 0.082 0.090
U 4.6 0.181
L1
A
C
D
E
H
G
M
F
L6
123
U
L5
L4
D1
N
L3
L2
ISOWATT218 MECHANICAL DATA
P025C
STH8N80/FI - STW8N80
10/11
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin lifesupport devices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France- Germany - HongKong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STH8N80/FI - STW8N80
11/11
STP10NA40
STP10NA40FI
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
■TYPICAL RDS(on) = 0.46 Ω
■±30V GATE TO SOURCE VOLTAGE RATING
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW INTRINSIC CAPACITANCES
■GATE GHARGE MINIMIZED
■REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The
optimized cell layout coupled with a new
proprietary edge termination concur to give the
device low RDS(on) and gate charge, unequalled
ruggedness and superior switching performance.
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SWITCH MODE POWERSUPPLIES (SMPS)
■DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
STP10NA40
STP10NA40FI 400 V
400 V <0.55Ω
<0.55Ω10 A
6A
123
TO-220 ISOWATT220
January 1994
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP10NA40 STP10NA40FI
VDS Drain-source Voltage (VGS =0) 400 V
V
DGR Drain-gate Voltage (RGS =20kΩ)400V
V
GS Gate-source Voltage ±30 V
IDDrain Current (continuous) at Tc=25o
C106A
I
D
Drain Current (continuous) at Tc=100o
C6.3 3.8A
I
DM(•) Drain Current (pulsed) 40 40 A
Ptot Total Dissipation at Tc=25o
C 125 45 W
Derating Factor 1 0.36 W/oC
VISO Insulation Withstand Voltage (DC) 2000 V
Tstg Storage Temperature -65 to 150 oC
TjMax. Operating Junction Temperature 150 oC
(•) Pulsewidth limited by safe operating area
123
1/10
THERMAL DATA
TO-220 ISOWATT220
Rthj-case Thermal Resistance Junction-case Max 1 2.78 oC/W
Rthj-amb
Rthc-sink
Tl
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
62.5
0.5
300
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 10 A
EAS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =50V) 500 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 20 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 6.3 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS = 0 400 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 30 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA 2.25 3 3.75 V
RDS(on) Static Drain-source On
Resistance VGS =10V I
D=5A
V
GS =10V I
D=5A T
c=100
o
C0.46 0.55
1.1 Ω
Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max
VGS =10V 10 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=5A 5 7.2 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 1180
200
55
1600
260
75
pF
pF
pF
STP10NA40/FI
2/10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =200V I
D=5A
R
G=47 Ω VGS =10V
(see test circuit, figure 3)
35
115 50
155 ns
ns
(di/dt)on Turn-on Current Slope VDD =320V I
D=10A
R
G=47 Ω VGS =10V
(see test circuit, figure 5)
250 A/µs
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 320 V ID=10A V
GS =10V 54
8
27
75 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =320V I
D=10A
R
G=47 Ω VGS =10V
(see test circuit, figure 5)
75
30
120
105
45
160
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
10
40 A
A
VSD (∗) Forward On Voltage ISD =10A V
GS =0 1.6 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD = 10 A di/dt = 100 A/µs
VDD = 100 V Tj=150o
C
(see test circuit, figure 5)
470
6.5
27.5
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas for TO-220 Safe Operating Areas forISOWATT220
STP10NA40/FI
3/10
Thermal Impedeance For TO-220
Derating Curve For TO-220
Output Characteristics
Thermal Impedance For ISOWATT220
Derating Curve For ISOWATT220
Transfer Characteristics
STP10NA40/FI
4/10
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs
Temperature
STP10NA40/FI
5/10
Turn-on Current Slope Turn-off Drain-source Voltage Slope
Cross-over Time Switching Safe Operating Area
Accidental Overload Area Source-drain Diode Forward Characteristics
STP10NA40/FI
6/10
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Resistive Load Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
Fig. 1: Unclamped Inductive Load Test Circuits
STP10NA40/FI
7/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP10NA40/FI
8/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.4 0.7 0.015 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
L2
A
B
D
E
H
G
L6
Ø
F
L3
G1
123
F2
F1
L7
L4
ISOWATT220 MECHANICAL DATA
P011G
STP10NA40/FI
9/10
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics.Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts arenot authorizedfor use ascriticalcomponents inlife supportdevices or systems withoutexpress
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia -Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STP10NA40/FI
10/10
STP4NA80
STP4NA80FI
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
■TYPICAL RDS(on) = 2.4 Ω
■±30V GATE TO SOURCE VOLTAGE RATING
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW INTRINSIC CAPACITANCES
■GATE GHARGE MINIMIZED
■REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The
optimized cell layout coupled with a new
proprietary edge termination concur to give the
device low RDS(on) and gate charge, unequalled
ruggedness and superior switching performance.
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SWITCH MODE POWERSUPPLIES (SMPS)
■DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
STP4NA80
STP4NA80FI 800 V
800 V <3Ω
<3Ω4A
2.5 A
123
TO-220 ISOWATT220
February 1994
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP4NA80 STP4NA80FI
VDS Drain-source Voltage (VGS =0) 800 V
V
DGR Drain-gate Voltage (RGS =20kΩ)800V
V
GS Gate-source Voltage ±30 V
IDDrain Current (continuous) at Tc=25o
C42.5A
I
D
Drain Current (continuous) at Tc=100o
C2.5 1.6A
I
DM(•) Drain Current (pulsed) 16 16 A
Ptot Total Dissipation at Tc=25o
C 110 45 W
Derating Factor 0.88 0.36 W/oC
VISO Insulation Withstand Voltage (DC) 2000 V
Tstg Storage Temperature -65 to 150 oC
TjMax. Operating Junction Temperature 150 oC
(•) Pulsewidth limited by safe operating area
123
1/10
THERMAL DATA
TO-220 ISOWATT220
Rthj-case Thermal Resistance Junction-case Max 1.13 2.77 oC/W
Rthj-amb
Rthc-sink
Tl
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
62.5
0.5
300
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 4A
E
AS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =50V) 80 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 3.1 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 2.5 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS = 0 800 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 30 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA 2.25 3 3.75 V
RDS(on) Static Drain-source On
Resistance VGS =10V I
D=2A
V
GS =10V I
D=2A T
c=100
o
C2.4 3
6Ω
Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max
VGS =10V 4A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=2A 2.5 4.3 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS =0 955
105
24
1350
150
35
pF
pF
pF
STP4NA80/FI
2/10
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =400V I
D=2A
R
G=47 Ω VGS =10V
(see test circuit, figure 3)
27
70 40
100 ns
ns
(di/dt)on Turn-on Current Slope VDD =640V I
D=4A
R
G=47 Ω VGS =10V
(see test circuit, figure 5)
170 A/µs
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 640 V ID=4A V
GS =10V 44
7
18
65 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =640V I
D=4A
R
G=47 Ω VGS =10V
(see test circuit, figure 5)
60
20
90
85
30
130
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
4
16 A
A
VSD (∗) Forward On Voltage ISD =4A V
GS =0 1.6 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD =4A di/dt=100A/µs
V
DD = 100 V Tj=150o
C
(see test circuit, figure 5)
680
10.5
31
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas for TO-220 Safe Operating Areas forISOWATT220
STP4NA80/FI
3/10
Thermal Impedeance For TO-220
Derating Curve For TO-220
Output Characteristics
Thermal Impedance For ISOWATT220
Derating Curve For ISOWATT220
Transfer Characteristics
STP4NA80/FI
4/10
Transconductance Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized On Resistance vs TemperatureNormalized Gate Threshold Voltage vs
Temperature
STP4NA80/FI
5/10
Turn-on Current Slope Turn-off Drain-source Voltage Slope
Cross-over Time Switching Safe Operating Area
Accidental Overload Area Source-drain Diode Forward Characteristics
STP4NA80/FI
6/10
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Resistive Load Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
Fig. 1: Unclamped Inductive Load Test Circuits
STP4NA80/FI
7/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP4NA80/FI
8/10
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.4 0.7 0.015 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 0.385 0.417
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
L2
A
B
D
E
H
G
L6
Ø
F
L3
G1
123
F2
F1
L7
L4
ISOWATT220 MECHANICAL DATA
P011G
STP4NA80/FI
9/10
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics.Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts arenot authorizedfor use ascriticalcomponents inlife supportdevices or systems withoutexpress
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia -Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STP4NA80/FI
10/10
STP60N05-16
STP60N06-16
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
■TYPICAL RDS(on) = 0.013 Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW GATE CHARGE
■VERY HIGH CURRENT CAPABILITY
■APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SOLENOID AND RELAY DRIVERS
■REGULATORS
■DC-DC & DC-AC CONVERTERS
■MOTOR CONTROL, AUDIO AMPLIFIERS
■AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
STP60N05-16
STP60N06-16 50 V
60 V < 0.016 Ω
< 0.016 Ω60 A
60 A
July 1993
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP60N05-16 STP60N06-16
VDS Drain-source Voltage (VGS =0) 50 60 V
V
DGR Drain- gate Voltage (RGS =20kΩ)5060V
V
GS Gate-source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C60A
I
D
Drain Current (continuous) at Tc=100o
C42A
I
DM(•) Drain Current (pulsed) 240 A
Ptot Total Dissipation at Tc=25o
C150W
Derating Factor 1 W/oC
Tstg Storage Temperature -65 to 175 oC
TjMax. Operating Junction Temperature 175 oC
(•) Pulsewidth limited by safe operating area
123
TO-220
1/9
THERMAL DATA
Rthj-case
Rthj-amb
Rthj-amb
Tl
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
1
62.5
0.5
300
oC/W
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 60 A
EAS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =25V) 600 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 150 mJ
IAR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 42 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS =0
for STP60N05-16
for STP60N06-16 50
60 V
V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 20 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA22.94V
R
DS(on) Static Drain-source On
Resistance VGS =10V I
D=30A
V
GS =10V I
D=30A T
c= 100oC0.013 0.016
0.032 Ω
Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max
VGS =10 V 60 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID=30A 20 40 S
C
iss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 2900
900
230
3800
1200
300
pF
pF
pF
STP60N05-16/STP60N06-16
2/9
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =30V I
D=30A
R
G=50 Ω VGS =10V
(see test circuit, figure 3)
75
370 105
520 ns
ns
(di/dt)on Turn-on Current Slope VDD =40V I
D=60A
R
G=50 Ω VGS =10V
(see test circuit, figure 5)
190 A/µs
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD =40V I
D=60A V
GS =10V 105
18
44
150 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =40V I
D=60A
R
G=50 Ω VGS =10V
(see test circuit, figure 5)
185
250
480
260
350
680
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
60
240 A
A
VSD (∗) Forward On Voltage ISD =60A V
GS =0 1.6 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD = 60 A di/dt = 100 A/µs
VDD =30V T
j=150o
C
(see test circuit, figure 5)
120
0.36
6
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas Thermal Impedance
STP60N05-16/STP60N06-16
3/9
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
STP60N05-16/STP60N06-16
4/9
Capacitance Variations Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature Turn-on Current Slope
Cross-over TimeTurn-off Drain-source Voltage Slope
STP60N05-16/STP60N06-16
5/9
Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms
Switching Safe Operating Area Accidental Overload Area
Source-drain Diode Forward Characteristics
STP60N05-16/STP60N06-16
6/9
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Reverse Recovery Time
Fig. 4: Gate Charge Test Circuit
STP60N05-16/STP60N06-16
7/9
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP60N05-16/STP60N06-16
8/9
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics.Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproducts arenot authorizedfor use ascriticalcomponents inlife supportdevices or systems withoutexpress
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia -Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STP60N05-16/STP60N06-16
9/9
STW20NA50
N - CHANNEL ENHANCEMENT MODE
FAST POWER MOS TRANSISTOR
■TYPICAL RDS(on) = 0.22 Ω
■±30V GATE TO SOURCE VOLTAGE RATING
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW INTRINSIC CAPACITANCES
■GATE GHARGE MINIMIZED
■REDUCED THRESHOLD VOLTAGE SPREAD
DESCRIPTION
This series of POWER MOSFETS represents the
most advanced high voltage technology. The op-
timized cell layout coupled with a new proprietary
edge termination concur to give the device low
RDS(on) and gate charge, unequalled ruggedness
and superior switching performance.
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SWITCH MODE POWERSUPPLIES (SMPS)
■DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
STW20NA50 500 V < 0.27 Ω20 A
123
TO-247
February 1994
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS = 0) 500 V
VDGR Drain- gate Voltage (RGS =20kΩ) 500 V
VGS Gate-source Voltage ±30 V
IDDrain Current (continuous) at Tc=25o
C20A
I
D
Drain Current (continuous) at Tc=100o
C12.7A
I
DM(•) Drain Current (pulsed) 80 A
Ptot Total Dissipation at Tc=25o
C 250 W
Derating Factor 2 W/oC
Tstg Storage Temperature -65 to 150 oC
TjMax. Operating Junction Temperature 150 oC
(•) Pulsewidth limited by safe operating area
1/9
THERMAL DATA
Rthj-case
Rthj-amb
Rthj-amb
Tl
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Thermal Resistance Case-sink Typ
Maximum Lead Temperature For Soldering Purpose
0.5
30
0.1
300
oC/W
oC/W
oC/W
oC
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tjmax, δ <1%) 20 A
EAS Single Pulse Avalanche Energy
(starting Tj=25o
C, ID=I
AR,V
DD =50V) 1000 mJ
EAR Repetitive Avalanche Energy
(pulse width limited by Tjmax, δ <1%) 8mJ
I
AR Avalanche Current, Repetitive or Not-Repetitive
(Tc= 100 oC, pulse width limited by Tjmax, δ <1%) 12.7 A
ELECTRICAL CHARACTERISTICS (Tcase =25o
C unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID=250µAV
GS = 0 500 V
IDSS Zero Gate Voltage
Drain Current (VGS =0) V
DS =MaxRating
V
DS = Max Rating x 0.8 Tc=125o
C250
1000 µA
µA
IGSS Gate-body Leakage
Current (VDS =0) V
GS =± 30 V ±100 nA
ON (∗)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS =V
GS ID=250µA 2.25 3 3.75 V
RDS(on) Static Drain-source On
Resistance VGS =10V I
D=10A
V
GS =10V I
D=10A T
c= 100oC0.22 0.27
0.54 Ω
Ω
ID(on) On State Drain Current VDS >I
D(on) xR
DS(on)max
VGS =10V 20 A
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (∗)Forward
Transconductance VDS >I
D(on) xR
DS(on)max ID= 10 A 10 17.5 S
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS =25V f=1MHz V
GS = 0 3600
490
140
4700
650
180
pF
pF
pF
STW20NA50
2/9
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on)
trTurn-on Time
Rise Time VDD =250V I
D=10A
R
G=4.7 Ω VGS =10V
(see test circuit, figure 3)
30
55 40
75 ns
ns
(di/dt)on Turn-on Current Slope VDD =400V I
D=20A
R
G=47 Ω VGS =10V
(see test circuit, figure 5)
160 A/µs
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 400 V ID=20A V
GS =10V 150
18
72
195 nC
nC
nC
SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
VDD =400V I
D=20A
R
G=4.7 Ω VGS =10V
(see test circuit, figure 5)
40
25
75
55
35
100
ns
ns
ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD
ISDM(•)Source-drain Current
Source-drain Current
(pulsed)
20
80 A
A
VSD (∗) Forward On Voltage ISD =20A V
GS =0 1.6 V
t
rr
Qrr
IRRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
ISD = 20 A di/dt = 100 A/µs
VDD = 100 V Tj=150o
C
(see test circuit, figure 5)
610
10.1
33
ns
µC
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Areas Thermal Impedance
STW20NA50
3/9
Derating Curve
Transfer Characteristics
Static Drain-source On Resistance
Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
STW20NA50
4/9
Capacitance Variations Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature Turn-on Current Slope
Cross-over TimeTurn-off Drain-source Voltage Slope
STW20NA50
5/9
Switching Safe Operating Area Accidental Overload Area
Source-drain Diode Forward Characteristics
Fig. 1: Unclamped Inductive Load Test Circuits Fig. 2: Unclamped Inductive Waveforms
STW20NA50
6/9
Fig. 4: Gate Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 3: Switching Times Test Circuits For
Resistive Load
STW20NA50
7/9
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.7 5.3 0.185 0.208
A1 2.87 0.113
A2 1.5 2.5 0.059 0.098
b 1 1.4 0.039 0.055
b1 2.25 0.088
b2 3.05 3.43 0.120 0.135
C 0.4 0.8 0.015 0.031
D 20.4 21.18 0.803 0.833
e 5.43 5.47 0.213 0.215
E 15.3 15.95 0.602 0.628
L 15.57 0.613
L1 3.7 4.3 0.145 0.169
Q 5.3 5.84 0.208 0.230
ØP 3.5 3.71 0.137 0.146
D
Q
ø
A
A2
A1
C
E
e
b1
b
b2
L
L1
TO-247 MECHANICAL DATA
STW20NA50
8/9
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor forany infringement of patents or other rights of third partieswhich may results from its use. No
license is granted by implication or otherwiseunder any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronicsproductsare notauthorized foruse ascritical componentsin lifesupport devices orsystemswithout express
written approval of SGS-THOMSON Microelectonics.
1994 SGS-THOMSON Microelectronics- All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - France- Germany - HongKong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore -Spain - Sweden- Switzerland -Taiwan - Thailand - United Kingdom - U.S.A
STW20NA50
9/9
