INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT688 8-bit magnitude comparator Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification 8-bit magnitude comparator 74HC/HCT688 FEATURES GENERAL DESCRIPTION * Compare two 8-bit words The 74HC/HCT688 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. * Output capability: standard * ICC category: MSI The 74HC/HCT688 are 8-bit magnitude comparators. They perform comparison of two 8-bit binary or BCD words. The output provides P = Q. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER CONDITIONS HCT Pn, Qn to P = Q 17 17 ns E to P = Q 8 12 ns 3.5 3.5 pF 30 30 pF propagation delay CL = 15 pF; VCC = 5 V CI input capacitance CPD power dissipation capacitance per package notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". December 1990 UNIT HC 2 Philips Semiconductors Product specification 8-bit magnitude comparator 74HC/HCT688 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 E enable input (active LOW) 2, 4, 6, 8, 11, 13, 15, 17 P0 to P7 word inputs 3, 5, 7, 9, 12, 14, 16, 18 Q0 to Q7 word inputs 10 GND ground (0 V) 19 P=Q equal to output 20 VCC positive supply voltage Fig.1 Pin configuration. December 1990 Fig.2 Logic symbol. 3 Fig.3 IEC logic symbol. Philips Semiconductors Product specification 8-bit magnitude comparator 74HC/HCT688 Fig.4 Functional diagram. Fig.5 Logic diagram. FUNCTION TABLE INPUTS OUTPUT DATA Pn, Qn ENABLE E P=Q P=Q X P>Q P<Q L H L L L H H H Notes 1. H = HIGH voltage level L = LOW voltage level X = don't care December 1990 4 Philips Semiconductors Product specification 8-bit magnitude comparator 74HC/HCT688 DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 min. tPHL/ tPLH tPHL/ tPLH tTHL/ tTLH -40 to +85 min. VCC WAVEFORMS (V) max. propagation delay Pn, Qn to P = Q 55 20 16 170 34 29 215 43 37 255 51 43 2.0 4.5 6.0 Fig.6 ns propagation delay E to P = Q 28 10 8 120 24 20 150 30 26 180 36 31 2.0 4.5 6.0 Fig.7 ns output transition time 19 7 6 75 15 13 95 19 16 110 22 19 2.0 4.5 6.0 Figs 6 and 7 ns 5 max. UNIT typ. December 1990 min. -40 to +125 max. Philips Semiconductors Product specification 8-bit magnitude comparator 74HC/HCT688 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard ICC category: MSI Note to HCT types The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT Pn Qn E 0.35 0.35 0.70 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. -40 to +85 typ. max. min. max. -40 to +125 min. UNIT V CC WAVEFORMS (V) max. tPHL/ tPLH propagation delay Pn, Qn to P = Q 20 34 43 51 ns 4.5 Fig.6 tPHL/ tPLH propagation delay E to P = Q 18 24 30 36 ns 4.5 Fig.7 tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Figs 6 and 7 December 1990 6 Philips Semiconductors Product specification 8-bit magnitude comparator 74HC/HCT688 AC WAVEFORMS (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Fig.7 Waveforms showing the enable input (E) to the equal to output (P = Q) propagation delays and the output transition times. Waveforms showing the word inputs (Pn, Qn) to the equal to output (P = Q) propagation delays and the output transition times. APPLICATION INFORMATION Two or more "688" 8-bit magnitude comparators may be cascaded to compare binary or BCD numbers of more than 8 bits. An example is shown in Fig.8. Fig.8 Binary or BCD comparator. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines". December 1990 7