DATA SH EET
Product specification
File under Integrated Circuits, IC06 December 1990
INTEGRATED CIRCUITS
74HC/HCT688
8-bit magnitude comparator
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990 2
Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
FEATURES
•Compare two 8-bit words
•Output capability: standard
•ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT688 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT688 are 8-bit magnitude comparators.
They perform comparison of two 8-bit binary or BCD
words.
The output provides P = Q.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25°C; tr=t
f= 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD=C
PD × VCC2× fi+ ∑ (CL× VCC2 × fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× VCC2× fo) = sum of outputs
CL= output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC − 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
HC HCT
tPHL/ tPLH propagation delay CL= 15 pF; VCC =5 V
P
n
, Qnto P = Q 1717ns
E to P = Q 8 12 ns
CIinput capacitance 3.5 3.5 pF
CPD power dissipation capacitance per package notes 1 and 2 30 30 pF
December 1990 3
Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
PIN DESCRIPTION
PIN NO. SYMBOL NAME AND FUNCTION
1E enable input (active LOW)
2, 4, 6, 8, 11, 13, 15, 17 P0 to P7word inputs
3, 5, 7, 9, 12, 14, 16, 18 Q0 to Q7word inputs
10 GND ground (0 V)
19 P = Q equal to output
20 VCC positive supply voltage
Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.
December 1990 4
Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
FUNCTION TABLE
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
INPUTS OUTPUT
DATA Pn, QnENABLE E P = Q
P=Q
X
P>Q
P<Q
L
H
L
L
L
H
H
H
Fig.4 Functional diagram. Fig.5 Logic diagram.
December 1990 5
Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr=t
f= 6 ns; CL= 50 pF
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HC VCC
(V) WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
Pn, Qn to P = Q 55
20
16
170
34
29
215
43
37
255
51
43 ns 2.0
4.5
6.0
Fig.6
tPHL/ tPLH propagation delay
E to P = Q 28
10
8
120
24
20
150
30
26
180
36
31 ns 2.0
4.5
6.0
Fig.7
tTHL/ tTLH output transition time 19
7
6
75
15
13
95
19
16
110
22
19 ns 2.0
4.5
6.0
Figs 6 and 7
December 1990 6
Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr=t
f= 6 ns; CL= 50 pF
INPUT UNIT LOAD COEFFICIENT
Pn
Qn
E
0.35
0.35
0.70
SYMBOL PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT VCC
(V) WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
Pn, Qn to P = Q 20 34 43 51 ns 4.5 Fig.6
tPHL/ tPLH propagation delay
E to P = Q 18 24 30 36 ns 4.5 Fig.7
tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Figs 6 and 7
December 1990 7
Philips Semiconductors Product specification
8-bit magnitude comparator 74HC/HCT688
AC WAVEFORMS
Fig.6 Waveforms showing the enable input (E) to
the equal to output (P = Q) propagation
delays and the output transition times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
Fig.7 Waveforms showing the word inputs (Pn, Qn)
to the equal to output (P = Q) propagation
delays and the output transition times.
(1) HC : VM= 50%; VI= GND to VCC.
HCT: VM= 1.3 V; VI= GND to 3 V.
APPLICATION INFORMATION
Two or more “688” 8-bit magnitude comparators may be cascaded to compare binary or BCD numbers of more than 8
bits. An example is shown in Fig.8.
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
Fig.8 Binary or BCD comparator.
