Description
These dual channel optocoup lers contain a pair of light
emitting diodes and integrated photo-detec tors with
electrical insulation between input and output. Separate
connection for the photodiode bias and output transis-
tor collectors increase the speed up to a hundred times
that of a conventional phototransistor coupler by
reducing the base-collector capacitance.
These dual channel optocouplers are available in an 8
Pin DIP and in an industry standard SO-8 package. The
following is a cross reference table listing the 8 Pin DIP
part number and the electrically equivalent SO-8 part
number.
8 Pin DIP
SO-8
Package
HCPL-2530 HCPL-0530
HCPL-2531 HCPL-0531
HCPL-4534 HCPL-0534
Functional Diagram
HCPL-2530, HCPL-2531, HCPL-4534
HCPL-0530, HCPL-0531, HCPL-0534
Dual Channel, High Speed Optocouplers
Data Sheet
Features
• 15 kV/µs minimum common mode transient immunity
at VCM = 1500 V (HCPL-4534/0534)
• TTL compatible
• Available in 8 pin DIP, SO-8, and 8 pin DIP – gull wing
surface mount (option 020) packages
• High density packaging
• 3 MHz bandwidth
• Open collector outputs
• Safety approval
UL Recognized – 3750 V rms for 1 minute (5000 V rms
for 1 minute for Option 020) per UL1577
CSA Approved
IEC/EN/DIN EN 60747-5-5
– VIORM = 630 Vpeak for HCPL-2530/2531/4534
0ption 060
– VIORM = 567 Vpeak for HCPL-0530/0531/0534
0ption 060
• Single channel version available (4502/3, 0452/3)
• MIL-PRF-38534 hermetic version available
(55XX/65XX/4N55)
Applications
• Line receivers – high common mode transient immu-
nity (>1000 V/µs) and low input-output capacitance
(0.6 pF)
• High speed logic ground isolation – TTL/TTL, TTL/LTTL,
TTL/CMOS, TTL/LSTTL
• Replace pulse transformers – save board space and
weight
• Analog signal ground isolation – integrated photon
detector provides improved linearity over phototran-
sistor type
• Polarity sensing
• Isolated analog amplier – dual channel packaging
enhances thermal tracking
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
A 0.1 µF bypass capacitor between
pins 5 and 8 is recommended.
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
HCPL-2530 Functional Diagram
7
1
2
3
45
6
8
ANODE
1
CATHODE
1
CATHODE
2
ANODE
2
V
CC
V
O1
V
O2
GND
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
V
O
LOW
HIGH
2
The SO-8 does not require “through holes” in a PCB. This package occupies approximately one-third the footprint
area of the standard dual-in-line package. The lead prole is designed to be compatible with standard surface mount
processes.
The HCPL-2530/0530 is for use in TTL/CMOS, TTL/LSTTL or wide bandwidth analog applications. Current transfer ratio
(CTR) for the HCPL-2530/0530 is 7% minimum at IF = 16 mA.
The HCPL-2531/0531 is designed for high speed TTL/TTL applications. A standard 16 mA TTL sink current through the
input LED will provide enough output current for 1 TTL load and a 5.6 kΩ pull-up resistor. CTR of the HCPL-2531/0531
is 19% minimum at IF = 16 mA.
The HCPL-4534/0534 is an HCPL-2531/0531 with increased common mode transient immunity of 15,000 V/µs
minimum at VCM = 1500 V guaranteed.
Selection Guide
Minimum CMR
Current
Transfer
Ratio (%)
8-pin DIP (300 Mil) Small-Outline SO-8
Widebody
(400 Mil) Hermetic
dV/dt
(V/µs)
V
CM
(V)
Dual
Channel
Package
Single
Channel
Package*
Dual
Channel
Package
Single
Channel
Package*
Single
Channel
Package*
Single and
Dual Channel
Packages*
1,000 10 7 HCPL-2530 6N135 HCPL-0530 HCPL-0500 HCNW135
19 HCPL-2531 6N136
HCPL-4502
HCPL-0531 HCPL-0501
HCPL-0452
HCNW136
HCNW4502
15,000 1500 19 HCPL-4534 HCPL-4503 HCPL-0534 HCPL-0453 HCNW4503
1,000 10 9 HCPL-55XX
HCPL-65XX
4N55
* Technical data for these products are on separate Avago publications.
3
Ordering Information
HCPL-2530, HCPL-2531, HCPL-4534, HCPL-0530, HCPL-0531 and HCPL-0534 are UL Recognized with 3750 Vrms for
1 minute per UL1577 and are approved under CSA Component Acceptance Notice #5, File CA 88324.
Part
number
Option
Package
Surface
Mount
Gull
Wing
Tape
& Reel
UL 5000
Vrms/
1 Minute
rating
IEC/EN/DIN
EN 60747-5-5 Quantity
RoHS
Compliant
Non RoHS
Compliant
HCPL-2530
HCPL-2531
HCPL-4534
-000E No option
300mil
DIP-8
50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
-320E #320 X X X 50 per tube
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-360E #360 X X X 50 per tube
-560E #560 X X X X 1000 per reel
HCPL-0530
HCPL-0531
HCPL-0534
-000E No option
SO-8
100 per tube
-500E #500 X X X 1500 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-2530-560E to order product of 300mil DIP Gull Wing Surface Mount package in Tape and Reel packaging with
IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant.
Example 2:
HCPL-2530 to order product of 300mil DIP package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July 2001 and
RoHS compliant option will use ‘-XXXE‘.
4
Schematic
Package Outline Drawings
8-Pin DIP Package (HCPL-2530/2531/4534)
IF1
HCPL-4534/0534 SHIELD
8
7
VCC
+
2
VO1
ICC
VF1 IO1
1
–
IF2
6
5
GND
–
4
VO2
VF2
IO2
3
+
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED.
1.080 ± 0.320
(0.043 ± 0.013)
2.54 ± 0.25
(0.100 ± 0.010)
0.51 (0.020) MIN.
0.65 (0.025) MAX.
4.70 (0.185) MAX.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
*MARKING CODE LETTER FOR OPTION NUMBERS.
"V" = OPTION 060
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
5° TYP. 0.254 + 0.076
- 0.051
(0.010 + 0.003)
- 0.002)
7.62 ± 0.25
(0.300 ± 0.010)
6.35 ± 0.25
(0.250 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
1.78 (0.070) MAX.
1.19 (0.047) MAX.
A XXXXZ
YYWW
EEE
DATE CODE
5678
4321
OPTION CODE*
UL
RECOGNITION
UR
TYPE NUMBER
3.56 ± 0.13
(0.140 ± 0.005)
LOT ID
5
Small Outline SO-8 Package (HCPL-0530/0531/0534)
Package Outline Drawings, continued
8-Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-2530/2531/4534)
XXX
YWW
EEE
8765
4321
5.994 ± 0.203
(0.236 ± 0.008)
3.937 ± 0.127
(0.155 ± 0.005)
0.406 ± 0.076
(0.016 ± 0.003) 1.270
(0.050) BSC
* 5.080 ± 0.127
(0.200 ± 0.005)
3.175 ± 0.127
(0.125 ± 0.005) 1.524
(0.060)
45° X 0.432
(0.017)
0.228 ± 0.025
(0.009 ± 0.001)
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
0.305
(0.012) MIN.
* TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
0.203 ± 0.102
(0.008 ± 0.004)
7°
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
7.49 (0.295)
1.9 (0.075)
0.64 (0.025)
LAND PATTERN RECOMMENDATION
LOT ID
0.635 ± 0.25
(0.025 ± 0.010) 12° NOM.
9.65 ± 0.25
(0.380 ± 0.010)
0.635 ± 0.130
(0.025 ± 0.005)
7.62 ± 0.25
(0.300 ± 0.010)
5
6
7
8
4
3
2
1
9.65 ± 0.25
(0.380 ± 0.010)
6.350 ± 0.25
(0.250 ± 0.010)
1.016 (0.040)
1.27 (0.050)
10.9
(0.430)
2.0 (0.080)
LAND PATTERN RECOMMENDATION
1.080 ± 0.320
(0.043 ± 0.013)
3.56 ± 0.13
(0.140 ± 0.005)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
0.254 + 0.076
- 0.051
(0.010 + 0.003)
- 0.002)
6
Regulatory Information
The devices contained in this data sheet have been approved by the following organizations:
UL Recognized under UL 1577, Component Recognition Program, File E55361.
CSA Approved under CSA Component Acceptance Notice #5, File CA 88324.
IEC/EN/DIN IEC/EN/DIN EN 60747-5-5 Approved under: (Option 060 only)
Insulation and Safety Related Specications
Parameter Symbol
8-Pin DIP
(300 Mil)
Value
SO-8
Value Units Conditions
Minimum External
Air Gap (External
Clearance)
L(101) 7.1 4.9 mm Measured from input terminals to output terminals,
shortest distance through air.
Minimum External
Tracking (External
Creepage)
L(102) 7.4 4.8 mm Measured from input terminals to output terminals,
shortest distance path along body.
Minimum Internal
Plastic Gap
(Internal Clearance)
0.08 0.08 mm Through insulation distance, conductor to conductor,
usually the direct distance between the photoemitter
and photodetector inside the optocoupler cavity.
Minimum Internal
Tracking (Internal
Creepage)
NA NA mm Measured from input terminals to output
terminals, along internal cavity.
Tracking Resistance
(Comparative Tracking
Index)
CTI 200 200 Volts DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 – surface mount classication is Class A in accordance with CECC 00802.
7
IEC/EN/DIN EN 60747-5-5 Insulation Characteristics (OPTION 060)
Description Symbol
Characteristic HCPL-
Unit2530/2531/4534 0530/0531/0534
Installation classication per DIN VDE 0110, Table 1
for rated mains voltage ≤ 150 Vrms
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 600 Vrms
I – IV
I – IV
I – IV
I – IV
I – IV
I – III
Climatic Classication 0/70/21 0/70/21
Pollution Degree (DIN VDE 0110/39) 2 2
Maximum Working Insulation Voltage VIORM 630 567 Vpeak
Input to Output Test Voltage, Method b*
VIORM x 1.875 = VPR, 100% Production Test
tm=1 sec, Partial discharge < 5 pC
VPR 1181 1063 Vpeak
Input to Output Test Voltage, Method a*
VIORM x 1.6 = VPR, Type and Sample Test,
tm=10 sec, Partial discharge < 5 pC
VPR 1008 907 Vpeak
Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) VIOTM 8000 6000 Vpeak
Safety-limiting values – max. values allowed in the event of a failure.
Case Temperature
Input Current**
Output Power**
TS
IS, INPUT
PS, OUTPUT
175
230
600
150
230
600
°C
mA
mW
Insulation Resistance at TS, VIO = 500 V RS>109>109Ω
* Refer to the optocoupler section of the Isolation and Control Components Designer's Catalog, under Product Safety Regulations section,
IEC/EN/DIN EN 60747-5-5, for a detailed description of Method a and Method b partial discharge test proles.
** Refer to the following gure for dependence of PS and IS on ambient temperature.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application.
OUTPUT POWER – PS, INPUT CURRENT – IS
0
0
TS – CASE TEMPERATURE – C
200
700
400
25
800
50 75 100
200
150 175
PS (mW)
IS (mA)
125
100
300
600
500
8
Absolute Maximum Ratings
Parameter Symbol Device Min. Max. Units Note
Storage Temperature TS-55 125 °C
Operating Temperature TA-55 100 °C
Average Forward Input Current
(each channel)
IF(AVG) 25 mA
Peak Forward Input Current (each channel)
(50% duty cycle, 1 ms pulse width)
IF(PEAK) 50 mA
Peak Transient Input Current (each channel)
(≤ 1 µs pulse width, 300 pps)
IF(TRANS) 1 A
Reverse LED Input Voltage (each channel) VR5 V
Input Power Dissipation (each channel) PIN 45 mW
Average Output Current (each channel) IO(AVG) 8 mA
Peak Output Current IO(PEAK) 16 mA
Supply Voltage (Pin 8-5) VCC -0.5 30 V
Output Voltage (Pins 7-5, 6-5) VO-0.5 20 V
Output Power Dissipation (each channel) PO35 mW 13
Lead Solder Temperature
(Through-Hole Parts Only)
1.6 mm below seating plane, 10 seconds
TLS 8 Pin DIP 260 °C
9
Electrical Specications (DC)
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specied. See note 9.
Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note
Current CTR HCPL-2530/ 7 18 50 % TA = 25°C IF = 16 mA, 1, 2 1, 2
Transfer 0530 VCC = 4.5 V 4
Ratio 5 VO = 0.5 V
HCPL-2531/ 19 24 50 % TA = 25°C
0531
HCPL-4534/ 15
0534
Logic Low VOL HCPL-2530/ 0.1 0.5 V TA = 25°C IO = 1.1 mA IF = 16 mA, 1 1
Output 0530 VCC = 4.5 V
Voltage 0.5 IO = 0.8 mA
HCPL-2531/ 0.1 0.5 V TA = 25°C IO = 3.0 mA
0531
HCPL-4534/ 0.5 IO = 2.4 mA
0534
Logic High IOH 0.003 0.5 µA TA = 25°C VCC = VO = 5.5V, IF = 0 mA 6 1
Output IF = 0 mA
Current
50 TA = 25°C VCC = VO = 15V,
IF = 0 mA
Logic Low ICCL 100 400 µA IF = 16 mA, VO = Open,
Supply VCC = 15 V
Current
Logic High ICCH 0.05 4 µA IF = 0 mA, VO = Open,
Supply VCC = 15 V
Current
Input VF 1.5 1.7 V TA = 25°C 3 1
Forward IF = 16 mA
Voltage 1.8
Input BVR 5 V IR=10 µA 1
Reverse
Breakdown
Voltage
Temperature ΔVF -1.6 mV/ IF = 16 mA
Coecient ΔTA °C
of Forward
Voltage
Input CIN 60 pF f = 1 MHz, VF = 0 V 1
Capacitance
*All typicals at TA = 25°C.
10
Package Characteristics
Parameter Sym. Device Min. Typ.* Max. Units Test Conditions Fig. Note
Input-Output VISO 3750 V rms RH < 50%, 3, 10
Momentary With- t = 1 min.,
stand Voltage**
Resistance RI-O 1012 Ω RH ≤45% 3
(Input-Output) VI-O = 500 Vdc,
t = 5 s
Capacitance CI-O 0.6 pF f = 1 MHz, 12
(Input-Output) TA = 25°C
Input-Input II-I 0.005 µA RH ≤45%, 4
Insulation t = 5 s,
Leakage Current VI-I = 500 Vdc
Resistance RI-I 1011 Ω 4
(Input-Input)
Capacitance CI-I HCPL-2530/ 0.03 pF f = 1 MHz 4
(Input-Input) 2531/4534
HCPL-0530/ 0.25
0531/0534
*All typicals at TA = 25°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous volt-
age rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable), your equipment
level safety specication or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage,” publication number 5963-2203E.
HCPL-2530/2531
/4534 Option 020
3, 11
5000
Switching Specications (AC)
Over recommended temperature (TA = 0°C to 70°C), VCC = 5 V, IF = 16 mA unless otherwise specied.
Device
Parameter Sym. HCPL- Min. Typ.* Max. Units Test Conditions Fig. Note
Propagation tPHL 2530/0530 0.2 1.5 µs TA = 25°C RL = 4.1 kΩ 5, 9, 6, 7
Delay Time 2.0 11
to Logic Low 2531/0531/ 0.2 0.8 TA = 25°C RL = 1.9 kΩ
at Output 4534/0534 1.0
Propagation tPLH 2530/0530 1.3 1.5 µs TA = 25°C RL = 4.1 kΩ 5, 9, 6, 7
Delay Time 2.0 11
High to Logic 2531/0531/ 0.6 0.8 TA = 25°C RL = 1.9 kΩ
at Output 4534/0534 1.0
Common |CMH| 2530/0530 1 10 kV/µs RL = 4.1 kΩ IF = 0 mA, 10 5, 6,
Mode Transient 2531/0531 1 10 RL = 1.9 kΩ TA = 25°C, 7
Immunity at 4534/0534 15 30 RL = 1.9 kΩ VCM = 10 Vp-p
Logic High
Level Output
Common |CML| 2530/0530 1 10 kV/µs RL = 4.1 kΩ IF = 0 mA, 10 5, 6,
Mode Transient 2531/0531 1 10 RL = 1.9 kΩ TA = 25°C, 7
Immunity at 4534/0534 15 30 RL = 1.9 kΩ VCM = 10 Vp-p
Logic Low
Level Output
Bandwidth BW 3 MHz RL = 100 kΩ 7, 8
*All typicals at TA = 25°C.
11
Notes:
1. Each channel.
2. CURRENT TRANSFER RATIO is dened as the ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
3. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
4. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
5. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode
pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level
is the maximum tolerable (negative) dV
CM/dt on the falling edge of the common mode pulse signal, VCM, to assure that the output will remain
in a Logic Low state (i.e., VO < 0.8 V).
6. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor.
7. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and the 6.1 kΩ pull-up resistor.
8. The frequency at which the ac output voltage is 3 dB below the low frequency asymptote.
9. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 is recommended.
10. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 V rms for 1 second (leakage detection
current limit, II-O ≤5 µA).
11. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥6000 V rms for 1 second (leakage detec-
tion current limit, II-O ≤5 µA).
12. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together.
13. Derate linearly above 90°C free-air temperature at a rate of 3.0 mW/ °C for the SOIC-8 package.
Figure 1. DC and pulsed transfer characteristics. Figure 2. Current transfer ratio vs. input current. Figure 3. Input current vs. forward voltage.
HCPL-2530 fig 1
010 20
VO – OUTPUT VOLTAGE – V
IO – OUTPUT CURRENT – mA
10
5
0
T = 25°C
V = 5.0 V
A
CC
40 mA
35 mA
30 mA
25 mA
20 mA
15 mA
10 mA
I = 5 mA
F
HCPL-2530 Figure 2
NORMALIZED
I = 16 mA
V = 0.5 V
V = 5 V
T = 25°C
F
O
CC
A
HCPL-2530/0530
HCPL-2531/0531/4534/0534
1.5
1.0
0.5
0.1
0 1 10 100
NORMALIZED CURRENT TRANSFER RATIO
IF – INPUT CURRENT – mA
HCPL-2530 fig 3
V
F
– FORWARD VOLTAGE – VOLTS
100
10
0.1
0.01
1.1 1.2 1.3 1.4
I
F
– FORWARD CURRENT – mA
1.61.5
1.0
0.001
1000
I
F
V
F
+T = 25°C
A
–
Figure 4. Current transfer ratio vs. temperature. Figure 5. Propagation delay vs. temperature. Figure 6. Logic high output current vs. tempera-
ture.
HCPL-2530 fig 6
-50 +50
TA – TEMPERATURE – °C
IOH – LOGIC HIGH OUTPUT CURRENT – nA
10
-2
-25 0 +25 +75 +100
10
-1
10
0
10
+1
10
+2
10
+3
10
+4
VO = VCC = 5.0 V
IF = 0
HCPL-2530 Figure 4
1.1
1.0
0.9
0.8
0.7
0.6
-60 -20 0 80
NORMALIZED CURRENT TRANSFER RATIO
T
A
– TEMPERATURE – °C
F
CC
A
-40 20 40 60 100
O
NORMALIZED
I = 16 mA
V = 0.5 V
V = 5 V
T = 25°C
HCPL-2530/0530
HCPL-2531/0531/4534/0534
2000
1500
1000
500
0
-60 -20 20 60 100
TA – TEMPERATURE – C
tP – PROPAGATION DELAY – ns
tPHL
tPLH
I
F
= 16 mA, V
CC
= 5.0 V
HCPL-2530/0530 (R
L
= 4.1 kΩ)
HCPL-2531/0531/4534/0534
(R
L
= 1.9 kΩ)
12
Figure 8. Frequency response.
Figure 7. Small-signal current transfer ratio vs.
quiescent input current.
HCPL-2530 Figure 7
∆ IF
∆ IO– SMALL SIGNAL CURRENT TRANSFER RATIO
0
0.10
0.20
0.30
0
IF – QUIESCENT INPUT CURRENT – mA
24
16
4 8 12 20
TA = 25°C, RL = 100 Ω, VCC = 5 V
Figure 9. Switching test circuit.
VO
PULSE
GEN.
Z = 50 Ω
t = 5 ns
O
r
I MONITOR
F
IF
0.1µF
L
R
CL = 1.5 pF
RM
0
tPHL tPLH
O
V
IF
OL
V
1.5 V
+5 V
1.5 V
5 V 10% DUTY CYCLE
1/f < 100 µs
7
1
2
3
45
6
8
f – FREQUENCY – MHz
0
-20
0.01 0.1
NORMALIZED RESPONSE –dB
1.0
-25
10
-30
TA = 25 C
IF = 16 mA
-15
-10
-5
RL
= 100 Ω
RL
= 220 Ω
RL
= 470 Ω
RL
= 1 kΩ
1
2
3
4
8
7
6
5
20 kΩ
SET IF
+5 V
AC INPUT
0.1 µF
560 Ω100 Ω
2N3053
1.6 V dc
0.25 Vp-p ac
0.1 µF
+5 V
VO
RL
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2015 Avago Technologies. All rights reserved. Obsoletes AV01-0370EN
AV02-2333EN - June 23, 2015
Figure 11. Propagation delay time vs. load resistance
Figure 10. Test circuit for transient immunity and typical waveforms
O
V5 V
OL
V
O
V
0 V 10% 90% 90% 10%
SWITCH AT A: I = 0 mA
F
SWITCH AT B: I = 16 mA
F
CM
V
trtf
VO
IF
0.1 µF
L
R
+5 V
A
B
PULSE GEN.
VCM
+–
VFF
7
1
2
3
45
6
8