LT1776IS8#TR - ANALOG DEVICES

LT1776

Wide Input Range,

High Efficiency, Step-Down

Switching Regulator

FEATURES

DESCRIPTION

The LT

1776 is a wide input range, high efficiency Buck

(step-down) switching regulator. The monolithic die in-

cludes all oscillator, control and protection circuitry. The

part can accept input voltages as high as 60V and contains

an output switch rated at 700mA peak current. Current

mode control delivers excellent dynamic input supply

rejection and short-circuit protection.

The LT1776 contains several features to enhance effi-

ciency. The internal control circuitry is normally powered

via the V

pin, thereby minimizing power drawn directly

from the V

supply (see Applications Information). The

action of the LT1776 switch circuitry is also load depen-

dent. At medium to high loads, the output switch circuitry

maintains fast rise time for good efficiency. At light loads,

rise time is deliberately reduced to avoid pulse skipping

behavior.

The available SO-8 package and 200kHz switching fre-

quency allow for minimal PC board area requirements.

TYPICAL APPLICATION

■

Wide Input Range: 7.4V to 40V

■

Tolerates Input Transients to 60V

■

700mA Peak Switch Rating

■

Adaptive Switch Drive Maintains Efficiency at High

Load Without Pulse Skipping at Light Load

■

True Current Mode Control

■

200kHz Fixed Operating Frequency

■

Synchronizable to 400kHz

■

Low Supply Current in Shutdown: 30µA

■

Available in 8-Pin SO and PDIP Packages

39µF

63V

1776 F01

LT1776

SHDN

SYNC

GND

100µF

10V

MBR160 36.5k

400mA

12.1k

22k

100µH*

2200pF

8V TO 40V

100pF

*43T #30 ON MAGNETICS

MPP #55030

Efficiency vs VIN and ILOAD

LOAD CURRENT (mA)

EFFICIENCY (%)

10 100 1000

1776 TA01

VIN = 10V

VIN = 20V

VIN = 30V

VIN = 40V

Figure 1

, LTC and LT are registered trademarks of Linear Technology Corporation.

APPLICATIONS

■

Automotive DC/DC Converters

■

Cellular Phone Battery Charger Accessories

■

IEEE 1394 Step-Down Converters

LT1776

ABSOLUTE MAXIMUM RATINGS

(Note 1)

Supply Voltage (Note 5) .......................................... 60V

Switch Voltage (Note 5)........................................... 60V

SHDN, SYNC Pin Voltage........................................... 7V

Pin Voltage ....................................................... 30V

FB Pin Voltage ........................................................... 3V

Operating Junction Temperature Range

LT1776C................................................ 0°C to 125°C

LT1776I ............................................ –40°C to 125°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)..................300°C

PACKAGE/ORDER INFORMATION

ORDER PART

NUMBER

LT1776CN8

LT1776CS8

LT1776IN8

LT1776IS8

S8 PART MARKING

1776

1776I

Consult factory for Military grade parts.

VIN = 40V, VSW open, VCC = 5V, VC = 1.4V unless otherwise noted.

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Power Supplies

IN(MIN)

Minimum Input Voltage 6.7 7.0 V

●7.4 V

Thermally Limited Continuous Operating Voltage ●40 V

VIN

Supply Current V

= 0V 620 800 µA

●900 µA

VCC

Supply Current V

= 0V 3.2 4.0 mA

●5.0 mA

VCC

Dropout Voltage (Note 2) 2.8 3.1 V

Shutdown Mode I

VIN

SHDN

= 0V 30 50 µA

●75 µA

Feedback Amplifier

REF

Reference Voltage 1.225 1.240 1.255 V

●1.215 1.265 V

FB Pin Input Bias Current 600 1500 nA

Feedback Amplifier Transconductance ∆lc = ±10µA 400 650 1000 µmho

●200 1500 µmho

SRC

, I

SNK

Feedback Amplifier Source or Sink Current 60 100 170 µA

●45 220 µA

Feedback Amplifier Clamp Voltage 2.0 V

Reference Voltage Line Regulation 12V ≤ V

≤ 60V ●0.01 %/V

Voltage Gain 200 600 V/V

Output Switch

Output Switch On Voltage I

= 0.5A 1.0 1.5 V

LIM

Switch Current Limit (Note 3) ●0.55 0.70 1.0 A

Current Amplifier

Control Pin Threshold Duty Cycle = 0% 0.9 1.1 1.25 V

Control Voltage to Switch Transconductance 2 A/V

JMAX

= 125°C, θ

= 130°C/ W (N8)

JMAX

= 125°C, θ

= 110°C/ W (S8)

TOP VIEW

SYNC

SHDN

GND

N8 PACKAGE

8-LEAD PDIP S8 PACKAGE

8-LEAD PLASTIC SO

LT1776

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.

VIN = 40V, VSW open, VCC = 5V, VC = 1.4V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Timing

f Switching Frequency 180 200 220 kHz

●170 230 kHz

Maximum Switch Duty Cycle ●85 90 %

ON(MIN)

Minimum Switch On Time High dV/dt Mode, R

= 39Ω (Note 4) 300 ns

Boost Operation

Pin Boost Threshold 1.35 V

dV/dt Below Threshold 0.2 V/ns

dV/dt Above Threshold 1.6 V/ns

Sync Function

Minimum Sync Amplitude ●1.5 2.2 V

Synchronization Range (Note 6) ●250 400 kHz

SYNC Pin Input R 40 kΩ

SHDN Pin Function

SHDN

Shutdown Mode Threshold 0.5 V

●0.2 0.8 V

Upper Lockout Threshold Switching Action On 1.260 V

Lower Lockout Threshold Switching Action Off 1.245 V

SHDN

Shutdown Pin Current V

SHDN

= 0V 12 20 µA

SHDN

= 1.25V 2.5 10 µA

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: Control circuitry powered from V

Note 3: Switch current limit is DC trimmed and tested in production.

Inductor dl/dt rate will cause a somewhat higher current limit in actual

application.

Note 4: Minimum switch on time is production tested with a 39Ω resistive

load to ground.

Note 5: Parts are guaranteed to survive 60V on V

and V

. However,

thermal constraints will limit V

in some applications, depending primarily

on maximum output current and switching frequency. See Applications

section for more information.

Note 6: Internal oscillator is guaranteed to sync up to 400kHz. However,

thermal constraints and/or controllability issues may place a lower limit on

switching frequency in actual usage. See Applications section for more

information.

LT1776

TYPICAL PERFORMANCE CHARACTERISTICS

Minimum Input Voltage vs

Temperature

TEMPERATURE (°C)

–50

7.4

7.2

7.0

6.8

6.6

6.4

6.2

6.0 25 75

1776 G01

–25 0 50 100 125

INPUT VOLTAGE (V)

SWITCH CURRENT (mA)

SWITCH VOLTAGE (V)

1.50

1.25

1.00

0.75

0.50

0.25

0300 500

1776 G02

100 200 400 600 700

125°C

–55°C

25°C

DUTY CYCLE (%)

SWITCH CURRENT LIMIT (mA)

1000

800

600

400

200

080

1776 G03

2010 30 50 70 90

40 60 100

= 25°C

Switch-On Voltage vs

Switch Current Switch Current Limit vs

Duty Cycle

SHDN Pin Shutdown Threshold

vs Temperature

TEMPERATURE (°C)

–50

900

800

700

600

500

400

300

200 25 75

LT1776 G04

–25 0 50 100 125

SHDN PIN VOLTAGE (mV)

SHDN PIN VOLTAGE (V)

SHDN PIN INPUT CURRENT (µA)

–5

–10

–15

–20 4

1776 G05

1235

25°C

–55°C

125°C

SHDN Pin Input Current

vs Voltage

TEMPERATURE (°C)

–50

1.30

1.28

1.26

1.24

1.22

1.20 25 75

LT1776 G06

–25 0 50 100 125

SHDN PIN VOLTAGE (V)

UPPER THRESHOLD

LOWER THRESHOLD

SHDN Pin Lockout Thresholds

vs Temperature

TEMPERATURE (°C)

SWITCHING FREQUENCY (kHz)

215

210

205

200

195

190

185

1776 G07

–50 25 75

–25 0 50 100 125

Switching Frequency

vs Temperature Minimum Synchronization Voltage

vs Temperature Switch Minimum On-Time

vs Temperature

TEMPERATURE (°C)

MINIMUM SYNCHRONIZATION VOLTAGE (V)

2.25

2.00

1.75

1.50

1.25

1.00

0.75

1776 G08

–50 25 75

–25 0 50 100 125

TEMPERATURE (°C)

SWITCH MINIMUM ON-TIME (ns)

600

500

400

300

200

100

1776 G09

–50 25 75

–25 0 50 100 125

VIN = 40V

RL = 39Ω

FB =

LT1776

TYPICAL PERFORMANCE CHARACTERISTICS

VC Pin Switching Threshold,

Boost Threshold, Clamp Voltage

vs Temperature

TEMPERATURE (°C)

–50

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8 25 75

LT1776 G10

–25 0 50 100 125

VC PIN VOLTAGE (V)

CLAMP

VOLTAGE

BOOST

THRESHOLD

SWITCHING

THRESHOLD

TEMPERATURE (°C)

–50

750

700

650

600

550

500

450

400 25 75

LT1776 G12

–25 0 50 100 125

TRANSCONDUCTANCE (µmho)

Error Amplifier Transconductance

vs Temperature

FB PIN VOLTAGE (V)

1.0

FEEDBACK AMPLIFIER OUTPUT CURRENT (µA)

100

–50

–100

–150 1.4

1776 G11

1.1 1.2 1.3 1.5

25°C

–55°C

125°C

Feedback Amplifier Output

Current vs FB Pin Voltage

PIN FUNCTIONS

UUU

SHDN (Pin 1): When pulled below the shutdown mode

threshold, nominally 0.30V, this pin turns off the regulator

and reduces V

input current to a few tens of microam-

peres (shutdown mode).

When this pin is held above the shutdown mode threshold,

but below the lockout threshold, the part will be opera-

tional with the exception that output switching action will

be inhibited (lockout mode). A user-adjustable undervolt-

age lockout can be implemented by driving this pin from

an external resistor divider to V

. This action is logically

“ANDed” with the internal UVLO, set at nominally 6.7V,

such that minimum V

can be increased above 6.7V, but

not decreased (see Applications Information).

If unused, this pin should be left open. However, the high

impedance nature of this pin renders it susceptible to

coupling from the high speed V

node, so a small

capacitor to ground, typically 100pF or so is recom-

mended when the pin is left “open”.

(Pin 2): This pin is used to power the internal control

circuitry off of the switching supply output. Proper use of

this pin enhances overall power supply efficiency. During

start-up conditions, internal control circuitry is powered

directly from V

If the output capacitor is located more than one inch from

the V

pin, a separate 0.1µF bypass capacitor to ground

may be required right at the pin.

(Pin 3): This is the emitter node of the output switch

and has large currents flowing through it. This node

moves at a high dV/dt rate, especially when in “boost”

mode. Keep the traces to the switching components as

short as possible to minimize electromagnetic radiation

and voltage spikes.

GND (Pin 4): This is the device ground pin. The internal

reference and feedback amplifier are referred to it. Keep

the ground path connection to the FB divider and the V

compensation capacitor free of large ground currents.

(Pin 5): This is the high voltage supply pin for the

output switch. It also supplies power to the internal control

circuitry during start-up conditions or if the V

pin is left

open. A high quality bypass capacitor which meets the

input ripple current requirements is needed here. (See

Applications Information).

SYNC (Pin 6): Pin used to synchronize internal oscillator

to the external frequency reference. It is directly logic

compatible and can be driven with any signal between

LT1776

10% and 90% duty cycle. The sync function is internally

disabled if the FB pin voltage is low enough to cause

oscillator slowdown. If unused, this pin should be grounded.

FB (Pin 7): This is the inverting input to the feedback

amplifier. The noninverting input of this amplifier is inter-

nally tied to the 1.24V reference. This pin also slows down

the frequency of the internal oscillator when its voltage is

PIN FUNCTIONS

UUU

abnormally low, e.g., 2/3 of normal or less. This feature

helps maintain proper short-circuit protection.

(Pin 8): This is the control voltage pin which is the

output of the feedback amplifier and the input of the

current comparator. Frequency compensation of the over-

all loop is effected by placing a capacitor, (or in most cases

a series RC combination) between this node and ground.

BLOCK DIAGRA

SWDR

SWON

BOOST

1776 BD

BOOST

SWOFF

LOGICOSC

BIAS

VTH

VBG

GND

SYNC

SHDN

VCC

AMP

BOOST

COMP

gm I

I I

R1 RSENSE

COMP

VSW

VIN

LT1776

TIMING DIAGRAMS

WUW

Low dV/dt ModeHigh dV/dt Mode

SWOFF

1776 TD02

BOOST

SWON

SWDR

SWOFF

1776 TD01

BOOST

SWON

SWDR

The LT1776 is a current mode switching regulator IC that

has been optimized for high efficiency operation in high

input voltage, low output voltage buck topologies. The

Block Diagram shows an overall view of the system.

Several of the blocks are straightforward and similar to

those found in traditional designs, including: Internal Bias

Regulator, Oscillator and Feedback Amplifier. The novel

portion includes an elaborate Output Switch section and

Logic Section to provide the control signals required by

the switch section.

The LT1776 operates much the same as traditional

current mode switchers, the major difference being its

specialized output switch section. Due to space con-

straints, this discussion will not reiterate the basics of

current mode switcher/controllers and the “buck” topol-

ogy. A good source of information on these topics is

Application Note 19.

Output Switch Theory

One of the classic problems in delivering low output

voltage from high input voltage at good efficiency is that

minimizing AC switching losses requires very fast volt-

age (dV/dt) and current (dI/dt) transition at the output

device. This is in spite of the fact that in a bipolar

implementation, slow lateral PNPs must be included in

the switching signal path.

OPERATIO

Fast positive-going slew rate action is provided by lateral

PNP Q3 driving the Darlington arrangement of Q1 and Q2.

The extra β available from Q2 greatly reduces the drive

requirements of Q3.

Although desirable for dynamic reasons, this topology

alone will yield a large DC forward voltage drop. A second

lateral PNP, Q4, acts directly on the base of Q1 to reduce

the voltage drop after the slewing phase has taken place.

To achieve the desired high slew rate, PNPs Q3 and Q4 are

“force-fed” packets of charge via the current sources

controlled by the boost signal.

Please refer to the High dV/dt Mode Timing Diagram. A

typical oscillator cycle is as follows: The logic section first

generates an SWDR signal that powers up the current

comparator and allows it time to settle. About 1µs later, the

SWON signal is asserted and the BOOST signal is pulsed

for a few hundred nanoseconds. After a short delay, the

pin slews rapidly to V

. Later, after the peak switch

current indicated by the control voltage V

has been

reached (current mode control), the SWON and SWDR

signals are turned off, and SWOFF is pulsed for several

hundred nanoseconds. The use of an explicit turn-off

device, i.e., Q5, improves turn-off response time and thus

aids both controllability and efficiency.

LT1776

OPERATIO

The system as previously described handles heavy loads

(continuous mode) at good efficiency, but it is actually

counterproductive for light loads. The method of jam-

ming charge into the PNP bases makes it difficult to turn

them off rapidly and achieve the very short switch ON

times required by light loads in discontinuous mode.

Further

more, the high leading edge dV/dt rate similarly

adversely affects light load controllability.

The solution is to employ a “boost comparator” whose

inputs are the V

control voltage and a fixed internal

threshold reference, V

. (Remember that in a current

mode switching topology, the V

voltage determines the

peak switch current.) When the V

signal is above V

, the

previously described “high dV/dt” action is performed.

When the V

signal is below V

, the boost pulses are

absent, as can be seen in the Low dV/dt Mode Timing

Diagram. Now the DC current, activated by the SWON

signal alone, drives Q4 and this transistor drives Q1 by

itself. The absence of a boost pulse, plus the lack of a

second NPN driver, result in a much lower slew rate which

aids light load controllability.

A further aid to overall efficiency is provided by the

specialized bias regulator circuit, which has a pair of

inputs, V

and V

. The V

pin is normally connected to

the switching supply output. During start-up conditions,

the LT1776 powers itself directly from V

. However, after

the switching supply output voltage reaches about 2.9V,

the bias regulator uses this supply as its input. Previous

generation buck controller ICs without this provision

typically required hundreds of milliwatts of quiescent

power when operating at high input voltage. This both

degraded efficiency and limited available output current

due to internal heating.

APPLICATIONS INFORMATION

WUUU

Selecting a Power Inductor

There are several parameters to consider when selecting

a power inductor. These include inductance value, peak

current rating (to avoid core saturation), DC resistance,

construction type, physical size, and of course, cost.

In a typical application, proper inductance value is dictated

by matching the discontinuous/continuous crossover point

with the LT1776 internal low-to-high dV/dt threshold. This

is the best compromise between maintaining control with

light loads while maintaining good efficiency with heavy

loads. The fixed internal dV/dt threshold has a nominal

value of 1.4V, which referred to the V

pin threshold and

control voltage to switch transconductance, corresponds

to a peak current of about 200mA. Standard buck con-

verter theory yields the following expression for induc-

tance at the discontinuous/continuous crossover:

OUT

IN OUT

=

















•

–

For example, substituting 40V, 5V, 200mA and 200kHz

respectively for V

, V

OUT

, I

and f yields a value of about

100µH. Note that the left half of this expression is indepen-

dent of input voltage while the right half is only a weak

function of V

when V

is much greater than V

OUT

. This

means that a single inductor value will work well over a

range of “high” input voltage. And although a progres-

sively smaller inductor is suggested as V

begins to

approach V

OUT

, note that the much higher ON duty cycles

under these conditions are much more forgiving with

respect to controllability and efficiency issues. Therefore

when a wide input voltage range must be accommodated,

say 10V to 40V for 5V

OUT

, the user should choose an

inductance value based on the maximum input voltage.

Once the inductance value is decided, inductor peak

current rating and resistance need to be considered. Here,

the inductor peak current rating refers to the onset of

saturation in the core material, although manufacturers

sometimes specify a “peak current rating” which is de-

rived from a worst-case combination of core saturation

and self-heating effects. Inductor winding resistance alone

LT1776

APPLICATIONS INFORMATION

WUUU

limits the inductor’s current carrying capability as the I

power threatens to overheat the inductor. If applicable,

remember to include the condition of output short circuit.

Although the peak current rating of the inductor can be

exceeded in short-circuit operation, as core saturation per

se is not destructive to the core, excess resistive self-

heating is still a potential problem.

The final inductor selection is generally based on cost,

which usually translates into choosing the smallest physi-

cal size part that meets the desired inductance value,

resistance and current carrying capability. An additional

factor to consider is that of physical construction. Briefly

stated, “open” inductors built on a rod- or barrel-shaped

core generally offer the smallest physical size and lowest

cost. However their open construction does not contain

the resulting magnetic field, and they may not be accept-

able in RFI-sensitive applications. Toroidal style induc-

tors, many available in surface mount configuration, offer

improved RFI performance, generally at an increase in

cost and physical size. And although custom design is

always a possibility, most potential LT1776 applications

can be handled by the array of standard, off-the-shelf

inductor products offered by the major suppliers.

Selecting Freewheeling Diode

Highest efficiency operation requires the use of a Schottky

type diode. DC switching losses are minimized due to its

low forward voltage drop, and AC behavior is benign due

to its lack of a significant reverse recovery time. Schottky

diodes are generally available with reverse voltage ratings

of 60V and even 100V, and are price competitive with other

types.

The use of so-called “ultrafast” recovery diodes is gener-

ally not recommended. When operating in continuous

mode, the reverse recovery time exhibited by “ultrafast”

diodes will result in a slingshot type effect. The power

internal switch will ramp up V

current into the diode in an

attempt to get it to recover. Then, when the diode has

finally turned off, some tens of nanoseconds later, the V

node voltage ramps up at an extremely high dV/dt, per-

haps 5 to even 10V/ns! With real world lead inductances,

the V

node can easily overshoot the V

rail. This can

result in poor RFI behavior and if the overshoot is severe

enough, damage the IC itself.

Selecting Bypass Capacitors

The basic topology as shown in Figure 1 uses two bypass

capacitors, one for the V

input supply and one for the

OUT

output supply.

User selection of an appropriate output capacitor is rela-

tively easy, as this capacitor sees only the AC ripple current

in the inductor. As the LT1776 is designed for buck or

step-down applications, output voltage will nearly always

be compatible with tantalum type capacitors, which are

generally available in ratings up to 35V or so. These

tantalum types offer good volumetric efficiency and many

are available with specified ESR performance. The product

of inductor AC ripple current and output capacitor ESR will

manifest itself as peak-to-peak voltage ripple on the output

node. (Note: If this ripple becomes too large, heavier

control loop compensation, at least at the switching fre-

quency, may be required on the V

pin.) The most de-

manding applications, requiring very low output ripple,

may be best served not with a single extremely large

output capacitor, but instead by the common technique of

a separate L/C lowpass post filter in series with the output.

(In this case, “Two caps are better than one”.)

The input bypass capacitor is normally a more difficult

choice. In a typical application e.g., 40V

to 5V

OUT

relatively heavy V

current is drawn by the power switch

for only a small portion of the oscillator period (low ON

duty cycle). The resulting RMS ripple current, for which

the capacitor must be rated, is often several times the DC

average V

current. Similarly, the “glitch” seen on the V

supply as the power switch turns on and off will be related

to the product of capacitor ESR, and the relatively high

instantaneous current drawn by the switch. To compound

these problems is the fact that most of these applications

will be designed for a relatively high input voltage, for

which tantalum capacitors are generally unavailable. Rela-

tively bulky “high frequency” aluminum electrolytic types,

specifically constructed and rated for switching supply

applications, may be the only choice.

LT1776

Input Voltage vs Operating Frequency Considerations

The absolute maximum input supply voltage for the LT1776

is specified at 60V. This is based solely on internal semi-

conductor junction breakdown effects. Due to internal

power dissipation, the actual maximum V

achievable in

a particular application may be less than this.

A detailed theoretical basis for estimating internal power

loss is given in the section, Thermal Considerations. Note

that AC switching loss is proportional to both operating

frequency and output current. The majority of AC switch-

ing loss is also proportional to the square of input voltage.

For example, while the combination of V

= 40V, V

OUT

5V at 500mA and f

OSC

= 200kHz may be easily achievable,

simultaneously raising V

to 60V and f

OSC

to 400kHz is

not possible. Nevertheless, input voltage

transients

up to

60V can usually be accommodated, assuming the result-

ing increase in internal dissipation is of insufficient time

duration to raise die temperature significantly.

A second consideration is controllability. A potential limi-

tation occurs with a high step-down ratio of V

to V

OUT

as this requires a correspondingly narrow minimum switch

ON time. An approximate expression for this (assuming

continuous mode operation) is given as follows:

MVV

ON OUT F

IN OSC

in t =+

()

where:

= input voltage

OUT

= output voltage

= Schottky diode forward drop

OSC

= switching frequency

It is important to understand the nature of minimum

switch ON time as given in the data sheet. This test is

intended to mimic behavior under short-circuit condi-

tions. It is performed with the V

control voltage at its

clamp level (V

) and uses a fixed resistive load from V

to ground for simplicity. The resulting ON time behavior is

overconservative as a general operating design value for

two reasons. First, actual power supply application cir-

cuits present an inductive load to the V

node. The

APPLICATIONS INFORMATION

WUUU

resulting ramping current behavior helps overdrive the

current comparator (current mode switching) and reduce

its propagation delay, hastening output switch turnoff.

Second, and more importantly, actual power supply op-

eration involves a feedback amplifier that adjusts the V

node control voltage to maintain proper output voltage. As

progressively shorter ON times are required, the feedback

loop acts to reduce V

, and the resulting overdrive further

reduces the propagation delay in the current comparator.

A suggested worst-case limit for minimum switch ON time

in actual operation is 350ns.

A potential controllability problem arises if the LT1776 is

called upon to produce an ON time shorter than its ability.

Feedback loop action will lower then reduce the V

control

voltage to the point where some sort of cycle-skipping or

odd/even cycle behavior is exhibited.

In summary:

1. Be aware that the simultaneous requirements of high

, high I

OUT

and high f

OSC

may not be achievable in

practice due to internal dissipation. The Thermal Con-

siderations section offers a basis to estimate internal

power. In questionable cases a prototype supply should

be built and exercised to verify acceptable operation.

2. The simultaneous requirements of high V

, low V

OUT

and high f

OSC

can result in an unacceptably short

minimum switch ON time. Cycle skipping and/or odd/

even cycle behavior will result although correct output

voltage is usually maintained.

Minimum Load Considerations

As discussed previously, a lightly loaded LT1776 with V

pin control voltage below the boost threshold will operate

in low dV/dt mode. This affords greater controllability at

light loads, as minimum t

requirements are relaxed.

However, some users may be indifferent to pulse skipping

behavior, but instead may be concerned with maintaining

maximum possible efficiency at light loads. This require-

ment can be satisfied by forcing the part into Burst Mode

operation. The use of an external comparator whose

Burst Mode is a trademark of Linear Technology Corporation.

LT1776

APPLICATIONS INFORMATION

WUUU

output controls the shutdown pin allows high efficiency at

light loads through Burst Mode operation behavior (see

Typical Applications and Figure 8).

Maximum Load/Short-Circuit Considerations

The LT1776 is a current mode controller. It uses the V

node voltage as an input to a current comparator which

turns off the output switch on a cycle-by-cycle basis as

this peak current is reached. The internal clamp on the V

node, nominally 2V, then acts as an output switch peak

current limit. This action becomes the switch current limit

specification. The maximum available output power is

then determined by the switch current limit.

A potential controllability problem could occur under

short-circuit conditions. If the power supply output is

short circuited, the feedback amplifier responds to the low

output voltage by raising the control voltage, V

, to its

peak current limit value. Ideally, the output switch would

be turned on, and then turned off as its current exceeded

the value indicated by V

. However, there is finite response

time involved in both the current comparator and turnoff

of the output switch. These result in a minimum ON time

ON(MIN)

. When combined with the large ratio of V

+ I • R), the diode forward voltage plus inductor I • R

voltage drop, the potential exists for a loss of control.

Expressed mathematically the requirement to maintain

control is:

ft VIR

ON F

••

≤+

where:

f = switching frequency

= switch ON time

= diode forward voltage

= Input voltage

I • R = inductor I • R voltage drop

If this condition is not observed, the current will not be

limited at I

, but will cycle-by-cycle ratchet up to some

higher value. Using the nominal LT1776 clock frequency

of 200KHz, a V

of 40V and a (V

+ I • R) of say 0.7V, the

maximum t

to maintain control would be approximately

90ns, an unacceptably short time.

The solution to this dilemma is to slow down the oscillator

when the FB pin voltage is abnormally low thereby indicat-

ing some sort of short-circuit condition. Figure 2 shows

the typical response of Oscillator Frequency vs FB divider

Thevenin voltage and impedance. Oscillator frequency is

unaffected until FB voltage drops to about 2/3 of its normal

value. Below this point the oscillator frequency decreases

roughly linearly down to a limit of about 30kHz. This lower

oscillator frequency during short-circuit conditions can

then maintain control with the effective minimum ON time.

A further potential problem with short-circuit operation

might occur if the user were operating the part with its

oscillator slaved to an external frequency source via the

SYNC pin. However, the LT1776 has circuitry that auto-

matically disables the sync function when the oscillator is

slowed down due to abnormally low FB voltage.

FB DIVIDER THEVENIN VOLTAGE (V)

OSC

(kHz)

100

150

200

0.25 0.50 0.75 1.00

1776 F02

1.25

LT1776

= 22k

= 10k

= 4.7k

Figure 2. Oscillator Frequency vs FB Divider

Thevenin Voltage and Impedance

Feedback Divider Considerations

An LT1776 application typically includes a resistive divider

between V

OUT

and ground, the center node of which drives

the FB pin to the reference voltage V

REF

. This establishes

a fixed ratio between the two resistors, but a second

degree of freedom is offered by the overall impedance level

of the resistor pair. The most obvious effect this has is one

of efficiency—a higher resistance feedback divider will

waste less power and offer somewhat higher efficiency,

especially at light load.

LT1776

APPLICATIONS INFORMATION

WUUU

= 1/2 • V

• I

OUT

• (t

+ t

+ 30ns) • f

= (V

/1.6)ns in high dV/dt mode

/0.16)ns in low dV/dt mode

= (V

/1.6)ns (irrespective of dV/dt mode)

f = switching frequency

Total power dissipation of the die is simply the sum of

quiescent, DC and AC losses previously calculated.

D(TOTAL)

= P

+ P

Frequency Compensation

Loop frequency compensation is performed by connect-

ing a capacitor, or in most cases a series RC, from the

output of the error amplifier (V

pin) to ground. Proper

loop compensation may be obtained by empirical meth-

ods as described in detail in Application Note 19. Briefly,

this involves applying a load transient and observing the

dynamic response over the expected range of V

and

LOAD

values.

As a practical matter, a second small capacitor, directly

from the V

pin to ground is generally recommended to

attenuate capacitive coupling from the V

pin. A typical

value for this capacitor is 100pF. (See Switch Node Con-

siderations).

Switch Node Considerations

For maximum efficiency, switch rise and fall times are

made as short as practical. To prevent radiation and high

frequency resonance problems, proper layout of the com-

ponents connected to the IC is essential, especially the

power path. B field (magnetic) radiation is minimized by

keeping output diode, switch pin and input bypass capaci-

tor leads as short as possible. E field radiation is kept low

by minimizing the length and area of all traces connected

to the switch pin (V

). A ground plane should always be

used under the switcher circuitry to prevent interplane

coupling.

However, remember that oscillator slowdown to achieve

short-circuit protection (discussed above) is dependent

on FB pin behavior, and this in turn, is sensitive to FB node

external impedance. Figure 2 shows the typical relation-

ship between FB divider Thevenin voltage and impedance,

and oscillator frequency. This shows that as feedback

network impedance increases beyond 10k, complete os-

cillator slowdown is not achieved, and short-circuit pro-

tection may be compromised. And as a practical matter,

the product of FB pin bias current and larger FB network

impedances will cause increasing output voltage error.

(Nominal cancellation for 10k of FB Thevenin impedance

is included internally.)

Thermal Considerations

Care should be taken to ensure that the worst-case input

voltage and load current conditions do not cause exces-

sive die temperatures. The packages are rated at 110°C/W

for the 8-pin SO (S8) and 130°C/W for 8-pin PDIP (N8).

Quiescent power is given by:

= I

• V

+ I

VCC

• V

OUT

(This assumes that the V

pin is connected to V

OUT

Power loss internal to the LT1776 related to actual output

current is composed of both DC and AC switching losses.

These can be roughly estimated as follows:

DC switching losses are dominated by output switch “ON

voltage”, i.e.,

= V

• I

OUT

• DC

= Output switch ON voltage, typically 1V at 500mA

OUT

= Output current

DC = ON duty cycle

AC switching losses are typically dominated by power lost

due to the finite rise time and fall time at the V

node.

Assuming, for simplicity, a linear ramp up of both voltage

and current and a current rise/fall time equal to 15ns,

LT1776

APPLICATIONS INFORMATION

WUUU

The high speed switching current path is shown schemati-

cally in Figure 3. Minimum lead length in these paths is

essential to ensure clean switching and minimal EMI. The

paths containing the input capacitor, output switch and

output diode are the only ones containing nanosecond rise

and fall times. Keep these paths as short as possible.

As an example, assume that the capacitance between the

node and a high impedance pin node is 0.1pF, and

further assume that the high impedance node in question

exhibits a capacitance of 1pF to ground. Due to the high

dV/dt, large excursion behavior of the V

node, this will

couple a nearly 4V transient to the high impedance pin,

causing abnormal operation. (This assumes the “typical”

40V

to 5V

OUT

application.) An explicit 100pF capacitor

added to the node will reduce the amplitude of the distur-

bance to more like 50mV (although settling time will

increase).

Specific pin recommendations are as follows:

SHDN: If unused, add a 100pF capacitor to ground.

SYNC: Ground if unused.

: Add a capacitor directly to ground in addition to the

explicit compensation network. A value of one-tenth of

the main compensation capacitor is recommended, up

to a maximum of 100pF.

FB: Assuming the V

pin is handled properly, this pin

usually requires no explicit capacitor of its own, but

keep this node physically small to minimize stray

capacitance.

LT1776 V

OUT

1776 F03

Figure 3. High Speed Current Switching Paths

Additionally, it is possible for the LT1776 to cause EMI

problems by “coupling to itself”. Specifically, this can

occur if the V

pin is allowed to capacitively couple in an

uncontrolled manner to the part’s high impedance nodes,

i.e., SHDN, SYNC, V

and FB. This can cause erratic

operation such as odd/even cycle behavior, pulse width

“nervousness”, improper output voltage and/or prema-

ture current limit action.

LT1776

TYPICAL APPLICATIONS

Minimum Component Count Application

Figure 4a shows a basic “minimum component count”

application. The circuit produces 5V at up to 500mA I

OUT

with input voltages in the range of 10V to 40V. The typical

OUT

efficiency is shown in Figure 4b. As shown, the

SHDN and SYNC pins are unused, however either (or both)

can be optionally driven by external signals as desired.

User-Programmable Undervoltage Lockout

Figure 5 adds a resistor divider to the basic application.

This is a simple, cost-effective way to add a user-

programmable undervoltage lockout (UVLO) function.

Resistor R5 is chosen to have approximately 200µA

through it at the nominal SHDN pin lockout threshold of

1.25V. The somewhat arbitrary value of 200µA was

C1: PANASONIC HFQ

C2: AVX D CASE TPSD107M010R0080

C4, C5: X7R OR COG/NPO

D1: MOTOROLA 100V, 1A, SMD SCHOTTKY

L1: COILCRAFT DO3316P-104

39µF

63V

1776 F04a

10V TO

40V

100µF

10V

MBRS1100 R1

36.5k

OUT

0mA to 500mA

12.1k

22k

100µH

2200pF

X7R C4

100pF

FOR 3.3V V

OUT

VERSION:

R1: 24.3K, R2: 14.7k

L1: 68µH, DO3316P-683

OUT

: 0mA TO 500mA

LT1776

SHDN

SYNC

GND

Figure 4a. Minimum Component Count Application

ILOAD (mA)

EFFICIENCY (%)

10 100 1000

1776 F04b

VIN = 10V

VIN = 20V

VIN = 30V VIN = 40V

Figure 4b. POUT/PIN Efficiency

LT1776

TYPICAL APPLICATIONS

chosen to be significantly above the SHDN pin input

current to minimize its error contribution, but signifi-

cantly below the typical 3.8mA the LT1776 draws in

lockout mode. Resistor R4 is then chosen to yield this

same 200µA, less 2.5µA, with the desired V

UVLO

voltage minus 1.25V applied across it. (The 2.5µA factor

is an allowance to minimize error due to SHDN pin input

current.)

Behavior is as follows: Normal operation is observed at the

nominal input voltage of 40V. As the input voltage is

decreased to roughly 32V, switching action will stop, V

OUT

will drop to zero, and the LT1776 will draw its V

and V

quiescent currents from the V

supply. At a much lower

input voltage, typically 14V or so at 25°C, the voltage on

the SHDN pin will drop to the shutdown threshold, and the

part will draw its shutdown current only from the V

rail.

The resistive divider of R4 and R5 will continue to draw

power from V

. (The user should be aware that while the

SHDN pin

lockout

threshold is relatively accurate includ-

ing temperature effects, the SHDN pin

shutdown

thresh-

old is more coarse, and exhibits considerably more

temperature drift. Nevertheless the shutdown threshold

will always be well below the lockout threshold.)

Minimum Size Inductor Application

Figure 4a employs power path parts that are capable of

delivering the full rated output capability of the LT1776.

Potential users with low output current requirements may

be interested in substituting a physically smaller and less

costly power inductor. The circuit shown in Figure 6a is

topologically identical to the basic application, but speci-

fies a much smaller inductor. This circuit is capable of

delivering up to 400mA at 5V, or, up to 500mA at 3.3V. The

only disadvantage is that due to the increased resistance

in the inductor, the circuit is no longer capable of with-

standing indefinite short circuits to ground. The LT1776

will still current limit at its nominal I

LIM

value, but this will

overheat the inductor. Momentary short circuits of a few

seconds or less can still be tolerated. Typical efficiency is

shown in Figure 6b.

1776 F05

D1 R1

OUT

158k

6.19k

LT1776

SHDN

SYNC

GND

Figure 5. User Programmable Undervoltage Lockout

LT1776

TYPICAL APPLICATIONS

(a)

C1: PANASONIC HFQ 39µF AT 63V

C2: AVX D CASE 100µF 10V

TPSD107M010R0080

C3: 2200pF, X7R

1776 F06a

10V TO

40V

D1 R1

36.5k

OUT

0mA to 400mA

12.1k

22k

68µH

C3 C4

C4, C5: 100pF, X7R OR COG/NPO

D1: MOTOROLA 100V, 1A, SMD SCHOTTKY

MBRS1100 (T3)

L1: COILCRAFT DO1608C-683

FOR 3.3V V

OUT

VERSION:

OUT

: 0mA TO 500mA

L1: 47µH, DO1608C-473

R1: 24.3K, R2: 14.7k

LT1776

SHDN

SYNC

GND

LOAD CURRENT (mA)

EFFICIENCY (%)

10 100 1000

1776 F06b

VIN = 10V

VIN = 20V

VIN = 30V VIN = 40V

(b)

Figure 6. Minimum Inductor Size Application

“bang-bang” digital manner, via comparator U2, an

LTC1440. Resistor divider R3/R4 provides a scaled ver-

sion of the output voltage, which is compared against U2’s

internal reference. Intentional hysteresis is set by the R5/

R6 divider. As the output voltage falls below the regulation

range, the LT1776 is turned on. The output voltage rises,

and as it climbs above the regulation range, the LT1776 is

turned off. Efficiency is maximized, as the LT1776 is only

powered up while it is providing heavy output current.

Burst Mode Operation Configuration

Figure 4b demonstrates that power supply efficiency de-

grades with lower output load current. This is not surpris-

ing, as the LT1776 itself represents a fixed power overhead.

A possible way to improve light load efficiency is in Burst

Mode operation.

Figure 7 shows the LT1776 configured for Burst Mode

operation. Output voltage regulation is now provided in a

LT1776

TYPICAL APPLICATIONS

(a)

PN2484

Q2*

2N2369

1776 F07a

–

LTC1440

REF

HYST

OUT 4

GND

D1 R1

39k

OUT

10k

22k

2.4M

323k

100k

100pF

10M

C1: PANASONIC HFQ 39µF AT 63V

C2: AVX D CASE 100µF 10V

TPSD107M010R0080

D1: MOTOROLA 100V, 1A,

SMD SCHOTTKY

MBRS1100 (T3)

L1: COILCRAFT DO3316-104

*ANY NPN WITH EMITTER-BASE

BREAKDOWN OF <7V CAN BE USED

LT1776

SHDN

SYNC 2

GND

Figure 7. Burst Mode Operation Configuration for High Efficiency at Light Load

(b)

LOAD CURRENT (mA)

EFFICIENCY (%)

10 100 1000

1776 F07b

VIN = 10V

VIN = 30V

VIN = 40V

VIN = 20V

LT1776

Figure 7b shows that efficiency is typically maintained at

75% or better down to a load current of 10mA. Even at a

load of 1mA, efficiency is still a respectable 58% to 68%,

depending on V

Resistor divider R1/R2 is still present, but does not

directly influence output voltage. It is chosen to ensure

that the LT1776 delivers high output current throughout

the voltage regulation range. Its presence is also required

to maintain proper short-circuit protection. Transistors

Q1, Q2 and resistor R7 form a high V

, low quiescent

current voltage regulator to power U2.

Wide V

Range, High Efficiency Battery Charger

The circuit on the final page of this data sheet shows the

LT1776 configured as a constant-current/constant-volt-

age battery charger. An LT1620 rail-to-rail, current sense

amplifier (U2) monitors the differential voltage across

current sense resistor R4. As this equals and exceeds the

voltage set across resistor R5 in the R5/R6 divider, the

LT1620 responds by sinking current at its I

OUT

pin. This is

connected to the V

control node of the LT1776 and

therefore acts to reduce the amount of power delivered to

the load. The overall constant-current/constant-voltage

behavior can be seen in the graph titled Battery Charger

Output Voltage vs Output Current.

Target voltage and current limits are independently pro-

grammable. Output voltage, presently 6V, is set by the

R1/R2 divider and the internal reference of the LT1776.

Output current, presently 200mA, is set by current sense

resistor R4 and the R5-R6 divider.

The circuit, as shown, accommodates an input voltage

range of 10V to 30V. The accompanying graphs display

efficiency for input voltages of 12V and 24V. The upper

input voltage limit of 30V is determined not by the LT1776,

but by the LT1121-5 regulator (U3). (A regulated 5V is

required by the LT1620.) This regulator was chosen for its

micropower behavior, which helps maintain good overall

efficiency. However, the basic catalog part is only rated to

30V. Substitution of the industry standard LM317, for

example, extends the allowable input voltage to 40V (or

more with the HV part), but its greater quiescent current

drain degrades efficiency from that shown.

A related concern in charger applications is the current

drain seen at the battery when charger power is removed.

Strictly speaking, this can occur in three separate ways:

the V

supply can go to zero (V

= short circuit), the V

supply can be disconnected (V

= open circuit) or the

SHDN function can be asserted. The worst-case is gener-

ally V

= 0V, and this situation will be assumed.

A diode is then required in the battery charger power path

to prevent reverse current flow. There are three logical

places for this diode. The first is directly in series with the

node. This has the advantage of smallest efficiency

penalty, as the diode forward drop subtracts from the

input voltage. A disadvantage is that the battery must still

power the LT1776 V

pin, yielding a current drain of

several mA. In this position the diode is called upon to

switch on and off rapidly, so a Schottky type, similar to that

used as the freewheeling diode (D1), is recommended.

Placing the diode between output filter capacitor C2 and

feedback divider R1/R2 limits the current drain to only the

current drawn by the feedback divider, perhaps 100µA or

so. However, the efficiency penalty is greater, as the diode

forward drop is now in series with the output voltage.

When absolute minimal battery drain is required, the diode

may be placed between the R1/R2 feedback divider and

the battery itself. This limits current drain to just the

reverse leakage of the diode. In this case the feedback

divider must be adjusted for the nominal forward drop of

the diode. In either of these positions, a Schottky diode will

offer the least efficiency penalty, but a standard silicon

diode can be used in the most cost sensitive applications.

TYPICAL APPLICATIONS

LT1776

Dimensions in inches (millimeters) unless otherwise noted.

PACKAGE DESCRIPTION

N8 Package

8-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)

1234

0.150 – 0.157**

(3.810 – 3.988)

8765

0.189 – 0.197*

(4.801 – 5.004)

0.228 – 0.244

(5.791 – 6.197)

0.016 – 0.050

0.406 – 1.270

0.010 – 0.020

(0.254 – 0.508)× 45°

0°– 8° TYP

0.008 – 0.010

(0.203 – 0.254)

SO8 0996

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

0.004 – 0.010

(0.101 – 0.254)

0.050

(1.270)

TYP

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

N8 1197

0.100 ± 0.010

(2.540 ± 0.254)

0.065

(1.651)

TYP

0.045 – 0.065

(1.143 – 1.651)

0.130 ± 0.005

(3.302 ± 0.127)

0.020

(0.508)

MIN

0.018 ± 0.003

(0.457 ± 0.076)

0.125

(3.175)

MIN

12 34

8765

0.255 ± 0.015*

(6.477 ± 0.381)

0.400*

(10.160)

MAX

0.009 – 0.015

(0.229 – 0.381)

0.300 – 0.325

(7.620 – 8.255)

0.325 +0.035

–0.015

+0.889

–0.381

8.255

()

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

LT1776

PART NUMBER DESCRIPTION COMMENTS

LT1076 2A, 100kHz Step-Down Switching Regulator Operation Up to 45V Input (64V for HV Version)

LTC®1149 High Efficiency Synchronous Step-Down Switching Regulator Operation Up to 48V Input, 95% Efficiency, 100% Duty Cycle

LT1374 4.5A, 500kHz Step-Down Switching Regulator Converts 12V to 3.3V at 2.5A in SO-8 Package

LT1375/LT1376 1.5A, 500kHz Step-Down Switching Regulators Operation Up to 25V Input, Synchronizable (LT1375)

LT1620 Rail-to-Rail Current Sense Amplifier Transforms Switching Regulators into High Efficiency

Battery Chargers

LT1676 Wide Input Range, High Efficiency, Step-Down Switching Regulator 7.4V to 60V Input, 100kHz Operation, 700mA Internal Switch

LT1777 Low Noise Buck Regulator Operation up to 48V, Controlled Voltage and Current

Slew Rates

 LINEAR TECHNOLOGY CORPORATION 1998

sn1776 1776fs LT/TP 0499 4K • PRINTED IN

USA

Wide VIN Range, High Efficiency Battery Charger

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900

●

FAX: (408) 434-0507

●

www.linear-tech.com

LOAD CURRENT (mA)

1776 TA03

EFFICIENCY (%)

10 1000

100

VIN = 12V

VIN = 24V

Battery Charger Efficiency—

Constant VOUT Region

OUTPUT CURRENT (mA)

OUTPUT VOLTAGE (V)

50 100 150 250200

1776 TA05

OUTPUT VOLTAGE (V)

1776 TA04

12 46

EFFICIENCY (%)

VIN = 12V

VIN = 24V

Battery Charger Efficiency—

Constant IOUT Region Battery Charger Output Voltage

vs Output Current

VIN

VCC

VSW

LT1776

LT1121-5

SHDN

SYNC

C1: PANASONIC HFQ

C2: AVX TPSD107M010R0080

L1: COILCRAFT DO3316P-104

39µF

63V

1776 TA02

VIN

10V TO 30V

(SEE TEXT)

GND

VCC

IN+

PROG

LT1620

IOUT

IN–

AVG

SENSE

GND

MBRS1100

46.4k

1% BATTERY

12.1k

22k

12k

100µHR4

0.5Ω

2200pF

100pF

0.1µF

100pF

0.33µF

100µF

10V

1µF

TYPICAL APPLICATION

RELATED PARTS