ICS662-03 HDTV Audio/Video Clock Source Description Features The ICS662-03 provides synchronous clock generation for audio sampling clock rates derived from an HDTV stream. The device uses the latest PLL technology to provide superior phase noise and long term jitter performance. The device also supports a 27 MHz output clock for video MPEG applications from an HDTV reference clock. * * * * * * * Please contact ICS if you have a requirement for an input and output frequency not included here. Packaged in 8-pin SOIC Available in Pb (lead) free package HDTV clock input Low phase noise Exact (0 ppm) multiplication ratios Support for 256 and 384 times sampling rate Supports 27 MHz output for video (MPEG) Block Diagram VDD SEL3:0 Control Circuitry PLL Clock Synthesis CLK REF_IN GND 1 MDS 662-03 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 033005 tel (408) 295-9800 www.icst.com ICS662-03 HDTV Audio/Video Clock Source Pin Assignment Output Clock Selection Table REF_IN 1 8 S0 VDD 2 7 S3 GND 3 6 S1 S2 4 5 CLK 8 pin (150 mil) SOIC S3 S2 S1 S0 Input Frequency (MHz) Output Frequency (MHz) 0 0 0 0 74.175824 8.192 0 0 0 1 74.175824 11.2896 12.288 0 0 1 0 74.175824 0 0 1 1 74.175824 24.576 0 1 0 0 74.175824 16.9344 0 1 0 1 74.175824 18.432 0 1 1 0 74.175824 36.864 0 1 1 1 74.175824 27 1 0 0 0 74.25 8.192 1 0 0 1 74.25 11.2896 1 0 1 0 74.25 12.288 1 0 1 1 74.25 24.576 1 1 0 0 74.25 16.9344 1 1 0 1 74.25 18.432 1 1 1 0 74.25 36.864 1 1 1 1 74.25 27 Pin Descriptions Pin Number Pin Name Pin Type 1 REF_IN Input Connect this pin to a HDTV clock input. 2 VDD Power Connect to +3.3 V. 3 GND Power Connect to ground. Output frequency selection. Determines output frequency per table above. On chip pull-up. Pin Description 4 S2 Input 5 CLK Output 6 S1 Input Output frequency selection. Determines output frequency per table above. On chip pull-up. 7 S3 Input Output frequency selection. Determines output frequency per table above. On chip pull-up. 8 S0 Input Output frequency selection. Determines output frequency per table above. On chip pull-up. 2 MDS 662-03 D Integrated Circuit Systems, Inc. Clock output. 525 Race Street, San Jose, CA 95126 Revision 033005 tel (408) 295-9800 www.icst.com ICS662-03 HDTV Audio/Video Clock Source Application Information Series Termination Resistor Decoupling Capacitors 1) Each 0.01F decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical. As with any high performance mixed-signal IC, the ICS662-03 must be isolated from system power supply noise to perform optimally. 2) To minimize EMI and obtain the best signal integrity, the 33 series termination resistor should be placed close to the clock output. Decoupling capacitors of 0.01F must be connected between VDD (pin 2) and the PCB ground plane (pin 3). 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (the ferrite bead and bulk decoupling capacitor can be mounted on the back). Other signal traces should be routed away from the ICS662-03. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Clock output traces should use series termination. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. PCB Layout Recommendations For optimum device performance and lowest output phase noise, the following guidelines should be observed. 3 MDS 662-03 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 033005 tel (408) 295-9800 www.icst.com ICS662-03 HDTV Audio/Video Clock Source Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS662-03. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 5.5 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70C Storage Temperature -65 to +150C Junction Temperature 125C Soldering Temperature 260C Recommended Operation Conditions Parameter Min. Max. Units 0 +70 C +3.0 +3.6 V Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Typ. DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V 10%, Ambient Temperature 0 to +70C Parameter Symbol Operating Voltage VDD Supply Current IDD Conditions Min. Typ. Max. Units 3.0 3.3 3.6 V No Load, first 8 modes 25 mA No Load, last 8 modes 16 mA Input High Voltage VIH Input Low Voltage VIL Output High Voltage VOH IOH = -4 mA VDD-0.4 V Output High Voltage VOH IOH = -12 mA 2.4 V Output Low Voltage VOL IOL = 12 mA Short Circuit Current IOS Each output Nominal Output Impedance 2 0.8 0.4 50 mA pF S2 pin 510 k S3, S1, S0 pins 120 k input pins Internal pull-up resistor RPU 4 V 7 CIN MDS 662-03 D V 20 ZOUT Input Capacitance Integrated Circuit Systems, Inc. V 525 Race Street, San Jose, CA 95126 Revision 033005 tel (408) 295-9800 www.icst.com ICS662-03 HDTV Audio/Video Clock Source AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V 10%, Ambient Temperature 0 to +70C Parameter Symbol Conditions tOR 20% to 80%, 15 pF load Output Clock Fall Time tOF 80% to 20%, 15 pF load Output Duty Cycle tOD at VDD/2, 15 pF load Jitter, short term tP-P 15 pF load +75 ps 27M output, 15 pF load, first 8 modes, 1000 cycles delay 900 ps 27M output, 15 pF load, last 8 modes, 1000 cycles delay 600 ps 0 ppm Output Clock Rise Time Jitter, long term Min. Typ. Max. Units 1.2 1.5 ns 1.0 1.5 ns 55 % 45 Frequency Synthesis Error Thermal Characteristics Parameter Symbol Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Min. Max. Units Still air 150 C/W JA 1 m/s air flow 140 C/W JA 3 m/s air flow 120 C/W 40 C/W JC Marking Diagram (ICS662M-03LF) 5 8 662M-03 ###### YYWW$$ 1 Typ. JA Marking Diagram (ICS662M-03) 8 Conditions 5 662M03LF ###### YYWW 4 1 4 Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. "LF" denotes Pb (lead) free package. 4. Bottom marking: (origin). Origin = country of origin if not USA. 5 MDS 662-03 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 033005 tel (408) 295-9800 www.icst.com ICS662-03 HDTV Audio/Video Clock Source Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 D 4.80 5.00 .1890 .1968 E 3.80 4.00 .1497 .1574 8 E Inches H INDEX AREA e 1 2 D 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 0 8 0 8 A h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature Tubes 8-pin SOIC 0 to +70C Tape and Reel 8-pin SOIC 0 to +70C Tubes 8-pin SOIC 0 to +70C Tape and Reel 8-pin SOIC 0 to +70C ICS662M-03 ICS662M-03TR ICS662M-03LF see page 5 ICS662M-03LFTR Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 6 MDS 662-03 D Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 Revision 033005 tel (408) 295-9800 www.icst.com