AUIRFR5305
AUIRFU5305
VDSS -55V
RDS(on) max. 0.065
ID -31A
Features
Advanced Planar Technology
Low On-Resistance
Dynamic dv/dt Rating
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
Description
Specifically designed for Automotive applications, this Cellular
Planar design of HEXFET® Power MOSFETs utilizes the latest
processing techniques to achieve low on-resistance per silicon
area. This benefit combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs are
well known for, provides the designer with an extremely efficient
and reliable device for use in Automotive and a wide variety of
other applications.
1 2015-10-12
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
AUTOMOTIVE GRADE
Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ -10V -31
A
ID @ TC = 100°C Continuous Drain Current, VGS @ -10V -22
IDM Pulsed Drain Current  -110
PD @TC = 25°C Maximum Power Dissipation 110 W
Linear Derating Factor 0.71 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy (Thermally Limited)  280
mJ
IAR Avalanche Current  -16 A
EAR Repetitive Avalanche Energy 11 mJ
dv/dt Peak Diode Recovery dv/dt -5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds (1.6mm from case) 300
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Thermal Resistance
Symbol Parameter Typ. Max. Units
RJC Junction-to-Case ––– 1.4
°C/W
RJA Junction-to-Ambient ( PCB Mount) ––– 50
RJA Junction-to-Ambient ––– 110
D-Pak
AUIRFR5305
I-Pak
AUIRFU5305
Base part number Package Type Standard Pack
Form Quantity
AUIRFU5305 I-Pak Tube 75 AUIRFU5305
AUIRFR5305 D-Pak Tube 75 AUIRFR5305
Tape and Reel Left 3000 AUIRFR5305TRL
Orderable Part Number
G D S
Gate Drain Source
G
S
D
D
S
G
D
AUIRFR/U5305
2 2015-10-12
Notes:
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
V
DD = -25V, starting TJ = 25°C, L = 2.1mH, RG = 25, IAS = -16A. (See Fig.12)
I
SD -16A, di/dt -280A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 300µs; duty cycle 2%.
This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact .
Uses IRF5305 data and test conditions.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
Uses typical socket mount.
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage -55 ––– ––– V VGS = 0V, ID = -250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– -0.034 ––– V/°C Reference to 25°C, ID = -1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.065  VGS = -10V, ID = -16A
VGS(th) Gate Threshold Voltage -2.0 ––– -4.0 V VDS = VGS, ID = -250µA
gfs Forward Trans conductance 8.0 ––– ––– S VDS = -25V, ID = -16A
IDSS Drain-to-Source Leakage Current ––– ––– -25 µA VDS = -55 V, VGS = 0V
––– ––– -250 VDS = -44V,VGS = 0V,TJ =150°C
IGSS Gate-to-Source Forward Leakage ––– ––– -100 nA VGS = -20V
Gate-to-Source Reverse Leakage ––– ––– 100 VGS = 20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg Total Gate Charge ––– ––– 63
nC
ID = -16A
Qgs Gate-to-Source Charge ––– ––– 13 VDS = -44V
Qgd Gate-to-Drain Charge ––– ––– 29 VGS = -10V, See Fig 6 and 13 
td(on) Turn-On Delay Time ––– 14 –––
ns
VDD = -28V
tr Rise Time ––– 66 ––– ID = -16A
td(off) Turn-Off Delay Time ––– 39 ––– RG = 6.8
tf Fall Time ––– 63 ––– RD = 1.6See Fig 10 
LD Internal Drain Inductance ––– 4.5 –––
nH
Between lead,
6mm (0.25in.)
LS Internal Source Inductance ––– 7.5 ––– from package
and center of die contact
Ciss Input Capacitance ––– 1200 –––
pF
VGS = 0V
Coss Output Capacitance ––– 520 ––– VDS = -25V
Crss Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz, See Fig. 5
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– -31
A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– -110 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– ––– -1.3 V TJ = 25°C,IS = -16A,VGS = 0V 
trr Reverse Recovery Time ––– 71 110 ns TJ = 25°C ,IF = -16A
Qrr Reverse Recovery Charge ––– 170 250 nC di/dt = 100A/µs 
AUIRFR/U5305
3 2015-10-12
Fig. 2 Typical Output Characteristics
Fig. 3 Typical Transfer Characteristics Fig. 4 Normalized On-Resistance
vs. Temperature
Fig. 1 Typical Output Characteristics
1
10
100
1000
0.1 1 10 100
D
DS
20µs PULSE WIDTH
T = 25°C
c
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-4.5V
1
10
100
1000
0.1 1 10 100
D
DS
A
-I , Drain-to-Source Current (A)
-V , Drain-to-Source Voltage (V)
VGS
TOP - 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
-4.5V
20µs PULSE WIDTH
T = 175°C
C
1
10
100
45678910
T = 2C
J
T = 175°C
J
A
V = -25V
20µs PULSE WIDTH
DS
GS
-V , Gate-to-Source Voltage (V)
D
-I , Drain-to-Source Current (A)
0.0
0.5
1.0
1.5
2.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
A
I = -27A
V = -10V
D
GS
AUIRFR/U5305
4 2015-10-12
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig. 7 Typical Source-to-Drain Diode
Forward Voltage
0
500
1000
1500
2000
2500
110100
C, Capacitance (pF)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
DS
-V , Drain-to-Source Voltage (V)
0
4
8
12
16
20
0 102030405060
Q , Total Gate Charge (nC)
G
A
FOR TEST CIRCUIT
SEE FIGURE 13
V = -44V
V = -28V
I = -16A
GS
-V , Gate-to-Source Voltage (V)
D
DS
DS
10
100
1000
0.4 0.8 1.2 1.6 2.0
T = 25°C
J
V = 0V
GS
SD
SD
A
-I , Reverse Drain Current (A)
-V , Source-to-Drain Voltage (V)
T = 175°C
J
1
10
100
1000
110100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
DS
-V , Drain-to-Source Voltage (V)
D
-I , Drain Current (A)
AUIRFR/U5305
5 2015-10-12
Fig 10a. Switching Time Test Circuit
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10b. Switching Time Waveforms
25 50 75 100 125 150 175
0
5
10
15
20
25
30
35
T , Case Temperature ( C)
-I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1
Not es:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
AUIRFR/U5305
6 2015-10-12
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
Fig 13b. Gate Charge Test Circuit
Fig 13a. Gate Charge Waveform
0
100
200
300
400
500
600
700
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
A
Starting T , Junction Temperature (°C)
V = -25V
I
TOP -6.6A
-11A
BOTTOM -16A
DD
D
AUIRFR/U5305
7 2015-10-12
Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
AUIRFR/U5305
8 2015-10-12
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))
YWWA
XX XX
Date Code
Y= Year
WW= Work Week
AUFR5305
Lot Code
Part Number
IR Logo
D-Pak (TO-252AA) Part Marking Information
AUIRFR/U5305
9 2015-10-12
I-Pak (TO-251AA) Part Marking Information
YWWA
XX XX
Date Code
Y= Year
WW= Work Week
AUFU5305
Lot Code
Part Number
IR Logo
I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
AUIRFR/U5305
10 2015-10-12
D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 ) FEED DIRECTION FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH
AUIRFR/U5305
11 2015-10-12
Qualification Information
Qualification Level
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
D-Pak MSL1
I-Pak
ESD
Machine Model Class M2 (+/- 200V)
AEC-Q101-002
Human Body Model Class H1B (+/- 1000V)
AEC-Q101-001
Charged Device Model Class C5 (+/- 1125V)
AEC-Q101-005
RoHS Compliant Yes
Moisture Sensitivity Level
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
Revision History
Date Comments
10/12/2015  Updated datasheet with corporate template
 Corrected ordering table on page 1.
† Highest passing voltage.