This is information on a product in full production.
September 2013 Doc ID 17703 Rev 4 1/37
1
VND5E025AY-E
Double channel high-side driver with analog current sense
for automotive applications
Datasheet − production data
Features
■General
– Very low standby current
– 3 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
– Very low current sense leakage
■Diagnostic functions
– Proportional load current sense
– OFF-state open-load detection
– Current sense disable
– Thermal shutdown indication
– Output short to VCC detection
– Over load and short to ground (power
limitation) indication
■Protection
– Undervoltage shutdown
– Over voltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Over temperature shutdown with
autorestart (thermal shutdown)
– Reverse battery protection with self switch
on of the Power MOSFET
– Electrostatic discharge protection
– Inrush current active management by
power limitation
Applications
■All types of resistive, inductive and capacitive
loads
Description
The VND5E025AY-E is a double-channel
high-side driver manufactured using
STMicroelectronics® proprietary VIPower®
M0-5 technology and housed in PowerSSO-36
package. The VND5E025AY-E is designed to
drive 12 V automotive grounded loads, and to
provide protection and diagnostics. It also
implements a 3 V and 5 V CMOS-compatible
interface for use with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with auto-
restart and overvoltage active clamp.
A dedicated analog current sense pin is
associated with every output channel providing
enhanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication,
overtemperature indication, short-circuit to VCC
diagnosis.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to share the external sense
resistor with similar devices.
Max transient supply voltage VCC 41V
Operating voltage range VCC 4.5 V to 28 V
Typ on-state resistance (per ch.) RON 25 mΩ
Current limitation (typ) ILIMH 47 A
Off state supply current IS2 µA(1)
1. Typical value with all loads connected.
PowerSSO-36
www.st.com
Contents VND5E025AY-E
2/37 Doc ID 17703 Rev 4
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.3 Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3.1 Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . . 26
3.4 Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 28
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1 PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2 PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
VND5E025AY-E List of tables
Doc ID 17703 Rev 4 3/37
List of tables
Table 1. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC =13V; T
j= 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Open-load detection (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 16. PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 17. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
List of figures VND5E025AY-E
4/37 Doc ID 17703 Rev 4
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Delay response time between rising edge of output current and rising edge of current sense
(CS enabled)14
Figure 8. Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 11. Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 16. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 17. High-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 18. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 19. High-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 20. Low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 21. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 22. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 23. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 25. ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 28. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 29. Low-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 30. High-level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 31. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 34. PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 35. Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . . 30
Figure 36. PowerSSO-36 thermal impedance junction ambient single pulse (one channel on) . . . . . 30
Figure 37. Thermal fitting model of a double-channel HSD in PowerSSO-36 . . . . . . . . . . . . . . . . . . 31
Figure 38. PowerSSO-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 39. PowerSSO-36 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 40. PowerSSO-36 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
VND5E025AY-E Block diagram and pin description
Doc ID 17703 Rev 4 5/37
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin function
Name Function
VCC Battery connection
OUT1,2 Power output
GND Ground connection
IN1,2
Voltage controlled input pins with hysteresis, CMOS compatible. They controls
output switch state
CS1,2 Analog current sense pins, they deliver a current proportional to the load current
CS_DIS Active high CMOS compatible pin, to disable the current sense pin
Control & Diagnostic 2
VCC
CH 1
Control & Diagnostic 1
LOGIC
DRIVER
VON
Limitation
Current
Limitation
Power
Clamp
Over
temp.
Undervoltage
VSENSEH
Current
Sense CH 2
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
IN1
IN2
CS1
CS2
CS_
DIS
GND
OUT2
OUT1
Signal Clamp Reverse
Battery
Protection
Fault
Block diagram and pin description VND5E025AY-E
6/37 Doc ID 17703 Rev 4
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection /
pin Current sense N.C. Output Input CS_DIS
Floating Not allowed X(1)
1. X: do not care.
XX X
To ground Through 1 KΩ
resistor X Not allowed Through 10 KΩ
resistor
Through 10 KΩ
resistor
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065
065
065
065
065
065
$4
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065
065
065
065
065
065
065
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VND5E025AY-E Electrical specifications
Doc ID 17703 Rev 4 7/37
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the Ta bl e 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to the conditions in table below for extended periods may affect device reliability.
V
Fn
I
S
I
GND
V
CC
V
CC
V
SENSE2
OUT1
I
OUT1
I
SENSE1
IN1
I
IN1
V
IN2
V
OUT2
GND
CS_DIS
I
CSD
V
CSD
IN2
I
IN2
V
IN1
CS1
OUT2
I
OUT2
I
SENSE2
V
SENSE1
V
OUT1
CS2
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
-VCC Reverse DC supply voltage 16 V
VCC_LSC
Maximum supply voltage for full protection to short-circuit
(AEC-Q100-012) 18 V
IOUT DC output current Internally limited A
-IOUT Reverse DC output current 35 A
IIN DC input current -1 to 10 mA
ICSD DC current sense disable input current -1 to 10 mA
VCSENSE Current sense maximum voltage VCC - 41
+VCC
V
V
EMAX
Maximum switching energy (single pulse)
(L = 0.26 mH; RL=0Ω; VBAT =13.5V; T
jstart = 150°C;
IOUT =I
limL(Typ.))
29 mJ
Electrical specifications VND5E025AY-E
8/37 Doc ID 17703 Rev 4
2.2 Thermal data
VESD
Electrostatic discharge
(human body model: R = 1.5 KΩ; C = 100 pF)
–IN
–CS
–CS_DIS
–OUT
–V
CC
4000
2000
4000
5000
5000
V
VESD Charge device model (CDM-AEC-Q100-011) 750 V
TjJunction operating temperature -40 to 150 °C
Tstg Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Maximum value Unit
Rthj-case Thermal resistance junction-case (with one channel on) 1.4 °C/W
Rthj-amb Thermal resistance junction-ambient (MAX) See Figure 35 in the
thermal section °C/W
VND5E025AY-E Electrical specifications
Doc ID 17703 Rev 4 9/37
2.3 Electrical characteristics
Values specified in this section are for 8 V < VCC < 28 V; -40°C < Tj< 150°C, unless
otherwise specified.
a
Table 5. Power section
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC Operating supply voltage 4.5 13 28 V
VUSD Undervoltage shutdown 3.5 4.5 V
VUSDhyst
Undervoltage shutdown
hysteresis 0.5 V
RON ON-state resistance
IOUT =3A; T
j=25°C 25
mΩIOUT =3A; T
j= 150°C 50
IOUT =3A; V
CC =5V; T
j=25°C 35
RON REV
Reverse battery
ON-state resistance
VCC =-13V; I
OUT =-3A;
Tj=25°C 25 mΩ
Vclamp Clamp voltage IS=20mA 41 46 52 V
ISSupply current
Off-state: VCC =13V;T
j=25°C;
VIN =V
OUT =V
SENSE =V
CSD =0V 2(1)
1. PowerMOS leakage included.
5(1) µA
On-state: VCC =13V; V
IN =5V;
IOUT =0A 3.5 6.5 mA
IL(off)
OFF-state
output current (2)
2. For each channel.
VIN =V
OUT =0V; V
CC =13V;
Tj=25°C 00.013
µA
VIN =V
OUT =0V; V
CC =13V;
Tj=125°C 05
Table 6. Switching (VCC =13V; T
j=25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL= 4.3 Ω (see Figure 6)—20—µs
td(off) Turn-off delay time RL= 4.3 Ω (see Figure 6)—20—µs
(dV
OUT
/dt)
on
Turn-on voltage
slope RL= 4.3 Ω—See
Figure 26 —V/µs
(dV
OUT
/dt)
off
Turn-off voltage
slope RL= 4.3 Ω—See
Figure 27 —V/µs
WON
Switching energy
losses during twon
RL= 4.3 Ω (see Figure 6) — 0.25 — mJ
WOFF
Switching energy
losses during twoff
RL= 4.3 Ω (see Figure 6)—0.3—mJ
Electrical specifications VND5E025AY-E
10/37 Doc ID 17703 Rev 4
)
Table 7. Current sense (8 V < VCC <18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
K0IOUT/ISENSE
IOUT = 0.5 A; VSENSE =0.5V
Tj= -40°C to 150°C 1000 2900 5000
K1IOUT/ISENSE
IOUT =2A; V
SENSE =0.5V
Tj= -40°C to 150°C
Tj= 25°C to 150°C
1900
2240
3000
3000
3810
3520
dK1/K1(1) Current sense ratio drift
IOUT =2A; V
SENSE =0.5V;
VCSD =0V;
Tj= -40°C to 150°C
-9 9 %
K2IOUT/ISENSE
IOUT =3A; V
SENSE =4V
Tj= -40 °C to 150 °C
Tj= 25 °C to 150 °C
2230
2460
3000
3000
3550
3350
dK2/K2(1) Current sense ratio drift
IOUT =3A; V
SENSE =4V;
VCSD =0V;
Tj= -40°C to 150°C
-6 6 %
K3IOUT/ISENSE
IOUT =10A; V
SENSE =4V
Tj= -40°C to 150°C
Tj= 25°C to 150°C
2710
2780
2900
2900
3150
3080
dK3/K3(1) Current sense ratio drift
IOUT =10A; V
SENSE =4V;
VCSD =0V;
Tj= -40°C to 150°C
-3 3 %
ISENSE0
Analog sense leakage
current
IOUT =0A; V
SENSE =0V;
VCSD =5V; V
IN =0V;
Tj= -40°C to 150°C
01
µA
IOUT =0A; V
SENSE =0V;
VCSD =0V; V
IN =5V;
Tj= -40°C to 150°C
02
IOUT =3A; V
SENSE =0V;
VCSD =V
IN =5V; 01
VSENSE
Max analog sense output
voltage IOUT =15A; V
CSD =0V 5 V
VSENSEH
Analog sense output
voltage in fault condition(2) VCC =13V; R
SENSE =10 KΩ8V
ISENSEH
Analog sense output
current in fault condition(2) VCC =13V; V
SENSE =5V 9 mA
t
DSENSE1H
Delay response time from
falling edge of CS_DIS pin
VSENSE <4V;
0.5 A < IOUT <10A;
ISENSE = 90% of ISENSE max
(see Figure 4)
20 100 µs
t
DSENSE1L
Delay response time from
rising edge of CS_DIS pin
VSENSE <4V;
0.5 A < IOUT <10A;
ISENSE =10% of I
SENSE max
(see Figure 4)
520µs
VND5E025AY-E Electrical specifications
Doc ID 17703 Rev 4 11/37
t
DSENSE2H
Delay response time from
rising edge of
IN pin
VSENSE <4V;
0.5 A < IOUT <10A;
ISENSE =90% of I
SENSE max
(see Figure 4)
70 300 µs
ΔtDSEN
SE
2H
Delay response time
between rising edge of
output current and rising
edge of current sense
VSENSE <4V;
ISENSE =90%ofI
SENSEMAX,
IOUT =90% of I
OUTMAX
IOUTMAX =3A (see Figure 7)
100 µs
t
DSENSE2L
Delay response time from
falling edge of
IN pin
VSENSE <4V;
0.5 A < IOUT <10A;
ISENSE =10% of I
SENSE max
(see Figure 4)
550µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open-load OFF-state detection.
Table 8. Open-load detection (8 V < VCC <18V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VOL
Open-load off-state voltage
detection threshold VIN =0V; 8V<V
CC <18V 2 — 4 V
IOL
Open-load on-state current
detection threshold
VIN =5V;
8V<V
CC <18V;
ISENSE =5µA
—45mA
tDSTKON
Output short circuit to Vcc
detection delay at turn off See Figure 5 180 — 1200 µs
td_vol
Delay response from output
rising edge to VSENSE rising
edge in open-load
VIN =0V; V
OUT =4V;
VSENSE =90% of V
SENSEH
—20µs
ILOFF2 Off-state output current VOUT = 4 V -75 — 0 µA
Table 9. Protections and diagnostics(1)
Symbol Parameter Test conditions Min. Typ. Max. Unit
IlimH
DC short-circuit
current
VCC = 13 V 33 47 66 A
5V<V
CC <18V 66
IlimL
Short-circuit current
during thermal cycling VCC =13V; T
R<T
j<T
TSD 12 A
TTSD
Shutdown
temperature 150 175 200 °C
TRReset temperature
T
RS
+ 1
T
RS
+ 5
°C
TRS
Thermal reset of
status 135 °C
Table 7. Current sense (8 V < VCC < 18 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specifications VND5E025AY-E
12/37 Doc ID 17703 Rev 4
THYST
Thermal hysteresis
(TTSD - TR)7°C
VDEMAG
Turn-off output voltage
clamp
IOUT =2A; V
IN =0V;
L=6mH; T
j= -40°C
V
CC
- 39
V
CC
- 46
V
CC
- 52
V
IOUT =2A; V
IN =0;
L=6mH; 25°C<T
j<150°C
V
CC
- 41
V
CC
- 46
V
CC
- 52
V
VON
Output voltage drop
limitation
IOUT =0.1A;
Tj= -40°C to150°C
(see Figure 8)
25 mV
1. To ensure long term reliability under heavy overload or short-circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
Table 10. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Low-level input voltage 0.9 V
IIL Low-level input current VIN =0.9V 1 µA
VIH High-level input voltage 2.1 V
IIH High-level input current VIN =2.1V 10 µA
VI(hyst) Input hysteresis voltage 0.25 V
VICL Input clamp voltage IIN =1mA 5.5 7 V
IIN =-1mA -0.7
VCSDL Low-level CS_DIS voltage 0.9 V
ICSDL Low-level CS_DIS current VCSD =0.9V 1 µA
VCSDH High-level CS_DIS voltage 2.1 V
ICSDH High-level CS_DIS current VCSD =2.1V 10 µA
V
CSD(hyst)
CS_DIS hysteresis voltage 0.25 V
VCSCL CS_DIS clamp voltage ICSD =1mA 5.5 7 V
ICSD =-1mA -0.7
Table 9. Protections and diagnostics(1) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
VND5E025AY-E Electrical specifications
Doc ID 17703 Rev 4 13/37
Figure 4. Current sense delay characteristics
Figure 5. Open-load off-state delay timing
Figure 6. Switching characteristics
CURRENT SENSE
INPUT
LOAD CURRENT
CS_DIS
t
DSENSE2H
t
DSENSE2L
t
DSENSE1L
t
DSENSE1H
VIN
VCS
tDSTKON
OUTPUT STUCK TO VCC
VOUT > VOL
VSENSEH
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10% t
f
dV
OUT
/dt
(off)
t
d(off)
t
d(on)
INPUT
t
t
90%
t
Won
t
Woff
Electrical specifications VND5E025AY-E
14/37 Doc ID 17703 Rev 4
Figure 7. Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
Figure 8. Output voltage drop limitation
V
IN
I
OUT
I
SENSE
I
OUTMAX
I
SENSEMAX
90% I
SENSEMAX
90% I
OUTMAX
Δ
t
DSENSE2H
t
t
t
Von
Iout
Vcc-Vout
Tj=150
o
CTj=25
o
C
Tj=-40
o
C
Von/Ron(T)
VND5E025AY-E Electrical specifications
Doc ID 17703 Rev 4 15/37
Figure 9. IOUT/ISENSE vs IOUT
Figure 10. Maximum current sense ratio drift vs load current
1. Parameter guaranteed by design; it is not tested.
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Electrical specifications VND5E025AY-E
16/37 Doc ID 17703 Rev 4
Table 11. Truth table
Conditions Input Output Sense (VCSD = 0 V)(1)
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Normal operation L
H
L
H
0
Nominal
Overtemperature L
H
L
L
0
VSENSEH
Undervoltage L
H
L
L
0
0
Overload
H
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
VSENSEH
Short-circuit to GND
(Power limitation)
L
H
L
L
0
VSENSEH
short-circuit to VCC
(external pull up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp LL0
VND5E025AY-E Electrical specifications
Doc ID 17703 Rev 4 17/37
Table 12. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test pulse
Test levels(1)
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
impedance
III IV
1-75V-100V
5000
pulses 0.5 s 5 s 2 ms, 10 Ω
2a +37 V +50 V 5000
pulses 0.2 s 5 s 50 µs, 2 Ω
3a -100 V -150 V 1 h 90 ms 100 ms 0.1 µs, 50 Ω
3b +75 V +100 V 1 h 90 ms 100 ms 0.1 µs, 50 Ω
4 -6 V -7 V 1 pulse 100 ms, 0.01 Ω
5b(2)
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
+65 V +87 V 1 pulse 400 ms, 2 Ω
Table 13. Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse
Test level results(1)
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b
III IV
1C C
2a C C
3a C C
3b C C
4C C
5b(2)(3)
2. Valid in case of external load dump clamp: 40 V maximum referred to ground.
3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in
Table 3: Absolute maximum ratings.
CC
Table 14. Electrical transient requirements (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Electrical specifications VND5E025AY-E
18/37 Doc ID 17703 Rev 4
2.4 Waveforms
Figure 11. Normal operation
Figure 12. Overload or short to GND
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Doc ID 17703 Rev 4 19/37
Figure 13. Intermittent overload
Figure 14. Short to VCC
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20/37 Doc ID 17703 Rev 4
Figure 15. TJ evolution in overload or short to GND
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Doc ID 17703 Rev 4 21/37
2.5 Electrical characteristics curves
Figure 16. Off-state output current Figure 17. High-level input current
Figure 18. Input clamp voltage Figure 19. High-level input voltage
Figure 20. Low-level input voltage Figure 21. Input hysteresis voltage
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Electrical specifications VND5E025AY-E
22/37 Doc ID 17703 Rev 4
Figure 22. On-state resistance vs Tcase Figure 23. On-state resistance vs VCC
Figure 24. Undervoltage shutdown Figure 25. ILIMH vs Tcase
Figure 26. Turn-on voltage slope Figure 27. Turn-off voltage slope
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Doc ID 17703 Rev 4 23/37
Figure 28. CS_DIS clamp voltage Figure 29. Low-level CS_DIS voltage
Figure 30. High-level CS_DIS voltage
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Application information VND5E025AY-E
24/37 Doc ID 17703 Rev 4
3 Application information
Figure 31. Application schematic
1. Channel 2 has the same internal circuit as channel 1.
3.1 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCCPK max rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.2 MCU I/Os protection
When negative transients are present on the VCC line, the control pins are pulled negative to
approximately -1.5 V.
ST suggests the insertion of resistors (Rprot) in the lines to prevent the microcontroller I/O
pins from latching up.
The values of these resistors provide a compromise between the leakage current of the
microcontroller, the current required by the HSD I/Os (input levels compatibility) and the
latch-up limit of the microcontroller I/Os.
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VND5E025AY-E Application information
Doc ID 17703 Rev 4 25/37
Equation 1
-VCCpeak / Ilatchup ≤ Rprot ≤ (VOHµC - VIH) / IIHmax
Calculation example:
For VCCpeak = -1.5 V; Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V
75 Ω ≤ Rprot ≤ 240 kΩ.
Recommended values: Rprot =10 kΩ, CEXT = 10 nF
3.3 Current sense and diagnostic
The current sense pin performs a double function (see Figure 32: Current sense and
diagnostic):
●Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V
minimum (see parameter VSENSE in Table 7: Current sense (8 V < VCC <18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 7: Current sense (8 V < VCC <18V)).
●Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to
Table 11: Truth table):
– Power limitation activation
– Over temperature
–Short to V
CC in off-state
– Open-load in off-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high-impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Application information VND5E025AY-E
26/37 Doc ID 17703 Rev 4
Figure 32. Current sense and diagnostic
3.3.1 Short to VCC and off-state open-load detection
Short to VCC
A short-circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device OFF-state. Small or no current is delivered by the current sense
during the ON-state depending on the nature of the short-circuit.
Off-state open-load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull-down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off-state (see Figure 32: Current sense and
diagnostic).
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VND5E025AY-E Application information
Doc ID 17703 Rev 4 27/37
RPD must be selected in order to ensure VOUT <V
OLmin unless pulled-up by the external
circuitry:
Equation 2
RPD ≤ 22 kΩ is recommended.
For proper open load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
Equation 3
For the values of VOLmin,VOLmax, IL(off2)r and IL(off2)f (see Table 8: Open-load detection
(8 V < VCC <18V)).
VOUT Pull-up_OFF
RPD IL(off2)f
⋅VOLmin
<2V==
VOUT Pull-up_ON
RPD VPU
⋅()RPU RPD IL(off2)r
⋅⋅()–
RPU RPD
+()
-----------------------------------------------------------------------------------------------VOLmax
>4V==
Application information VND5E025AY-E
28/37 Doc ID 17703 Rev 4
3.4 Maximum demagnetization energy (VCC =13.5V)
Figure 33. Maximum turn off current versus inductance
1. Values are generated with RL=0 Ω.
In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not
exceed the temperature specified above for curves A and B.
Demagnetization Demagnetization Demagnetization
t
VIN, IL
C
: T
jstart
= 125 °C repetitive pulse
A
: T
jstart
= 150 °C single pulse
B
: T
jstart
= 100 °C repetitive pulse
VND5E025AY-E Package and PCB thermal data
Doc ID 17703 Rev 4 29/37
4 Package and PCB thermal data
4.1 PowerSSO-36 thermal data
Figure 34. PowerSSO-36 PC board
1. Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10%; Board double
layer; Board dimension 129 mm x 60 mm; Board Material FR4; Cu thickness 0.070 mm; Thermal vias
separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm; Footprint
dimension 4.1 mm x 6.5 mm).
Package and PCB thermal data VND5E025AY-E
30/37 Doc ID 17703 Rev 4
Figure 35. Rthj-amb vs PCB copper area in open box free air condition (one channel
on)
Figure 36. PowerSSO-36 thermal impedance junction ambient single pulse (one
channel on)
Equation 4: pulse calculation formula
where δ = tP/T
ZTHδRTH δZTHtp 1δ–()+⋅=
VND5E025AY-E Package and PCB thermal data
Doc ID 17703 Rev 4 31/37
Figure 37. Thermal fitting model of a double-channel HSD in PowerSSO-36
1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Table 15. Thermal parameters
Area/island (cm2)Footprint28
R1 = R7 (°C/W) 0.3
R2 = R8 (°C/W) 0.9
R3 (°C/W) 5
R4 (°C/W) 8
R5 (°C/W) 18 10 10
R6 (°C/W) 27 23 14
C1 = C7 (W.s/°C) 0.001
C2 = C8 (W.s/°C) 0.005
C3 (W.s/°C) 0.04
C4 (W.s/°C) 0.5
C5 (W.s/°C) 1 2 2
C6 (W.s/°C) 3 6 9
Package information VND5E025AY-E
32/37 Doc ID 17703 Rev 4
5 Package information
5.1 ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2 PowerSSO-36 mechanical data
Figure 38. PowerSSO-36 package dimensions
VND5E025AY-E Package information
Doc ID 17703 Rev 4 33/37
l
Table 16. PowerSSO-36 mechanical data
Symbol
millimeters
Min Typ Max
A 2.15 - 2.45
A2 2.15 - 2.35
a1 0 - 0.1
b 0.18 - 0.36
c 0.23 - 0.32
D 10.10 - 10.50
E7.4 - 7.6
e-0.5-
e3 - 8.5 -
F-2.3-
G- -0.1
H 10.1 - 10.5
h--0.4
k0°-8°
L 0.55 - 0.85
M-4.3-
N - - 10°
O-1.2
Q-0.8-
S-2.9-
T - 3.65 -
U-1.0-
X(1)
1. Corresponding to internal variation C.
4.3 - 5.2
Y(1) 6.9 - 7.5
Package information VND5E025AY-E
34/37 Doc ID 17703 Rev 4
5.3 Packing information
Figure 39. PowerSSO-36 tube shipment (no suffix)
Figure 40. PowerSSO-36 tape and reel shipment (suffix “TR”)
A
C
B
All dimensions are in mm.
Base q.ty 49
Bulk q.ty 1225
Tube length (± 0.5) 532
A3.5
B13.8
C (± 0.1) 0.6
Base q.ty 1000
Bulk q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 100
T (max) 30.4
REEL DIMENSIONS
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 24
Tape hole spacing P0 (± 0.1) 4
Component spacing P 12
Hole diameter D (± 0.05) 1.55
Hole diameter D1 (min) 1.5
Hole position F (± 0.1) 11.5
Compartment depth K (max) 2.85
Hole spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
VND5E025AY-E Device summary
Doc ID 17703 Rev 4 35/37
6 Device summary
Table 17. Device summary
Package
Order codes
Tube Tape and reel
PowerSSO-36 VND5E025AY-E VND5E025AYTR-E
Revision history VND5E025AY-E
36/37 Doc ID 17703 Rev 4
7 Revision history
Table 18. Document revision history
Date Revision Changes
29-Jul-2010 1 Initial release.
05-Aug-2010 2
Updated following figures:
–Figure 35: Rthj-amb vs PCB copper area in open box free air
condition (one channel on)
–Figure 36: PowerSSO-36 thermal impedance junction ambient
single pulse (one channel on)
Updated Table 15: Thermal parameters
19-Jul-2012 3 Changed document status from “Preliminary data“ to “Production
data“
19-Sep-2013 4 Updated Disclaimer
VND5E025AY-E
Doc ID 17703 Rev 4 37/37
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