1. Product profile
1.1 General description
PNP/PNP resistor-equipped transistors
1.2 Features
nBuilt-in bias resistors
nSimplifies circuit design
nReduces component count
nReduces pick and place cost
1.3 Applications
nLow current peripheral driver
nControl of IC inputs
nReplacement of general-purpose transistors in digital applications
1.4 Quick reference data
PEMB17; PUMB17
PNP/PNP resistor-equipped transistors;
R1 = 47 kΩ, R2 = 22 kΩ
Rev. 03 — 1 September 2009 Product data sheet
Table 1. Product overview
Type number Package NPN/PNP
complement NPN/NPN
complement
NXP JEITA
PEMB17 SOT666 - PEMD17 PEMH17
PUMB17 SOT363 SC-88 PUMD17 PUMH17
Table 2. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VCEO collector-emitter voltage open base - - −50 V
IOoutput current (DC) - - −100 mA
R1 bias resistor 1 (input) 33 47 61 kΩ
R2/R1 bias resistor ratio 0.37 0.47 0.57
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 2 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
2. Pinning information
3. Ordering information
4. Marking
[1] * = -: made in Hong Kong
* = p: made in Hong Kong
* = t: made in Malaysia
* = W: made in China
Table 3. Pinning
Pin Description Simplified outline Symbol
1 GND (emitter) TR1
2 input (base) TR1
3 output (collector) TR2
4 GND (emitter) TR2
5 input (base) TR2
6 output (collector) TR1
001aab555
6 45
1 32
006aaa212
5
R1 R2
R2
TR1 TR2
R1
64
213
Table 4. Ordering information
Type number Package
Name Description Version
PEMB17 - plastic surface mounted package; 6 leads SOT666
PUMB17 SC-88 plastic surface mounted package; 6 leads SOT363
Table 5. Marking codes
Type number Marking code[1]
PEMB17 5M
PUMB17 B*8
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 3 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
5. Limiting values
[1] Device mounted on a FR4 printed-circuit board, single-sided copper, standard footprint.
[2] Reflow soldering is the only recommended soldering method.
6. Thermal characteristics
[1] Device mounted on a FR4 printed-circuit board, single-sided copper, standard footprint.
[2] Reflow soldering is the only recommended soldering method.
Table 6. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transistor
VCBO collector-base voltage open emitter - −50 V
VCEO collector-emitter voltage open base - −50 V
VEBO emitter-base voltage open collector - −10 V
VIinput voltage
positive - +10 V
negative - −40 V
IOoutput current (DC) - −100 mA
ICM peak collector current - −100 mA
Ptot total power dissipation Tamb ≤ 25 °C
SOT363 [1] - 200 mW
SOT666 [1] [2] - 200 mW
Tstg storage temperature −65 +150 °C
Tjjunction temperature - 150 °C
Tamb ambient temperature −65 +150 °C
Per device
Ptot total power dissipation Tamb ≤ 25 °C
SOT363 [1] - 300 mW
SOT666 [1] [2] - 300 mW
Table 7. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
Rth(j-a) thermal resistance from
junction to ambient Tamb ≤ 25 °C
SOT363 [1] - - 625 K/W
SOT666 [1] [2] - - 625 K/W
Per device
Rth(j-a) thermal resistance from
junction to ambient Tamb ≤ 25 °C
SOT363 [1] - - 416 K/W
SOT666 [1] [2] - - 416 K/W
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 4 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
7. Characteristics
Table 8. Characteristics
T
amb
= 25
°
C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Per transistor
ICBO collector-base cut-off
current VCB = −50 V; IE = 0 A - - −100 nA
ICEO collector-emitter
cut-off current VCE = −30 V; IB = 0 A - - −1µA
VCE = −30 V; IB = 0 A;
Tj= 150 °C--−50 µA
IEBO emitter-base cut-off
current VEB = −5 V; IC = 0 A - - −110 µA
hFE DC current gain VCE = −5 V; IC = −5 mA 60 - -
VCEsat collector-emitter
saturation voltage IC = −10 mA; IB = −0.5 mA - - −150 mV
VI(off) off-state input voltage VCE = −5 V; IC = −100 µA-−1.7 −1.2 V
VI(on) on-state input voltage VCE = −0.3 V; IC = −2 mA −4−2.7 - V
R1 bias resistor 1 (input) 33 47 61 kΩ
R2/R1 bias resistor ratio 0.37 0.47 0.57
Cccollector capacitance VCB = −10 V; IE = ie = 0 A;
f=1MHz --3pF
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 5 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
VCE = −5 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −40 °C
Fig 1. DC current gain as a function of collector
current; typical values Fig 2. Collector-emitter saturation voltage as a
function of collector current; typical values
VCE = −0.3 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
VCE = −5 V
(1) Tamb = −40 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig 3. On-state input voltage as a function of
collector current; typical values Fig 4. Off-state input voltage as a function of
collector current; typical values
IC (mA)
−10−1−102
−10−1
006aaa208
102
10
103
hFE
1
(1) (2)
(3)
006aaa209
IC (mA)
−10−1−102
−10−1
−102
VCEsat
(mV)
−10
(1)
(2)
(3)
IC (mA)
−10−1−102
−10−1
006aaa210
−10
−1
−102
VI(on)
(V)
−10−1
(1) (2)
(3)
006aaa211
IC (mA)
−10−2−10−1−10−1
−1
−10
VI(off)
(V)
−10−1
(1)
(2)
(3)
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 6 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
8. Package outline
Fig 5. Package outline SOT363 (SC-88)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT363 SC-88
wBM
bp
D
e1
e
pin 1
index A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
456
Plastic surface-mounted package; 6 leads SOT363
UNIT A1
max bpcDEe1HELpQywv
mm 0.1 0.30
0.20 2.2
1.8
0.25
0.10 1.35
1.15 0.65
e
1.3 2.2
2.0 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15 0.25
0.15
A
1.1
0.8
04-11-08
06-03-16
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 7 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
Fig 6. Package outline SOT666
UNIT bpcDE e1HELpw
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
04-11-08
06-03-16
IEC JEDEC JEITA
mm 0.27
0.17 0.18
0.08 1.7
1.5 1.3
1.1 0.5
e
1.0 1.7
1.5 0.1
y
0.1
DIMENSIONS (mm are the original dimensions)
0.3
0.1
SOT666
bp
pin 1 index
D
e1
e
A
Lp
detail X
HE
E
A
S
0 1 2 mm
scale
A
0.6
0.5
c
X
123
456
Plastic surface-mounted package; 6 leads SOT666
YS
wMA
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 8 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
9. Packing information
[1] For further information and the availability of packing methods, see Section 12.
[2] T1: normal taping
[3] T2: reverse taping
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.
[1]
Type number Package Description Packing quantity
3000 4000 10000
PEMB17 SOT666 4 mm pitch, 8 mm tape and reel; - -115 -
PUMB17 SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 - -135
PUMB17 SOT363 4 mm pitch, 8 mm tape and reel; T2 [3] -125 - -165
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 9 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
10. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
PEMB17_PUMB17_3 20090901 Product data sheet - PEMB17_PUMB17_2
Modifications: •This data sheet was changed to reflect the new company name NXP Semiconductors,
including new legal definitions and disclaimers. No changes were made to the technical
content.
•Figure 5 “Package outline SOT363 (SC-88)”: updated
•Figure 6 “Package outline SOT666”: updated
PEMB17_PUMB17_2 20050203 Product data sheet - PUMB17_1
PUMB17_1 20031103 Product specification - -
PEMB17_PUMB17_3 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 03 — 1 September 2009 10 of 11
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
11. Legal information
11.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
11.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
11.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
11.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors PEMB17; PUMB17
PNP/PNP resistor-equipped transistors; R1 = 47 kΩ, R2 = 22 kΩ
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 1 September 2009
Document identifier: PEMB17_PUMB17_3
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
13. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 6
9 Packing information. . . . . . . . . . . . . . . . . . . . . . 8
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 10
11.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10
11.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
11.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 10
12 Contact information. . . . . . . . . . . . . . . . . . . . . 10
13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
