REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
OP297
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
Dual Low Bias Current
Precision Operational Amplifier
PIN CONNECTIONS
8-Lead Plastic DIP
8-Lead Cerdip
8-Lead Narrow Body SOIC
8
7
6
5
1
2
3
4
OUTA
–INA
+INA
V+
OUTB
–INB
+INBV–
BA
FEATURES
Low Offset Voltage: 50 ␮V Max
Low Offset Voltage Drift: 0.6 ␮V/ⴗC Max
Very Low Bias Current: 100 pA Max
Very High Open-Loop Gain: 2000 V/mV Min
Low Supply Current (Per Amplifier): 625 ␮A Max
Operates From ⴞ2 V to ⴞ20 V Supplies
High Common-Mode Rejection: 120 dB Min
Pin Compatible to LT1013, AD706, AD708, OP221,
LM158 and MC1458/1558 with Improved Performance
APPLICATIONS
Strain Gauge and Bridge Amplifiers
High Stability Thermocouple Amplifiers
Instrumentation Amplifiers
Photo-Current Monitors
High Gain Linearity Amplifiers
Long-Term Integrators/Filters
Sample-and-Hold Amplifiers
Peak Detectors
Logarithmic Amplifiers
Battery Powered Systems
GENERAL DESCRIPTION
The OP297 is the first dual op amp to pack precision perfor-
mance into the space-saving, industry standard, 8-lead SOIC
package. Its combination of precision with low power and ex-
tremely low input bias current makes the dual OP297 useful in
a wide variety of applications.
Precision performance of the OP297 includes very low offset,
under 50 mV, and low drift, below 0.6 mV/∞C. Open-loop gain
exceeds 2000 V/mV, ensuring high linearity in every application.
Errors due to common-mode signals are eliminated by the
OP297’s common-mode rejection of over 120 dB, which mini-
mizes offset voltage changes experienced in battery powered
systems. Supply current of the OP297 is under 625 mA per
amplifier and it can operate with supply voltages as low as ±2
V.
The OP297 uses a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all tempera-
tures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25∞C, but double for
every 10∞C rise in temperature, to reach the nanoamp range
above 85∞C. Input bias current of the OP 297 is under 100 pA
at 25∞C and is under 450 pA over the military temperature
range.
Combining precision, low power and low bias current, the
OP297 is ideal for a number of applications, including instru-
mentation amplifiers, log amplifiers, photodiode preamplifiers
and long-term integrators. For a single device, see the OP97;
for a quad, see the OP497.
TEMPERATURE – ⴗC
INPUT CURRENT – pA
60
–60
–75 –50 125–25 0 25 50 75 100
40
20
0
–20
–40
I
B
–
I
B
+
I
OS
V
S
= ⴞ15V
V
CM
= 0V
Figure 1. Low Bias Current Over Temperature
INPUT OFFSET VOLTAGE –
␮
V
NUMBER OF UNITS
400
0
–100 –80 60
–60 –40 –20 0 20 40
300
200
100
80 100
1200 UNITS T
A
= +25ⴗC
V
S
= ⴞ15V
V
CM
= 0V
Figure 2. Very Low Offset
–2– REV. D
OP297–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
OP297E OP297F OP297G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units
Input Offset Voltage V
OS
25 50 50 100 80 200 mV
Long-Term Input
Voltage Stability 0.1 0.1 0.1 mV/mo
Input Offset Current I
OS
V
CM
= 0 V 20 100 35 150 50 200 pA
Input Bias Current I
B
V
CM
= 0 V 20 ±100 35 ±150 50 ±200 pA
Input Noise Voltage e
n
p-p 0.1 Hz to 10 Hz 0.5 0.5 0.5 mV p-p
Input Noise e
n
f
O
= 10 Hz 20 20 20 nV/÷Hz
Voltage Density e
n
f
O
= 1000 Hz 17 17 17 nV/÷Hz
Input Noise Current Density i
n
f
O
= 10 Hz 20 20 20 fA÷Hz
Input Resistance
Differential Mode R
IN
30 30 30 MW
Input Resistance
Common-Mode R
INCM
500 500 500 GW
Large-Signal V
O
= ±10 V
Voltage Gain A
VO
R
L
= 2 kW2000 4000 1500 3200 1200 3200 V/mV
Input Voltage Range VCM (Note 1) ±13 ±14 ±13 ±14 ±13 ±14 V
Common-Mode Rejection CMRR V
CM
= ±13 V 120 140 114 135 114 135 dB
Power Supply Rejection PSRR V
S
= ±2 V to ±20 V 120 130 114 125 114 125 dB
Output Voltage Swing V
O
R
L
= 10 kW±13 ±14 ±13 ±14 ±13 ±14 V
V
O
R
L
= 2 kW±13 ±13.7 ±13 ±13.7 ±13 ±13.7 V
Supply Current Per Amplifier I
SY
No Load 525 625 525 625 525 625 mA
Supply Voltage V
S
Operating Range ±2±20 ±2±20 ±2±20 V
Slew Rate SR 0.05 0.15 0.05 0.15 0.05 0.15 V/ms
Gain Bandwidth Product GBWP A
V
= +1 500 500 500 kHz
Channel Separation CS V
O
= 20 V p–p 150 150 150 dB
f
O
= 10 Hz
Input Capacitance C
IN
333pF
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
(@ VS = ⴞ15 V, TA = +25ⴗC, unless otherwise noted.)
–3–REV. D
OP297
ELECTRICAL CHARACTERISTICS
OP297E OP297F OP297G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units
Input Offset Voltage V
OS
35 100 80 300 110 400 mV
Average Input Offset
Voltage Drift TCV
OS
0.2 0.6 0.5 2.0 0.6 2.0 mV/∞C
Input Offset Current I
OS
V
CM
= 0 V 50 450 80 750 80 750 pA
Input Bias Current I
B
V
CM
= 0 V 50 ±450 80 ±750 80 ±750 pA
Large-Signal Voltage Gain A
VO
V
O
= ±10 V,
R
L
= 2 kW1200 3200 1000 2500 800 2500 V/mV
Input Voltage Range VCM (Note 1) ±13 ±13.5 ±13 ±13.5 ±13 ±13.5 V
Common-Mode Rejection CMRR V
CM
= ±13 114 130 108 130 108 130 dB
Power Supply Rejection PSRR V
S
= ±2.5 V
to ±20 V 114 0.15 108 0.15 108 0.3 dB
Output Voltage Swing V
O
R
L
= 10 kW±13 ±13.4 ±13 ±13.4 ±13 ±13.4 V
Supply Current Per Amplifier I
SY
No Load 550 750 550 750 550 750 mA
Supply Voltage V
S
Operating Range ±2.5 ±20 ±2.5 ±20 ±2.5 ±20 V
NOTES
1
Guaranteed by CMR test.
Specifications subject to change without notice.
(@ VS = ⴞ15 V, –40ⴗC £ TA £ +85ⴗC for OP297E/F/G, unless otherwise noted.)
OP297
–4– REV. D
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP297 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Input Voltage
2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V
Differential Input Voltage
1
. . . . . . . . . . . . . . . . . . . . . . . . 40 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65∞C to +175∞C
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
OP297E (Z) . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
OP297F, G (P, S) . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
Junction Temperature
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . –65∞C to +175∞C
P, S Packages . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300∞C
Package Types ␪
JA2
␪
JC
Units
8-Lead Cerdip (Z) 134 12 ∞C/W
8-Lead Plastic DIP (P) 96 37 ∞C/W
8-Lead SOIC (S) 150 41 ∞C/W
NOTES
1
For supply voltages less than ±20 V, the absolute maximum input voltage is equal
to the supply voltage.
2
q
JA
is specified for worst case mounting conditions, i.e., q
JA
is specified for device in
socket for cerdip and plastic DIP, packages; q
JA
is specified for device soldered to
printed circuit board for SOIC package.
ORDERING GUIDE
Temperature Package Package
Model Ranges Descriptions Options
1
OP297EZ –40∞C to +85∞C8-Lead Cerdip Q-8
OP297FP –40∞C to +85∞C8-Lead Plastic DIP N-8
OP297FS –40∞C to +85∞C8-Lead SOIC RN-8
OP297FS-REEL –40∞C to +85∞C8-Lead SOIC RN-8
OP297FS-REEL7 –40∞C to +85∞C8-Lead SOIC RN-8
OP297GP –40∞C to +85∞C8-Lead Plastic DIP N-8
OP297GS –40∞C to +85∞C8-Lead SOIC RN-8
OP297GS-REEL –40∞C to +85∞C8-Lead SOIC RN-8
OP297GS-REEL7 –40∞C to +85∞C8-Lead SOIC RN-8
V1 20Vp-p @ 10Hz
50k⍀
CHANNEL SEPARATION = 20 log
V1
V2/10000
)
)
1/2
OP-297
2k⍀
1/2
OP-297
50⍀
V2
Figure 3. Channel Separation Test Circuit
WARNING!
ESD SENSITIVE DEVICE
OP297
–5–REV. D
INPUT OFFSET VOLTAGE – pA
NUMBER OF UNITS
0
–100 –80 60–60 –40 –20 0 20 40
200
100
80 100
1200 UNITS TA = +25ⴗC
VS = ⴞ15V
VCM = 0V
300
400
Figure 4. Typical Distribution of Input
Offset Voltage
TEMPERATURE – ⴗC
INPUT CURRENT – pA
60
–60
–75 –50 125–25 0 25 50 75 100
40
20
0
–20
–40
IB–
IB+
IOS
VS = ⴞ15V
VCM = 0V
Figure 7. Input Bias, Offset Current
vs. Temperature
=
SOURCE RESISTANCE – ⍀
EFFECTIVE OFFSET VOLTAGE – ␮V
10000
10
10 10M
100
1M100k10k1k100
1000
VS = ⴞ15V
VCM = 0V
BALANCED OR UNBALANCED
TA = +25ⴗC
–55ⴗC TA +125ⴗC
Figure 10. Effective Offset Voltage
vs. Source Resistance
Typical Performance Characteristics–
INPUT BIAS CURRENT – pA
NUMBER OF UNITS
0
–100 –80 60–60 –40 –20 0 20 40
250
200
150
100
50
80 100
1200 UNITS TA = +25ⴗC
VS = ⴞ15V
VCM = 0V
Figure 5. Typical Distribution of Input
Bias Current
INPUT CURRENT – pA
60
–40
–15
–20
40
20
0
V
S
= ⴞ15V
V
CM
= 0V
COMMON-MODE VOLTAGE – Volts
–10 –5 0 5 10 15
I
B
–
I
B
+
I
OS
Figure 8. Input Bias, Offset Current
vs. Common-Mode Voltage
SOURCE RESISTANCE – ⍀
EFFECTIVE OFFSET VOLTAGE DRIFT – ␮V/ⴗC
100
0.1
10
10M1M100k10k1k100
V
S
= ⴞ15V
V
CM
= 0V
BALANCED OR UNBALANCED
100M
1
Figure 11. Effective TCV
OS
vs. Source
Resistance
0
–100
1200 UNITS T
A
= +25ⴗC
V
S
= ⴞ15V
V
CM
= 0V
NUMBER OF UNITS
400
300
200
100
INPUT OFFSET VOLTAGE – pA
–80 60–60 –40 –20 0 20 40 80 100
Figure 6. Typical Distribution of In-
put Offset Current
TIME AFTER POWER APPLIED – Minutes
DEVIATION FROM FINAL VALUE – ␮V
0012345
ⴞ1
ⴞ3
ⴞ2
TA = +25ⴗC
VS = ⴞ15V
VCM = 0V
Figure 9. Input Offset Voltage Warm-
Up Drift
TIME FROM OUTPUT SHORT – Minutes
SHORT-CIRCUIT CURRENT – mA
35
–35 0412 3
20
5
25
30
15
10
0
–30
–25
–20
–15
–10
–5
VS = ⴞ15V
OUTPUT SHORTED
TO GROUND
TA = –55ⴗC
TA = +25ⴗC
TA = +125ⴗC
TA = +125ⴗC
TA = +25ⴗC
TA = –55ⴗC
Figure 12. Short Circuit Current vs.
Time, Temperature
OP297
–6– REV. D
SUPPLY VOLTAGE – Volts
TOTAL SUPPLY CURRENT – ␮A
1300
800 0ⴞ20
ⴞ5ⴞ10 ⴞ15
1200
1100
1000
900
T
A
= –55ⴗC
T
A
= +25ⴗC
T
A
= +125ⴗC
NO LOAD
Figure 13. Total Supply Current vs.
Supply Voltage
FREQUENCY – Hz
100
10
11000
100
10 100
VOLTAGE NOISE DENSITY – nV/ Hz
10
1
CURRENT NOISE DENSITY – pA/ Hz
0100
1000
CURRENT
NOISE
VOLTAGE
NOISE
TA = +25ⴗC
VS = ⴞ2V TO ⴞ15V
Figure 16. Voltage Noise Density and
Current Noise Density vs. Frequency
TA = +25ⴗC
OUTPUT VOLTAGE – Volts
DIFFERENTIAL INPUT VOLTAGE – 10␮/DVD
0
–15
RL = 10k⍀
VS = ⴞ15V
VCM = 0V TA = +125ⴗC
TA = –55ⴗC
–10 –5 0 5 1510
Figure 19. Differential Input Voltage
vs. Output Voltage
FREQUENCY – Hz
COMMON-MODE REJECTION – dB
160
40 110
100 1k 10k 100k 1M
140
120
100
80
60
TA = +25ⴗC
VS = ⴞ15V
Figure 14. Common-Mode Rejection
Frequency
SOURCE RESISTANCE – ⍀
10
0.01
107
1
TOTAL NOISE DENSITY – nV/ Hz
106
105
104
103
102
0.1
TA = +25ⴗC
VS = ⴞ2V TO ⴞ20V
10Hz
10Hz
1kHz
1kHz
Figure 17. Total Noise Density vs.
Source Resistance
LOAD RESISTANCE – ⍀
OUTPUT SWING – Vp-p
0
10 10k
100 1k
5
10
15
20
25
30
35
TA = +25ⴗC
VS = ⴞ15V
AVCL = +1
1%THD
fO = 1kHz
Figure 20. Output Swing vs. Load
Resistance
FREQUENCY – Hz
POWER SUPPLY REJECTION – dB
160
40
0.1 1 1M
10 100 1k 10k 100k
140
120
TA = +25ⴗC
Vs = ⴞ15V
⌬Vs = 10Vp-p
60
80
100
Figure 15. Power Supply Rejection
vs. Frequency
LOAD RESISTANCE – k⍀
OPEN-LOOP GAIN – VmV
10000
100
120
1000
510
T
A
= –55ⴗC
T
A
= +25ⴗC
T
A
= +125ⴗC
43
2
V
S
= ⴞ15V
V
O
= ⴞ10V
Figure 18. Open-Loop Gain vs. Load
Resistance
FREQUENCY – Hz
100 100k1k 10k
OUTPUT SWING – Vp-p
0
5
10
15
20
25
30
35
TA = +25ⴗC
VS = ⴞ15V
AVCL = +1
1%THD
fO = 1kHz
RL = 10k⍀
Figure 21. Maximum Output Swing
vs. Frequency
OP297
–7–REV. D
FREQUENCY – Hz
OUTPUT IMPEDANCE – ⍀
1000
0.001
10 100 1k
100
10
0.01
0.1
1
10k 100k 1M
TA = +25ⴗV
VS = ⴞ15V
Figure 24. Open Loop Output Imped-
ance vs Frequency
APPLICATIONS INFORMATION
Extremely low bias current over a wide temperature range makes
the OP297 attractive for use in sample-and-hold amplifiers,
peak detectors and log amplifiers that must operate over a wide
temperature range. Balancing input resistances is unnecessary
with the OP297. Offset voltage and TCV
OS
are degraded only
minimally by high source resistance, even when unbalanced.
The input pins of the OP297 are protected against large dif-
ferential voltage by back-to-back diodes and current-limiting
resistors. Common-mode voltages at the inputs are not restricted,
and may vary over the full range of the supply voltages used.
The OP297 requires very little operating headroom about the
supply rails, and is specified for operation with supplies as low
as +2 V. Typically, the common-mode range extends to within
one volt of either rail. The output typically swings to within one
volt of the rails when using a 10 kW load.
AC PERFORMANCE
The OP297’s ac characteristics are highly stable over its full
operating temperature range. Unity gain small-signal response is
shown in Figure 25. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response with 1000 pF
loads (Figure 26).
10
0%
100
90
5
␮
s
20mV
Figure 25. Small-Signal Transient Response
(C
LOAD
= 100 pF, A
VCL
= +1)
10
0%
100
90
5
␮
s
20mV
Figure 26. Small-Signal Transient Response
(C
LOAD
= 1000 pF, A
VCL
= +1)
10
0%
100
90
5
␮
s
20mV
Figure 27. Large-Signal Transient Response
(A
VCL
= +1)
FREQUENCY – Hz
OPEN-LOOP GAIN – dB
–40
100 1K 10M
10K 100 1M
V
S
= ⴞ15V
C
L
= 30pF
R
L
= 1M⍀
T
A
= –55ⴗC
T
A
= +125ⴗC
GAIN
PHASE
PHASE SHIFT – Deg
–20
0
20
40
60
100
80
Figure 22. Open Loop Gain, Phase vs.
Frequency
LOAD CAPACITANCE –
p
F
OVERSHOOT – %
0
0100
–EDGE
10
20
30
40
50
60
70
1000 10000
+EDGE
T
A
= +25ⴗV
V
S
= ⴞ15V
A
VCL
= +1
V
OUT
= 100mV p-p
Figure 23. Small Signal Overshoot
vs. Load Capacitance
OP297
–8– REV. D
GUARDING AND SHIELDING
To maintain the extremely high input impedances of the
OP297, care must be taken in circuit board layout and manufac-
turing. Board surfaces must be kept scrupulously clean and free
of moisture. Conformal coating is recommended to provide a
humidity barrier. Even a clean PC board can have 100 pA of
leakage currents between adjacent traces, so guard rings should
be used around the inputs. Guard traces are operated at a volt-
age close to that on the inputs, as shown in Figure 28, so that
leakage currents become minimal. In noninverting applications,
the guard ring should be connected to the common-mode volt-
age at the inverting input. In inverting applications, both inputs
remain at ground, so the guard trace should be grounded. Guard
traces should be on both sides of the circuit board.
OPEN-LOOP GAIN LINEARITY
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the preci-
sion of the OP297 and provides for very high accuracy in high
closed loop gain applications. Figure 29 illustrates the typical
open-loop gain linearity of the OP297 over the military tempera-
ture range.
T
A
= +25ⴗC
OUTPUT VOLTAGE – Volts
DIFFERENTIAL INPUT VOLTAGE – 10␮/DVD
0
–15
R
L
= 10k⍀
V
S
= ⴞ15V
V
CM
= 0V T
A
= +125ⴗC
T
A
= –55ⴗC
–10 –5 0 5 1510
Figure 29. Open-Loop Linearity of the OP297
APPLICATIONS
PRECISION ABSOLUTE VALUE AMPLIFIER
The circuit of Figure 30 is a precision absolute value amplifier
with an input impedance of 30 MW. The high gain and low
TCV
OS
of the OP297 ensure accurate operation with microvolt
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP297
exceeds 120 dB, yielding an error of less than 2 ppm.
1/2
OP297
1/2
OP297
+15V
C2
0.1␮F
R1
1k⍀
C1
30pF D1
1N4148
D2
1N4148 R2
2k⍀
0V V
OUT
10V
R3
1k⍀
–15V
V
IN
C3
0.1␮F
5
6
7
1
28
3
4
Figure 30. Precision Absolute Value Amplifier
PRECISION CURRENT PUMP
Maximum output current of the precision current pump shown
in Figure 31 is ±10 mA. Voltage compliance is ±10 V with
±15 V supplies. Output impedance of the current transmitter
exceeds 3 MW with linearity better than 16 bits.
1/2
OP297
+15V
R3
10k⍀
VIN
5
6
7
1
2
8
3
1/2
OP297
IOUT
10mA
R1
10k⍀
R2
10k⍀
R4
10k⍀
R6
10k⍀
–15V
IOUT = = = 10mA/V
VIN
R5
VIN
100⍀
Figure 31. Precision Current Pump
UNITY-GAIN FOLLOWER
INVERTING AMPLIFIER
NONINVERTING AMPLIFIER
MINI-DIP
BOTTOM VIEW
1
8
B
A
1/2
OP297
1/2
OP297
1/2
OP297
Figure 28. Guard Ring Layout and Connections
OP297
–9–REV. D
PRECISION POSITIVE PEAK DETECTOR
In Figure 32, the C
H
must be of polystyrene, Teflon
®
, or poly-
ethylene to minimize dielectric absorption and leakage. The
droop rate is determined by the size of C
H
and the bias current
of the OP297.
SIMPLE BRIDGE CONDITIONING AMPLIFIER
Figure 33 shows a simple bridge conditioning amplifier using
the OP297. The transfer function is:
VOUT =VREF
DR
R+DR
Ê
Ë
Áˆ
¯
˜RF
R
The REF43 provides an accurate and stable reference voltage
for the bridge. To maintain the highest circuit accuracy, R
F
should be 0.1% or better with a low temperature coefficient.
2N930
1/2
OP297
+15V
0.1␮F
1k⍀
1N4148
RESET
V
IN
5
6
7
1
28
3
0.1␮F
1/2
OP297
1k⍀
1k⍀
C
H
–15V
V
OUT
1k⍀
Figure 32. Precision Positive Peak Detector
15V
3
2
1
0.1␮F
1/2
OP297
V
OUT
V
OUT
= V
REF
R + ⌬R
⌬R
R
R
F
5
6
7
1/2
OP297
V
REF
4
8
REF43
R + ⌬R
R
F
4
Figure 33. A Simple Bridge Conditioning Amplifier Using
the OP297
NONLINEAR CIRCUITS
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and square-
root circuits shown in Figures 34 and 35. Using the squaring
circuit of Figure 34 as an example, the analysis begins by writing
a voltage loop equation across transistors Q1, Q2, Q3 and Q4.
V
T1
ln I
IN
I
S1
Ê
Ë
Áˆ
¯
˜+V
T2
ln I
IN
I
S2
Ê
Ë
Áˆ
¯
˜=V
T3
ln I
O
I
S3
Ê
Ë
Áˆ
¯
˜+V
T4
ln I
REF
I
S4
Ê
Ë
Áˆ
¯
˜
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the I
S
and V
T
terms cancel, giving:
2 ln I
IN
= ln I
O
+ ln I
REF
= ln (I
O
¥
I
REF
)
Exponentiating both sides of the equation leads to:
IO=(IIN )2
IREF
Op amp A2 forms a current-to-voltage converter which gives
V
OUT
= R2 ¥ 1
O
. Substituting (V
IN
/R1) for I
IN
and the above
equation for I
O
yields:
V
OUT
=R2
I
REF
Ê
Ë
Áˆ
¯
˜V
IN
R1
Ê
Ë
Áˆ
¯
˜
2
A similar analysis made for the square-root circuit of Figure 35
leads to its transfer function:
V
OUT
=R2(V
IN
)(I
REF
)
R1
Teflon is a registered trademark of the Dupont Company
1/2
OP297
7
6
5
V
OUT
R2
33k⍀
C2
100pF
I
O
1/2
OP297
–15V
1
2
3
V+
V–
I
REF
R3
50k⍀
Q3
R1
33k⍀
V
IN
Q1
Q2
Q4 13
14
12
R4
50k⍀
89
10
4
8
6
5
7
2
3
1
C1
100pF
MAT-04E
Figure 34. Squaring Amplifier
1/2
OP297
7
6
5
V
OUT
R2
33k⍀
C2
100pF
I
O
1/2
OP297
–15V
1
2
3
V+
V–
I
REF
R3
50k⍀
R1
33k⍀
V
IN
Q1
R4
50k⍀
79
10
4
8
3
1
C1
100pF
MAT-04E
8
Q3
5
6
Q2
13
12
14
Q2
Figure 35. Square-Root Amplifier
OP297
–10– REV. D
In these circuits, I
REF
is a function of the negative power sup-
ply. To maintain accuracy, the negative supply should be well
regulated. For applications where very high accuracy is re-
quired, a voltage reference may be used to set I
REF
. An impor-
tant consideration for the squaring circuit is that a sufficiently
large input voltage can force the output beyond the operating
range of the output op amp. Resistor R4 can be changed to
scale I
REF
, or R1, and R2 can be varied to keep the output
voltage within the usable range.
Unadjusted accuracy of the square-root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
OP297 SPICE MACRO-MODEL
Figures 36 and 37 show the node end net list for a SPICE
macro model of the OP297. The model is a simplified version of
the actual device and simulates important dc parameters such as
V
OS
, I
OS
, I
B
, A
VO
, CMR, V
O
and I
SY
. AC parameters such as slew
rate, gain and phase response and CMR change with frequency
are also simulated by the model.
The model uses typical parameters for the OP297. The poles and
zeros in the model were determined from the actual open- and
closed-loop gain and phase response of the OP297. In this way,
the model presents an accurate ac representation of the actual
device. The model assumes an ambient temperature
of 25∞C.
CIN IOS 3D1
–IN
D2
Q1
R1
R2 R5
Q2
R6
10 11
G1 C3
R7
I1
D4
D3
R4R3
C2
14
13
V3
E1
R8
C4
R9
EREF
V2
50
98
12
65
99
8
RIN2
2
+IN RIN1 EOS
1
79
4
15 16
50
R16
R17
23
ISYS
G4 G5
28 29
22
D6
D5 26
27
D7 D8 G6 R18
R19
D9 D10
G7
V4
V5 L1
25
99
98
9
R10 C5
G1
R11 R13
C6 C7
R12
E2 R14
E3 R15 C8
G3
Figure 36. Macro Model
OP297
–11–REV. D
*OP297 SPICE MACRO-MODEL
*
*NODE ASSIGNMENTS
NONINVERTING INPUT
INVERTING INPUT
OUTPUT
POSITIVE SUPPLY
NEGATIVE SUPPLY
*SUBCKT OP297 1 2 30 99 50
*
*INPUT STAGE & POLE AT 6 MHz
*
RIN1 1 7 2500
RIN2 2 8 2500
R1 8 3 5E11
R2 7 3 5E11
R3 5 99 612
R4 6 99 612
CIN 7 8 3E-12
C2 5 6 21.67E-12
I1 4 50 0.1E-3
IOS 7 8 20E-12
EOS 9 7 POLY(1) 19 23 25E-6 1
Q1 5810QX
Q2 6911QX
R5 10 4 96
R6 11 4 96
D1 89DX
D2 98DX
*
EREF 98 0 23 0 1
*
*GAIN STAGE & DOMINANT POLE AT 0.13 HZ
*
R7 12 98 2.45E9
C3 12 98 500E-12
G1 98 12 5 6 1.634E-3
V2 99 13 1.5
V3 14 50 1.5
D3 12 13 DX
D4 14 12 DX
*
*NEGATIVE ZERO AT -1.8 MHz
*
R8 15 16 1E6
C4 15 16 –88.4E-15
R9 16 98 1
E1 15 98 12 23 1E6
*
SPICE Net List
*POLE AT 1.8 MHz
*
R10 17 98 1E6
C5 17 98 88 4E-15
G2 98 17 16 23 1 E-6
*
*COMMON-MODE GAIN NETWORK WITH ZERO AT 50 HZ
*
R11 18 19 1E6
C6 18 19 3.183E-9
R12 19 98 1
E2 18 98 3 23 100E-3
*
*POLE AT 6 MHz
*
R15 22 98 1E6
C8 22 98 26.53E-15
G3 98 22 17 23 1 E-6
*
*OUTPUT STAGE
*
R16 23 99 160E3
R17 23 50 160E3
ISY 99 50 331E-6
R18 25 99 200
R19 25 50 200
L1 25 30 1E-7
G4 28 50 22 25 5E-3
G5 29 50 25 22 5E-3
G6 25 99 99 22 5E-3
G7 50 25 22 50 5E-3
V4 26 25 1.8
V5 25 27 1.3
D5 22 26 DX
D6 27 22 DX
D7 99 28 DX
D8 99 29 DX
D9 50 28 DY
D10 50 29 DY
*
*MODELS USED
*
.MODEL QX NPN BF=2.5E6)
.MODEL DX D IS = 1E-15)
.MODEL DY D IS = 1E-15 BV = 50)
.ENDS OP297
–12–
C00300–0–10/02(D)
PRINTED IN U.S.A.
REV. D
8-Lead Plastic Dual-in-Line Package[PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
SEATING
PLANE
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79) 0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
8
14
5
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.100 (2.54)
BSC
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES)
COMPLIANT TO JEDEC STANDARDS MO-095AA
OUTLINE DIMENSIONS
8-Lead Ceramic Dip-Glass Hermetic Seal [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
14
85
0.310 (7.87)
0.220 (5.59)
PIN 1
0.005 (0.13)
MIN
0.055 (1.40)
MAX
0.100 (2.54) BSC
15
0
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.200 (5.08)
MAX
0.405 (10.29) MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36) 0.070 (1.78)
0.030 (0.76)
0.060 (1.52)
0.015 (0.38)
CONTROLLING DIMENSIONS ARE IN INCH; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(RN-8)
Dimensions shown in millimeters and (inches)
0.25 (0.0098)
0.19 (0.0075)
1.27 (0.0500)
0.41 (0.0160)
0.50 (0.0196)
0.25 (0.0099) ⴛ 45ⴗ
8ⴗ
0ⴗ
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
85
41
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.33 (0.0130)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012AA
Revision History
Location Page
10/02—Data Sheet changed from REV. C to REV. D.
Edits to Figure 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
10/02—Data Sheet changed from REV. B to REV. C.
Edits to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deleted WAFER TEST LIMITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Deleted DICE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Deleted ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12