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LM4781 Overture™ Audio Power Amplifier Series 3 Channel 35W Audio Power Amplifier
with Mute
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1FEATURES DESCRIPTION
The LM4781 is a three channel audio amplifier
23• SPiKe Protection capable of typically delivering 35W per channel of
• Low External Component Count continuous average output power into an 8Ωload
• Quiet Fade-In/Out Mute Mode with less than 0.5% THD+N from 20Hz - 20kHz.
• Wide Supply Range: 20V - 70V The LM4781 is fully protected utilizing TI's Self Peak
• Signal-to-Noise Ratio ≥93dB (ref. to PO= 1W) Instantaneous Temperature (°Ke) (SPiKe) protection
circuitry. SPiKe provides a dynamically optimized
Safe Operating Area (SOA). SPiKe protection
APPLICATIONS completely safeguards the LM4781's outputs against
• Audio Amplifier for Component Stereo over-voltage, under-voltage, overloads, shorts to the
• Audio Amplifier for Compact Stereo supplies or GND, thermal runaway and instantaneous
temperature peaks. The advanced protection features
• Audio Amplifier for Self-Powered Speakers of the LM4781 places it in a class above discrete and
• Audio Amplifier for High-End and HD TVs hybrid amplifiers.
Each amplifier of the LM4781 has an independent
KEY SPECIFICATIONS smooth transition fade-in/out mute.
• Output Power/Channel with 0.5% THD+N, 1kHz The LM4781 can easily be configured for bridge or
into 8Ω: 35W (typ) parallel operation for higher power and bi-amp
• THD+N at 3 x 20W into 8Ω(20Hz - 20kHz): 0.2% solutions.
(typ)
• THD+N at 3 x 20W into 6Ω(20Hz - 20kHz): 0.3%
(typ)
• THD+N at 3 x 20W into 4Ω(20Hz - 20kHz): 0.5%
(typ)
• Mute Attenuation: 110dB (typ)
• PSRR: 85dB (min)
• Slew Rate: 9V/μs (typ)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Overture is a trademark of dcl_owner.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2003–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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Typical Application
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
Figure 2. Plastic TO-220 Package – Top View
See Package Number NDM0027A(1)
(1) The NDM0027A is a non-isolated package. The package's metal back and any heat sink to which it is mounted are connected to the V-
potential when using only thermal compound. If a mica washer is used in addition to thermal compound, θCS (case to sink) is increased,
but the heat sink will be electrically isolated from V-.
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)(3)
Supply Voltage |V+| + |V-| (No Signal) 72V
Supply Voltage |V+| + |V-| (Input Signal) 70V
Common Mode Input Voltage (V+or V-) and
|V+| + |V-|≤60V
Differential Input Voltage(4) 60V
Output Current Internally Limited
Power Dissipation(5) 125W
ESD Susceptability(6) 2.0kV
ESD Susceptability(7) 200V
Junction Temperature (TJMAX)(8) 150°C
Soldering Information TA Package (10 seconds) 260°C
Storage Temperature -40°C to +150°C
Thermal Resistance(9) θJA 30°C/W
θJC 0.9°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
(2) All voltages are measured with respect to the ground pins, unless otherwise specified.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(4) The Differential Input Voltage Absolute Maximum Rating is based on supply voltages V+= 30V and V-= - 30V.
(5) The maximum power dissipation must be de-rated at elevated temperatures and is dictated by TJMAX,θJC, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX -TA)/θJC or the number given in the Absolute Maximum Ratings,
whichever is lower. For the LM4781, TJMAX = 150°C and the typical θJC is 0.9°C/W. Refer to the DETERMINING THE CORRECT HEAT
SINK section for more information.
(6) Human body model, 100pF discharged through a 1.5kΩresistor.
(7) Machine Model: a 220pF - 240pF discharged through all pins.
(8) The maximum operating junction temperature is 150°C. However, the instantaneous Safe Operating Area temperature is 250°C.
(9) The NDM0027A is a non-isolated package. The package's metal back and any heat sink to which it is mounted are connected to the V-
potential when using only thermal compound. If a mica washer is used in addition to thermal compound, θCS (case to sink) is increased,
but the heat sink will be electrically isolated from V-.
Operating Ratings(1)(2)(3)
Temperature Range TMIN ≤TA≤TMAX −20°C ≤TA≤+85°C
Supply Voltage |V+| + |V-| 20V ≤VTOTAL ≤70V
(1) All voltages are measured with respect to the ground pins, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
(3) Operation is ensured up to 70V; however, distortion may be introduced from SPiKe protection circuitry if proper thermal considerations
are not taken into account. Refer to the THERMAL PROTECTION section for more information.
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Electrical Characteristics(1)(2)
The following specifications apply for V+= +28V, V-=−28V, IMUTE = -1mA/channel and RL= 8Ωunless otherwise specified.
Limits apply for TA= 25°C. LM4781 Units
Symbol Parameter Conditions (Limits)
Typical(3) Limit(4)(5)
20 V (min)
|V+| + |V-| Power Supply Voltage(6) GND −V-≥9V 18 70 V (max)
AMMute Attenuation IMUTE = 0mA 110 80 dB (min)
THD+N = 0.5% (max)
f = 1kHz
POOutput Power (RMS) |V+| = |V-| = 20V, RL= 4Ω25 20 W (min)
|V+| = |V-| = 24V, RL= 6Ω30 25 W (min)
|V+| = |V-| = 28V, RL= 8Ω35 30 W (min)
PO= 20W, f = 20Hz - 20kHz
AV= 26dB
Total Harmonic Distortion +
THD+N |V+| = |V-| = 20V, RL= 4Ω0.5 %
Noise |V+| = |V-| = 24V, RL= 6Ω0.3 %
|V+| = |V-| = 28V, RL= 8Ω0.2 %
PO= 10W, f = 1kHz 70 dB
Xtalk Channel Separation(7) PO= 10W, f = 10kHz 66 dB
SR Slew Rate VIN = 1.2VRMS, f = 10kHz square 9 5 V/μs (min)
Wave.RL= 2kΩ
IDD Total Quiescent Power VCM = 0V 75 150 mA (max)
Supply Current VO= 0V, IO= 0A
VOS Input Offset Voltage VCM = 0V, IO= 0mA 1 10 mV (max)
IBInput Bias Current VCM = 0V, IO= 0mA 0.2 1 μA (max)
IOOutput Current Limit |V+| = |V-| = 20V, tON = 10ms 4 3 A (min)
|V+- VO|, V+= 20V, IO= +100mA 1.5 4 V (max)
VOD Output Dropout Voltage(8) |VO- V-|, V-= -20V, IO= -100mA 2.5 4 V (max)
V+= 30V to 10V, V-= -30V 125 85 dB (min)
VCM = 0V, IO= 0mA
PSRR Power Supply Rejection Ratio(9) V+= 30V, V-= -30V to -10V 110 85 dB (min)
VCM = 0V, IO= 0mA
CMRR Common Mode Rejection Ratio(9) V+= 30V to 10V, V-= -10V to -30V 110 75 dB (min)
VCM = 20V to -20V, IO= 0mA
AVOL Open Loop Voltage Gain |V+| = |V-| = 28V, RL= 2kΩ115 80 dB (min)
ΔVO= 20V
GBWP Gain Bandwidth Product |V+| = |V-| = 28V, fIN = 100kHz 8 2 MHz (min)
VIN = 50mVRMS
eIN Input Noise IHF-A-Weighting Filter, 3.0 8 μV (max)
RIN = 600Ω(Input Referred)
(1) All voltages are measured with respect to the ground pins, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given; however, the typical value is a good indication
of device performance.
(3) Typical specifications are measured at 25°C and represent the parametric norm.
(4) Tested limits are specified to TI's AOQL (Average Outgoing Quality Level).
(5) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(6) V-must have at least - 9V at its pin with reference to GND in order for the under-voltage protection circuitry to be disabled. In addition,
the voltage differential between V+and V-must be greater than 14V.
(7) Cross talk performance was measured using the demo board shown in the datasheet. PCB layout will affect cross talk. It is
recommended that the input and output traces be separated by as much distance as possible. Return ground traces from outputs should
also be independent back to single ground point and use as wide of traces as possible.
(8) The output dropout voltage is the supply voltage minus the clipping voltage. Refer to the Clipping Voltage vs. Supply Voltage graph in
the Typical Performance Characteristics section.
(9) DC electrical test.
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Electrical Characteristics(1)(2) (continued)
The following specifications apply for V+= +28V, V-=−28V, IMUTE = -1mA/channel and RL= 8Ωunless otherwise specified.
Limits apply for TA= 25°C. LM4781 Units
Symbol Parameter Conditions (Limits)
Typical(3) Limit(4)(5)
PO= 1WRMS; A-Weighted Filter 93 dB
fIN = 1kHz, RS= 25Ω
SNR Signal-to-Noise Ratio PO= 25WRMS; A-Weighted Filter 107 dB
fIN = 1kHz, RS= 25Ω
60Hz, 7kHz, 4:1 (SMPTE) 0.004 %
IMD Intermodulation Distortion 60Hz, 7kHz, 1:1 (SMPTE) 0.006 %
Bridged Amplifier Application Circuit
Figure 3. Bridged Amplifier Application Circuit
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Single Supply Application Circuit
Figure 5. Single Supply Amplifier Application Circuit
NOTE
*Optional components dependent upon specific design requirements.
Auxiliary Amplifier Application Circuit
Figure 6. Special Audio Amplifier Application Circuit
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External Components Description
Figure 1,Figure 3,Figure 4,Figure 5, and Figure 6
Components Functional Description
1 RBPrevents current from entering the amplifier's non-inverting input. This current may pass through to the load during
system power down, because of the amplifier's low input impedance when the undervoltage circuitry is off. This
phenomenon occurs when the V+and V-supply voltages are below 1.5V.
2 RiInverting input resistance. Along with Rf, sets AC gain.
3 RfFeedback resistance. Along with Ri, sets AC gain.
4 Rf2 Feedback resistance. Works with Cf and Rf creating a lowpass filter that lowers AC gain at high frequencies. The -
(1) 3dB point of the pole occurs when: (Rf- Ri)/2 = Rf// [1/(2πfcCf) + Rf2] for the Non-Inverting configuration shown in
Figure 6.
5 CfCompensation capacitor. Works with Rfand Rf2 to reduce AC gain at higher frequencies.
(1)
6 CCCompensation capacitor. Reduces the gain at higher frequencies to avoid quasi-saturation oscillations of the output
(1) transistor. Also suppresses external electromagnetic switching noise created from fluorescent lamps.
7 CiFeedback capacitor which ensures unity gain at DC. Along with Rialso creates a highpass filter at fc= 1/(2πRiCi).
(1)
8 CSProvides power supply filtering and bypassing. Refer to the SUPPLY BYPASSING application section for proper
placement and selection of bypass capacitors.
9 RVActs as a volume control by setting the input voltage level.
(1)
10 RIN Sets the amplifier's input terminals DC bias point when CIN is present in the circuit. Also works with CIN to create a
(1) highpass filter at fC= 1/(2πRINCIN). If the value of RIN is too large, oscillations may be observed on the outputs
when the inputs are floating. Recommended values are 10kΩto 47kΩ. Refer to Figure 6.
11 CIN Input capacitor. Prevents the input signal's DC offsets from being passed onto the amplifier's inputs.
(1)
12 RSN Works with CSN to stabilize the output stage by creating a pole that reduces high frequency instabilities.
(1)
13 CSN Works with RSN to stabilize the output stage by creating a pole that reduces high frequency instabilities. The pole is
(1) set at fC= 1/(2πRSNCSN). Refer to Figure 6.
14 L (1) Provides high impedance at high frequencies so that R may decouple a highly capacitive load and reduce the Q of
the series resonant circuit. Also provides a low impedance at low frequencies to short out R and pass audio signals
15 R (1) to the load. Refer to Figure 6.
16 RAProvides DC voltage biasing for the transistor Q1 in single supply operation.
17 CAProvides bias filtering for single supply operation.
18 RINP Limits the voltage difference between the amplifier's inputs for single supply operation. Refer to the CLICKS AND
(1) POPS application section for a more detailed explanation of the function of RINP.
19 RBI Provides input bias current for single supply operation. Refer to the CLICKS AND POPS application section for a
more detailed explanation of the function of RBI.
20 REEstablishes a fixed DC current for the transistor Q1 in single supply operation. This resistor stabilizes the half-
supply point along with CA.
21 RMMute resistance set up to allow 0.5mA to be drawn from each MUTE pin to turn the muting function off.
→RMis calculated using: RM≤(|VEE|−2.6V)/l where l ≥0.5mA. Refer to the Mute Attenuation vs Mute Current
curves in the Typical Performance Characteristics section.
22 CMMute capacitance set up to create a large time constant for turn-on and turn-off muting.
23 S1Mute switch. When open or switched to GND, the amplifier will be in mute mode.
24 ROUT Reduces current flow between outputs that are caused by Gain or DC offset differences between the amplifiers.
(1) Optional components dependent upon specific design requirements.
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Optional External Component Interaction
Although the optional external components have specific desired functions that are designed to reduce the
bandwidth and eliminate unwanted high frequency oscillations they may cause certain undesirable effects when
they interact. Interaction may occur for components whose reactances are in close proximity to one another. One
example would be the coupling capacitor, CC, and the compensation capacitor, Cf. These two components act as
low impedances to certain frequencies which will couple signals from the input to the output. Please take careful
note of basic amplifier component functionality when designing in these components.
The optional external components shown in Figure 5 and Figure 6 and described above are applicable in both
single and split voltage supply configurations.
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Typical Performance Characteristics
THD+N THD+N
vs vs
Frequency Frequency
±20V, POUT = 1W & 20W/Channel ±24V, POUT = 1W & 20W/Channel
RL= 4Ω, 80kHz BW RL= 6Ω, 80kHz BW
Figure 7. Figure 8.
THD+N
vs THD+N
Frequency vs
±28V, POUT = 1W & 20W/Channel Output Power/Channel
RL= 8Ω, 80kHz BW ±20V, RL= 4Ω, 80kHz BW
Figure 9. Figure 10.
THD+N THD+N
vs vs
Output Power/Channel Output Power/Channel
±24V, RL= 6Ω, 80kHz BW ±28V, RL= 8Ω, 80kHz BW
Figure 11. Figure 12.
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Typical Performance Characteristics (continued)
Output Power/Channel Output Power/Channel
vs Supply Voltage vs Supply Voltage
f = 1kHz, RL= 4Ω, 80kHz BW f = 1kHz, RL= 6Ω, 80kHz BW
Figure 13. Figure 14.
Output Power/Channel Total Power Dissipation
vs Supply Voltage vs Output Power/Channel
f = 1kHz, RL= 8Ω, 80kHz BW 1% THD (max), RL= 4Ω, 80kHz BW
Figure 15. Figure 16.
Total Power Dissipation Total Power Dissipation
vs Output Power/Channel vs Output Power/Channel
1% THD (max), RL= 6Ω, 80kHz BW 1% THD (max), RL= 8Ω, 80kHz BW
Figure 17. Figure 18.
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Typical Performance Characteristics (continued)
Crosstalk Crosstalk
vs vs
Frequency Frequency
±20V, POUT = 10W, ±28V, POUT = 10W,
RL= 4Ω, 80kHz BW RL= 8Ω, 80kHz BW
Figure 19. Figure 20.
Two Channels On Crosstalk Two Channels On Crosstalk
vs vs
Frequency Frequency
±20V, POUT = 10W, ±28V, POUT = 10W,
RL= 4Ω, 80kHz BW RL= 8Ω, 80kHz BW
Figure 21. Figure 22.
Mute Attenuation
vs Supply Current
Mute Pin Current vs
POUT = 10W/Channel Supply Voltage
Figure 23. Figure 24.
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Typical Performance Characteristics (continued)
Power Supply
Large Signal Response Rejection Ratio
Figure 25. Figure 26.
Common-Mode Open Loop
Rejection Ratio Frequency Response
Figure 27. Figure 28.
THD+N
vs
Frequency
± 20V, POUT = 1W & 25W,
Clipping Voltage Chs 1&3 in Bridge Mode (Note17),
vs Supply Voltage RL= 8Ω, 80kHz BW
Figure 29. Figure 30.
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Typical Performance Characteristics (continued)
THD+N THD+N
vs vs
Frequency Frequency
± 28V, POUT = 1W & 35W, ± 24V, POUT = 1W & 45W,
Chs 1&3 in Parallel Mode (Note18), All Chs in Parallel Mode (Note18),
RL= 4Ω, 80kHz BW RL= 2Ω, 80kHz BW
Figure 31. Figure 32.
THD+N THD+N
vs vs
Output Power Output Power
± 20V, Chs 1&3 in Bridge Mode (Note17), ± 28V, Chs 1&3 in Parallel Mode (Note18),
RL= 8Ω, 80kHz BW RL= 4Ω, 80kHz BW
Figure 33. Figure 34.
THD+N Output Power
vs vs
Output Power Supply Voltage
± 24V, All Chs in Parallel Mode (Note18), Chs 1&3 in Bridge Mode (Note17),
RL= 2Ω, 80kHz BW f = 1kHz, RL= 8Ω, 80kHz BW
Figure 35. Figure 36.
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Typical Performance Characteristics (continued)
Output Power Output Power
vs vs
Supply Voltage Supply Voltage
Chs 1&3 in Parallel Mode (Note18), All Chs in Parallel Mode (Note18),
f = 1kHz, RL= 4Ω, 80kHz BW f = 1kHz, RL= 2Ω, 80kHz BW
Figure 37. Figure 38.
Safe Area SpiKe Protection Response
Figure 39. Figure 40.
(1) Bridge mode graphs were taken using the demo board and inverting the signal to the channel B input.
(2) Parallel mode graphs were taken using the demo board connecting each output through a 0.1Ω/3W resistor to the
load. Frequency Response of Demo Board
POUT = 10W/Channel = 0dB, RIN = 47kΩ
RL= 8Ω, No Filters
Figure 41.
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APPLICATION INFORMATION
MUTE MODE
The muting function allows the user to mute the amplifier. This can be accomplished as shown in the Typical
Application Circuit. The resistor RMis chosen with reference to the negative supply voltage and is used in
conjunction with a switch. The switch, when opened or switched to GND, cuts off the current flow from the MUTE
pins to −VEE, thus placing the LM4781 into mute mode. Refer to the Mute Attenuation vs Mute Current curves in
the Typical Performance Characteristics section for values of attenuation per current out of each MUTE pin. The
resistance RMis calculated by the following equation:
RM≤(|−VEE|−2.6V) / IMUTE
Where
• IMUTE ≥0.5mA for each MUTE pin. (1)
The MUTE pins can be tied together so that only one resistor is required for the mute function. The mute resistor
value must be chosen so that a minimum of 1.5mA is pulled through the resistor RM. This ensures that each
amplifier is fully operational. Taking into account supply line fluctuations, it is a good idea to pull out 1mA per
MUTE pin or 3mA total if all pins are tied together.
A turn-on MUTE or soft start circuit may also be used during power up. A simple circuit like the one shown below
may be used.
The RC combination of CMand RM1 may cause the voltage at point A to change more slowly than the -VEE
supply voltage. Until the voltage at point A is low enough to have 0.5mA of current per MUTE pin flow through
RM2, the IC will be in mute mode. The series combination of RM1 and RM2 needs to satisfy Equation 1 above for
all operating voltages or mute mode may be activated during normal operation. For a longer turn-on mute time, a
larger time constant, τ=RC=RM1CM(sec), is needed. For the values show above and with the MUTE pins tied
together, the LM4781 will enter play mode when the voltage at point A is -25.1V. The voltage at point A is found
with Equation 2 below.
VA(t) = (Vf- VO)e-t/τ(Volts)
where
• t = time (sec)
•τ= RC (sec)
• Vo= Voltage on C at t = 0 (Volts)
• Vf= Final voltage, -VEE in this circuit (Volts) (2)
UNDER-VOLTAGE PROTECTION
Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding
capacitors to come up close to their full values before turning on the LM4781. Since the supplies have essentially
settled to their final value, no DC output spikes occur. At power down, the outputs of the LM4781 are forced to
ground before the power supply voltages fully decay preventing transients on the output.
OVER-VOLTAGE PROTECTION
The LM4781 contains over-voltage protection circuitry that limits the output current while also providing voltage
clamping. The clamp does not, however, use internal clamping diodes. The clamping effect is quite the same
because the output transistors are designed to work alternately by sinking large current spikes.
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SPiKe PROTECTION
The LM4781 is protected from instantaneous peak-temperature stressing of the power transistor array. The Safe
Operating graph in the Typical Performance Characteristics section shows the area of device operation where
SPiKe Protection Circuitry is not enabled. The SPiKe Protection Response waveform graph shows the waveform
distortion when SPiKe is enabled. Please refer to AN-898 for more detailed information.
THERMAL PROTECTION
The LM4781 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device.
When the temperature on the die exceeds 150°C, the LM4781 shuts down. It starts operating again when the die
temperature drops to about 145°C, but if the temperature again begins to rise, shutdown will occur again above
150°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is
temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal
shutdown temperature limits of 150°C and 145°C. This greatly reduces the stress imposed on the IC by thermal
cycling, which in turn improves its reliability under sustained fault conditions.
Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen so that
thermal shutdown is not activated during normal operation. Using the best heat sink possible within the cost and
space constraints of the system will improve the long-term reliability of any power semiconductor device, as
discussed in the DETERMINING THE CORRECT HEAT SINK section.
DETERMlNlNG MAXIMUM POWER DISSIPATION
Power dissipation within the integrated circuit package is a very important parameter requiring a thorough
understanding if optimum power output is to be obtained. An incorrect maximum power dissipation calculation
may result in inadequate heat sinking causing thermal shutdown and thus limiting the output power.
Equation 3 shows the theoretical maximum power dissipation point for each amplifier in a single-ended
configuration where VCC is the total supply voltage.
PDMAX = (VCC)2/ 2π2RL(3)
Thus by knowing the total supply voltage and rated output load, the maximum power dissipation point can be
calculated. The package dissipation is three times the number which results from Equation 3 since there are
three amplifiers in each LM4781. Refer to the graphs of Power Dissipation versus Output Power in the Typical
Performance Characteristics section which show the actual full range of power dissipation not just the maximum
theoretical point that results from Equation 3.
DETERMINING THE CORRECT HEAT SINK
The choice of a heat sink for a high-power audio amplifier is made entirely to keep the die temperature at a level
such that the thermal protection circuitry is not activated under normal circumstances.
The thermal resistance from the die to the outside air, θJA (junction to ambient), is a combination of three thermal
resistances, θJC (junction to case), θCS (case to sink), and θSA (sink to ambient). The thermal resistance, θJC
(junction to case), of the LM4781T is 0.9°C/W. Using Thermalloy Thermacote thermal compound, the thermal
resistance, θCS (case to sink), is about 0.2°C/W. Since convection heat flow (power dissipation) is analogous to
current flow, thermal resistance is analogous to electrical resistance, and temperature drops are analogous to
voltage drops, the power dissipation out of the LM4781 is equal to the following:
PDMAX = (TJMAX−TAMB) / θJA
where
• TJMAX = 150°C
• TAMB is the system ambient temperature
•θJA =θJC +θCS +θSA (4)
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Once the maximum package power dissipation has been calculated using Equation 3, the maximum thermal
resistance, θSA, (heat sink to ambient) in °C/W for a heat sink can be calculated. This calculation is made using
Equation 5 which is derived by solving for θSA in Equation 4.
θSA = [(TJMAX−TAMB)−PDMAX(θJC +θCS)] / PDMAX (5)
Again it must be noted that the value of θSA is dependent upon the system designer's amplifier requirements. If
the ambient temperature that the audio amplifier is to be working under is higher than 25°C, then the thermal
resistance for the heat sink, given all other things are equal, will need to be smaller.
SUPPLY BYPASSING
The LM4781 has excellent power supply rejection and does not require a regulated supply. However, to improve
system performance as well as eliminate possible oscillations, the LM4781 should have its supply leads
bypassed with low-inductance capacitors having short leads that are located close to the package terminals.
Inadequate power supply bypassing will manifest itself by a low frequency oscillation known as “motorboating” or
by high frequency instabilities. These instabilities can be eliminated through multiple bypassing utilizing a large
tantalum or electrolytic capacitor (10μF or larger) which is used to absorb low frequency variations and a small
ceramic capacitor (0.1μF) to prevent any high frequency feedback through the power supply lines.
If adequate bypassing is not provided, the current in the supply leads which is a rectified component of the load
current may be fed back into internal circuitry. This signal causes distortion at high frequencies requiring that the
supplies be bypassed at the package terminals with an electrolytic capacitor of 470μF or more.
BRIDGED AMPLIFIER APPLICATION
The LM4781 has three operational amplifiers internally, allowing for a few different amplifier configurations. One
of these configurations is referred to as “bridged mode” and involves driving the load differentially through two of
the LM4781's outputs. This configuration is shown in Figure 3. Bridged mode operation is different from the
classical single-ended amplifier configuration where one side of its load is connected to ground.
A bridge amplifier design has a distinct advantage over the single-ended configuration, as it provides differential
drive to the load, thus doubling output swing for a specified supply voltage. Theoretically, four times the output
power is possible as compared to a single-ended amplifier under the same conditions. This increase in attainable
output power assumes that the amplifier is not current limited or clipped.
A direct consequence of the increased power delivered to the load by a bridge amplifier is an increase in internal
power dissipation. For each operational amplifier in a bridge configuration, the internal power dissipation will
increase by a factor of two over the single ended dissipation. Using Equation 3 the load impedance should be
divided by a factor of two to find the maximum power dissipation point for each amplifier in a bridge configuration.
In the case of an 8Ωload in a bridge configuration, the value used for RLin DETERMlNlNG MAXIMUM POWER
DISSIPATION would be 4Ωfor each amplifier in the bridge. When using two of the amplifiers of the LM4781 in
bridge mode, the third amplifier should have a load impedance equal to or higher than the equivalent impedance
seen by each of the bridged amplifiers. In the example above where the bridge load is 8Ωand each amplifier in
the bridge sees a load value of 4Ωthen the third amplifier should also have a 4Ωload impedance or higher.
Using a lower load impedance on the third amplifier will result in higher power dissipation in the third amplifier
than the other two amplifiers and may result in unwanted activation of thermal shut down on the third amplifier.
Once the impedance seen by each amplifier is known then Equation 3 can be used to calculated the value of
PDMAX for each amplifier. The PDMAX of the IC package is found by adding up the power dissipation for each
amplifier within the IC package.
This value of PDMAX can be used to calculate the correct size heat sink for a bridged amplifier application. Since
the internal dissipation for a given power supply and load is increased by using bridged-mode, the heatsink's θSA
will have to decrease accordingly as shown by Equation 5. Refer to the section, DETERMINING THE CORRECT
HEAT SINK for a more detailed discussion of proper heat sinking for a given application.
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PARALLEL AMPLIFIER APPLICATION
Parallel configuration is normally used when higher output current is needed for driving lower impedance loads
(i.e. 4Ωor lower) to obtain higher output power levels. As shown in Figure 4 , the parallel amplifier configuration
consist of designing the amplifiers in the IC to have identical gain, connecting the inputs in parallel and then
connecting the outputs in parallel through a small external output resistor. Any number of amplifiers can be
connected in parallel to obtain the needed output current or to divide the power dissipation across multiple IC
packages. Ideally, each amplifier shares the output current equally. Due to slight differences in gain the current
sharing will not be equal among all channels. If current is not shared equally among all channels then the power
dissipation will also not be equal among all channels. It is recommended that 0.1% tolerance resistors be used to
set the gain (Riand Rf) for a minimal amount of difference in current sharing.
When operating two or more amplifiers in parallel mode the impedance seen by each amplifier is equal to the
total load impedance multiplied by the number of amplifiers driving the load in parallel as shown by Equation 6
below:
RL(parallel) = RL(total) * Number of amplifiers (6)
Once the impedance seen by each amplifier in the parallel configuration is known then Equation 3 can be used
with this calculated impedance to find the amount of power dissipation for each amplifier. Total power dissipation
(PDMAX) within an IC package is found by adding up the power dissipation for each amplifier in the IC package.
Using the calculated PDMAX the correct heat sink size can be determined. Refer to the section, DETERMINING
THE CORRECT HEAT SINK, for more information and detailed discussion of proper heat sinking.
If only two amplifiers of the LM4781 are used in parallel mode then the third amplifier should have a load
impedance equal to or higher than the equivalent impedance seen by each of the amplifiers in parallel mode.
Having the same load impedance on all amplifiers means that the power dissipation in each amplifier will be
equal. Using a lower load impedance on the third amplifier will result in higher power dissipation in the third
amplifier than the other two amplifiers and may result in unwanted activation of thermal shut down on the third
amplifier. Having a higher impedance on the third amplifier than the equivalent impedance on the two amplifiers
in parallel will reduce total IC package power dissipation reducing the heat sink size requirement.
BI-AMP AND TRI-AMP APPLICATIONS
Bi-amping is the practice of using two different amplifiers to power the individual drivers in a speaker enclosure.
For example, a two-way speaker enclosure might have a tweeter and a subwoofer. One amplifier would drive the
tweeter and another would drive the subwoofer. One advantage is that the gain of each amplifier can be adjusted
for the different driver sensitivities. Another advantage is the crossover can be designed before the amplifier
stages with low cost op amps instead of large passive components. With the crossover before the amplifier
stages no power is wasted in the passive crossover as each individual amplifier provides the correct frequencies
for the driver. Tri-Amping is using three different amplifier stages in the same way bi-amping is done. Bi-amping
can also be done on a three-way speaker design by using one amplifier for the subwoofer and another for the
midrange and tweeter.
The LM4781 is perfectly suited for bi-amp or tri-amp applications with it's three amplifiers. Two of the amplifiers
can be configured for bridge or parallel mode to drive a subwoofer with the third amplifier driving the tweeter or
tweeter and midrange. An example would be to use a 4Ωsubwoofer and 8Ωtweeter/midrange with the LM4781
in parallel and single-ended modes. Each amplifier would see an 8Ωload but the subwoofer would have twice
the output power as the tweeter/midrange. The gain of each amplifier may also be adjusted for the desired
response. Using the LM4781 in a tri-amp configuration would allow the gain of each amplifier to be adjusted to
achieve the desired speaker response.
SINGLE-SUPPLY AMPLIFIER APPLICATION
The typical application of the LM4781 is a split supply amplifier. But as shown in Figure 5, the LM4781 can also
be used in a single power supply configuration. This involves using some external components to create a half-
supply bias which is used as the reference for the inputs and outputs. Thus, the signal will swing around half-
supply much like it swings around ground in a split-supply application. Along with proper circuit biasing, a few
other considerations must be accounted for to take advantage of all of the LM4781 functions, like the mute
function.
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CLICKS AND POPS
In the typical application of the LM4781 as a split-supply audio power amplifier, the IC exhibits excellent “click”
and “pop” performance when utilizing the mute mode. In addition, the device employs Under-Voltage Protection,
which eliminates unwanted power-up and power-down transients. The basis for these functions are a stable and
constant half-supply potential. In a split-supply application, ground is the stable half-supply potential. But in a
single-supply application, the half-supply needs to charge up at the same rate as the supply rail, VCC. This makes
the task of attaining a clickless and popless turn-on more challenging. Any uneven charging of the amplifier
inputs will result in output clicks and pops due to the differential input topology of the LM4781.
To achieve a transient free power-up and power-down, the voltage seen at the input terminals should be ideally
the same. Such a signal will be common-mode in nature, and will be rejected by the LM4781. In Figure 5, the
resistor RINP serves to keep the inputs at the same potential by limiting the voltage difference possible between
the two nodes. This should significantly reduce any type of turn-on pop, due to an uneven charging of the
amplifier inputs. This charging is based on a specific application loading and thus, the system designer may need
to adjust these values for optimal performance.
As shown in Figure 5, the resistors labeled RBI help bias up the LM4781 off the half-supply node at the emitter of
the 2N3904. But due to the input and output coupling capacitors in the circuit, along with the negative feedback,
there are two different values of RBI, namely 10kΩand 200kΩ. These resistors bring up the inputs at the same
rate resulting in a popless turn-on. Adjusting these resistors values slightly may reduce pops resulting from
power supplies that ramp extremely quick or exhibit overshoot during system turn-on.
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components is required to meet the design targets of an application. The choice of
external component values that will affect gain and low frequency response are discussed below.
The gain of each amplifier is set by resistors Rfand Rifor the non-inverting configuration shown in Figure 1. The
gain is found by Equation 7 below:
AV= 1 + Rf/ Ri(V/V) (7)
For best noise performance, lower values of resistors are used. A value of 1kΩis commonly used for Riand then
setting the value of Rffor the desired gain. For the LM4781 the gain should be set no lower than 10V/V and no
higher than 50V/V. Gain settings below 10V/V may experience instability and using the LM4781 for gains higher
than 50V/V will see an increase in noise and THD.
The combination of Riwith Ci(see Figure 1) creates a high pass filter. The low frequency response is determined
by these two components. The -3dB point can be found from Equation 8 shown below:
fi= 1 / (2πRiCi) (Hz) (8)
If an input coupling capacitor is used to block DC from the inputs as shown in Figure 6, there will be another high
pass filter created with the combination of CIN and RIN. When using a input coupling capacitor RIN is needed to
set the DC bias point on the amplifier's input terminal. The resulting -3dB frequency response due to the
combination of CIN and RIN can be found from Equation 9 shown below:
fIN = 1 / (2πRINCIN) (Hz) (9)
With large values of RIN oscillations may be observed on the outputs when the inputs are left floating. Decreasing
the value of RIN or not letting the inputs float will remove the oscillations. If the value of RIN is decreased then the
value of CIN will need to increase in order to maintain the same -3dB frequency response.
HIGH PERFORMANCE CONSIDERATIONS
Using low cost electrolytic capacitors in the signal path such as CIN and Ci(see Figure 1,Figure 3,Figure 4,
Figure 5, and Figure 6) will result in very good performance. However, electrolytic capacitors are less linear than
other premium capacitors. Higher THD+N performance may be obtained by using high quality polypropylene
capacitors in the signal path. A more cost effective solution may be the use of smaller value premium capacitors
in parallel with the larger electrolytic capacitors. This will maintain signal quality in the upper audio band where
any degradation is most noticeable while also coupling in the signals in the lower audio band for good bass
response.
Distortion is introduced as the audio signal approaches the lower -3dB point, determined as discussed in the
section above. By using larger values of capacitors such that the -3dB point is well outside of the audio band will
reduce this distortion and improve THD+N performance.
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Increasing the value of the large supply bypass capacitors will improve burst power output. The larger the supply
bypass capacitors the higher the output pulse current without supply droop increasing the peak output power.
This will also increase the headroom of the amplifier and reduce THD.
SIGNAL-TO-NOISE RATIO
In the measurement of the signal-to-noise ratio, misinterpretations of the numbers actually measured are
common. One amplifier may sound much quieter than another, but due to improper testing techniques, they
appear equal in measurements. This is often the case when comparing integrated circuit designs to discrete
amplifier designs. Discrete transistor amps often “run out of gain” at high frequencies and therefore have small
bandwidths to noise as indicated below.
Integrated circuits have additional open loop gain allowing additional feedback loop gain in order to lower
harmonic distortion and improve frequency response. It is this additional bandwidth that can lead to erroneous
signal-to-noise measurements if not considered during the measurement process. In the typical example above,
the difference in bandwidth appears small on a log scale but the factor of 10in bandwidth, (200kHz to 2MHz) can
result in a 10dB theoretical difference in the signal-to-noise ratio (white noise is proportional to the square root of
the bandwidth in a system).
In comparing audio amplifiers it is necessary to measure the magnitude of noise in the audible bandwidth by
using a “weighting” filter (see Note below). A “weighting” filter alters the frequency response in order to
compensate for the average human ear's sensitivity to the frequency spectra. The weighting filters at the same
time provide the bandwidth limiting as discussed in the previous paragraph.
NOTE
CCIR/ARM: A Practical Noise Measurement Method; by Ray Dolby, David Robinson and
Kenneth Gundry, AES Preprint No. 1353 (F-3).
In addition to noise filtering, differing meter types give different noise readings. Meter responses include:
1. RMS reading,
2. average responding,
3. peak reading, and
4. quasi peak reading.
Although theoretical noise analysis is derived using true RMS based calculations, most actual measurements are
taken with ARM (Average Responding Meter) test equipment.
Typical signal-to-noise figures are listed for an A-weighted filter which is commonly used in the measurement of
noise. The shape of all weighting filters is similar, with the peak of the curve usually occurring in the 3kHz–7kHz
region.
LEAD INDUCTANCE
Power op amps are sensitive to inductance in the output leads, particularly with heavy capacitive loading.
Feedback to the input should be taken directly from the output terminal, minimizing common inductance with the
load.
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Lead inductance can also cause voltage surges on the supplies. With long leads to the power supply, energy is
stored in the lead inductance when the output is shorted. This energy can be dumped back into the supply
bypass capacitors when the short is removed. The magnitude of this transient is reduced by increasing the size
of the bypass capacitor near the IC. With at least a 20μF local bypass, these voltage surges are important only if
the lead length exceeds a couple feet (>1μH lead inductance). Twisting together the supply and ground leads
minimizes the effect.
PHYSICAL IC MOUNTING CONSIDERATIONS
Mounting of the package to a heat sink must be done such that there is sufficient pressure from the mounting
screws to insure good contact with the heat sink for efficient heat flow. Over tightening the mounting screws will
cause the package to warp reducing contact area with the heat sink. Less contact with the heat sink will increase
the thermal resistance from the package case to the heat sink (θCS) resulting in higher operating die
temperatures and possible unwanted thermal shut down activation. Extreme over tightening of the mounting
screws will cause severe physical stress resulting in cracked die and catastrophic IC failure. The recommended
mounting screw size is M3 with a maximum torque of 50 N-cm. Additionally, it is best to use washers under the
screws to distribute the force over a wider area or a screw with a wide flat head. To further distribute the
mounting force a solid mounting bar in front of the package and secured in place with the two mounting screws
may be used. Other mounting options include a spring clip. If the package is secured with pressure on the front
of the package the maximum pressure on the molded plastic should not exceed 150N/mm2.
Additionally, if the mounting screws are used to force the package into correct alignment with the heat sink,
package stress will be increased. This increase in package stress will result in reduced contact area with the
heat sink increasing die operating temperature and possible catastrophic IC failure.
LAYOUT, GROUND LOOPS AND STABILITY
The LM4781 is designed to be stable when operated at a closed-loop gain of 10 or greater, but as with any other
high-current amplifier, the LM4781 can be made to oscillate under certain conditions. These oscillations usually
involve printed circuit board layout or output/input coupling issues.
When designing a layout, it is important to return the load ground, the output compensation ground, and the low
level (feedback and input) grounds to the circuit board common ground point through separate paths. Otherwise,
large currents flowing along a ground conductor will generate voltages on the conductor which can effectively act
as signals at the input, resulting in high frequency oscillation or excessive distortion. It is advisable to keep the
output compensation components and the 0.1μF supply decoupling capacitors as close as possible to the
LM4781 to reduce the effects of PCB trace resistance and inductance. For the same reason, the ground return
paths should be as short as possible.
In general, with fast, high-current circuitry, all sorts of problems can arise from improper grounding which again
can be avoided by returning all grounds separately to a common point. Without isolating the ground signals and
returning the grounds to a common point, ground loops may occur.
“Ground Loop” is the term used to describe situations occurring in ground systems where a difference in potential
exists between two ground points. Ideally a ground is a ground, but unfortunately, in order for this to be true,
ground conductors with zero resistance are necessary. Since real world ground leads possess finite resistance,
currents running through them will cause finite voltage drops to exist. If two ground return lines tie into the same
path at different points there will be a voltage drop between them. The first figure below, in Figure 42, shows a
common ground example where the positive input ground and the load ground are returned to the supply ground
point via the same wire. The addition of the finite wire resistance, R2, results in a voltage difference between the
two points as shown below.
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Figure 42.
The load current ILwill be much larger than input bias current II, thus V1will follow the output voltage directly, i.e.
in phase. Therefore the voltage appearing at the non-inverting input is effectively positive feedback and the
circuit may oscillate. If there was only one device to worry about then the values of R1and R2would probably be
small enough to be ignored; however, several devices normally comprise a total system. Any ground return of a
separate device, whose output is in phase, can feedback in a similar manner and cause instabilities. Out of
phase ground loops also are troublesome, causing unexpected gain and phase errors.
The solution to most ground loop problems is to always use a single-point ground system, although this is
sometimes impractical. The third figure above, in Figure 42, is an example of a single-point ground system.
The single-point ground concept should be applied rigorously to all components and all circuits when possible.
Violations of single-point grounding are most common among printed circuit board designs, since the circuit is
surrounded by large ground areas which invite the temptation to run a device to the closest ground spot. As a
final rule, make all ground returns low resistance and low inductance by using large wire and wide traces.
Occasionally, current in the output leads (which function as antennas) can be coupled through the air to the
amplifier input, resulting in high-frequency oscillation. This normally happens when the source impedance is high
or the input leads are long. The problem can be eliminated by placing a small capacitor, CC, (on the order of
50pF to 500pF) across the LM4781 input terminals. Refer to the External Components Description section
relating to component interaction with Cf.
REACTIVE LOADING
It is hard for most power amplifiers to drive highly capacitive loads very effectively and normally results in
oscillations or ringing on the square wave response. If the output of the LM4781 is connected directly to a
capacitor with no series resistance, the square wave response will exhibit ringing if the capacitance is greater
than about 0.2μF. If highly capacitive loads are expected due to long speaker cables, a method commonly
employed to protect amplifiers from low impedances at high frequencies is to couple to the load through a 10Ω
resistor in parallel with a 0.7μH inductor. The inductor-resistor combination as shown in the Figure 6 isolates the
feedback amplifier from the load by providing high output impedance at high frequencies thus allowing the 10Ω
resistor to decouple the capacitive load and reduce the Q of the series resonant circuit. The LR combination also
provides low output impedance at low frequencies thus shorting out the 10Ωresistor and allowing the amplifier to
drive the series RC load (large capacitive load due to long speaker cables) directly.
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INVERTING AMPLIFIER APPLICATION
The inverting amplifier configuration may be used instead of the more common non-inverting amplifier
configuration shown in Figure 1. The inverting amplifier can have better THD+N performance and eliminates the
need for a large capacitor (Ci) reducing cost and space requirements. The values show in Figure 43 are only one
example of an amplifier with a gain of 20V/V (Gain = -Rf/Ri). For different resistor values, the value of RBshould
be eqaul to the parallel combination of Rfand Ri.
If the DC blocking input capacitor (CIN) is used as shown, the lower -3dB point is found using Equation 9 as
discussed in the PROPER SELECTION OF EXTERNAL COMPONENTS section.
Figure 43. Inverting Amplifier Application Circuit
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Figure 44. Reference PCB Schematic
LM4781 REFERENCE BOARD ARTWORK
Figure 45. Composite Layer Figure 46. Silk Layer
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Figure 47. Top Layer Figure 48. Bottom Layer
Table 1. Bill Of Materials for Reference PCB
Symbol Value Tolerance Type/Description Comment
RIN1, RIN2, RIN3 33kΩ5% 1/4 Watt
RB1, RB2, RB3 1kΩ1% 1/4 Watt
RF1, RF2, RF3 20kΩ1% 1/4 Watt
Ri1, Ri2, Ri3 1kΩ1% 1/4 Watt
RSN1, RSN2, RSN3 4.7Ω5% 1/4 Watt
RG2.7Ω5% 1/4 Watt
RM5.6kΩ5% 1/4 Watt
CIN1, CIN2, CIN3 1µF 10% Metallized Polyester Film
Ci1, Ci2, Ci3 47µF 20% Electrolytic Radial / 50V
CSN1, CSN2, CSN3 0.1µF 20% Monolithic Ceramic
CS1, CS2 0.1µF 20% Monolithic Ceramic
CS3, CS4 10µF 20% Electrolytic Radial / 50V
CS5, CS6 2,200µF 20% Electrolytic Radial / 50V
S1SPDT (on-on) Switch
J1, J2, J3Non-Switched PC Mount RCA Jack
J5, J7, J9, J11 PCB Banana Jack - BLACK
J4, J6, J8, J10, J12 PCB Banana Jack - RED
27 lead TO-220 Power Socket with
U1push release lever or LM4781 IC
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REVISION HISTORY
Changes from Original (April 2013) to Revision A Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 26
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM4781TA/NOPB LIFEBUY TO-220 NDM 27 15 Green (RoHS
& no Sb/Br) CU SN Level-1-NA-UNLIM -20 to 85 L4781TA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2015
Addendum-Page 2
MECHANICAL DATA
NDM0027A
www.ti.com
TA27A (Rev B)
IMPORTANT NOTICE
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