GM76U256C Series 32Kx8bit CMOS SRAM Document Title 32K x8 bit 3.0V Low Power CMOS slow SRAM Revision History Revision No History Draft Date Remark 00 Revision History Insert Revised - Datasheet format change - PDIP package type insert - Pin configuration change Jul.08.2000 Final 01 Marking Information Add Revised - AC Test Condition Add : 5pF Test Load Dec.04.2000 Final 02 Changed Logo - HYUNDAI -> hynix Apr.30.2001 Final This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 02 / Apr. 2001 Hynix Semiconductor GM76U256C Series DESCRIPTION FEATURES The GM76U256C is a high-speed, low power and 32,786 X 8-bits CMOS Static Random Access Memory fabricated using Hynix's high performance CMOS process technology. It is suitable for use in low voltage operation and battery back-up application. This device has a data retention mode that guarantees data to remain valid at the minimum power supply voltage of 2.0 volt. * * * * Product Voltage Speed No. (V) (ns) GM76U256C 3.3 100/120 GM76U256CE 3.3 100/120 Note 1. Current value is max. Fully static operation and Tri-state output TTL compatible inputs and outputs Low power consumption Battery backup(L/LL-part) - 2.0V(min.) data retention * Standard pin configuration - 28 pin 600mil PDIP - 28 pin 330mil SOP - 28 pin 8x13.4 mm TSOP-I (Standard) Operation Current(mA) 2 2 Standby Current(uA) L LL 20 10 30 15 Temperature (C) 0~70(Normal) -25~85(Extended) PIN CONNECTION 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SOP Vcc /WE A13 A8 A9 A11 /OE A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4 /OE A11 A9 A8 A13 /WE Vcc A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 TSOP-I(Standard) PIN DESCRIPTION Pin Function Chip Select Write Enable Output Enable Address Inputs Data Input/Output Power(+5.0V) Ground BLOCK DIAGRAM A14 /CS /OE /WE Rev 02 / Apr. 2001 ROW DECODER A0 ADD INPUT BUFFER Pin Name /CS /WE /OE A0 ~ A14 I/O1 ~ I/O8 Vcc Vss A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4 Vss I/O3 I/O2 I/O1 A0 A1 A2 MEMORY ARRAY 512x512 I/O1 OUTPUT BUFFER PDIP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 Vss SENSE AMP Vcc /WE A13 A8 A9 A11 /OE A10 /CS I/O8 I/O7 I/O6 I/O5 I/O4 WRITE DRIVER 28 27 26 25 24 23 22 21 20 19 18 17 16 15 COLUMN DECODER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 I/O8 CONTROL LOGIC A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 Vss 2 GM76U256C Series ORDERING INFORMATION Part No. GM76U256CL GM76U256CLL GM76U256CLE GM76U256CLLE GM76U256CLFW GM76U256CLLFW GM76U256CLEFW GM76U256CLLEFW GM76U256CLT GM76U256CLLT GM76U256CLET GM76U256CLLET Speed 100/120 100/120 100/120 100/120 100/120 100/120 100/120 100/120 100/120 100/120 100/120 100/120 Power L-part LL-part L-part LL-part L-part LL-part L-part LL-part L-part LL-part L-part LL-part Temp 0 to 70C 0 to 70C -25 to 85C -25 to 85C 0 to 70C 0 to 70C -25 to 85C -25 to 85C 0 to 70C 0 to 70C -25 to 85C -25 to 85C Package PDIP PDIP PDIP PDIP SOP SOP SOP SOP TSOP-I Standard TSOP-I Standard TSOP-I Standard TSOP-I Standard ABSOLUTE MAXIMUM RATING (1) Symbol Vcc, VIN, VOUT TA Parameter Power Supply, Input/Output Voltage Operating Temperature GM76U256C GM76U256CE Storage Temperature Power Dissipation Data Output Current Lead Soldering Temperature & Time Rating -0.3 to 4.6 0 to 70 -25 to 85 -65 to 150 1.0 50 260 *10 Unit V C C C W mA C*sec TSTG PD IOUT TSOLDER Note 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliability. RECOMMENDED DC OPERATING CONDITIONS Symbol Parameter Min. Vcc Power Supply Voltage 2.7 Vss Ground 0 VIH Input High Voltage 2.2 VIL Input Low Voltage -0.3(1) Note 1. VIL = -3.0V for pulse width less than 50ns Typ. 3.0 0 - Max. 3.3 0 Vcc+0.3 0.4 Unit V V V V TRUTH TABLE /CS /WE /OE Mode H X X Standby L H H Output Disabled L H L Read L L X Write Note 1. H=VIH, L=VIL, X=Don't Care Rev 02 / Apr. 2001 I/O Operation High-Z High-Z Data Out Data In 2 GM76U256C Series DC CHARACTERISTICS Vcc = 3.0V 10%, TA = 0C to 70C (Normal)/-25C to 85C (Extended), unless otherwise specified. Parameter Test Condition Min. Typ. Max. Symbol ILI Input Leakage Current Vss < VIN < Vcc -1 1 ILO Output Leakage Current Vss < VOUT < Vcc, /CS = VIH or -1 1 /OE = VIH or /WE = VIL Icc Operating Power Supply /CS = VIL, 2 Current VIN = VIH or VIL, II/O = 0mA ICC1 Average Operating Current /CS = VIL, VIN = VIH or VIL, 30 Min. Duty Cycle = 100%, II/O = 0mA ICC2 Average Operating Current /CS = VIL, VIN = VIH or VIL, 5 Cycle = 1us , II/O = 0mA ISB TTL Standby Current /CS= VIH, 0.3 (TTL Inputs) VIN = VIH or VIL ISB1 CMOS Standby Current /CS > Vcc - 0.2V L 20 (CMOS Inputs) VIN > Vcc - 0.2V or LL 10 VIN < Vss + 0.2V LE 30 LLE 15 VOL Output Low Voltage IOL = 2.1mA 0.4 VOH Output High Voltage IOH = -1.0mA 2.4 - Unit uA uA mA mA mA mA uA uA uA uA V V Note : Typical values are at Vcc =3.0V, TA = 25C AC CHARACTERISTICS(I) Vcc = 3.0V 10%, TA = 0C to 70C (Normal) / -25C to 85C (Extended) unless otherwise specified. -10 -12 Unit # Symbol Parameter Min. Max. Min Max. READ CYCLE 1 tRC Read Cycle Time 100 120 ns 2 tAA Address Access Time 100 120 ns 3 tACS Chip Select Access Time 100 120 ns 4 tOE Output Enable to Output Valid 50 60 ns 5 tCLZ Chip Select to Output in Low Z 10 10 ns 6 tOLZ Output Enable to Output in Low Z 5 5 ns 7 tCHZ Chip Disable to Output in High Z 0 35 0 40 ns 8 tOHZ Out Disable to Output in High Z 0 35 0 40 ns 9 tOH Output Hold from Address Change 15 15 ns WRITE CYCLE 10 tWC Write Cycle Time 100 120 ns 11 tCW Chip Selection to End of Write 80 100 ns 12 tAW Address Valid to End of Write 80 100 ns 13 tAS Address Set-up Time 0 0 ns 14 tWP Write Pulse Width 70 85 ns 15 tWR Write Recovery Time 0 0 ns 16 tWHZ Write to Output in High Z 0 30 0 40 ns 17 tDW Data to Write Time Overlap 40 50 ns 18 tDH Data Hold from Write Time 0 0 ns 19 tOW Output Active from End of Write 10 10 ns Rev 02 / Apr. 2001 3 GM76U256C Series AC TEST CONDITIONS TA = 0C to 70C (Normal) / -25C to 85C (Extended) unless otherwise specified. Parameter Value Input Pulse Level 0.4V to 2.2V Input Rise and Fall Time 5ns Input and Output Timing Reference Level 1.5V Output Load tCLZ,tOLZ,tCHZ,tOHZ,tWHZ,tOW CL = 5pF + 1TTL Load Others CL = 100pF + 1TTL Load AC TEST LOADS TTL CL(1) Note : Including jig and scope capacitance CAPACITANCE TA = 25C, f = 1.0MHz Symbol Parameter CIN Input Capacitance CI/O Input /Output Capacitance Condition VIN = 0V VI/O = 0V Max. 6 8 Unit pF pF Note : These parameters are sampled and not 100% tested Rev 02 / Apr. 2001 4 GM76U256C Series TIMING DIAGRAM READ CYCLE 1 tRC ADDR tAA OE tOE tOH tOLZ CS tACS tOHZ tCHZ tCLZ Data Out High-Z Data Valid Note(READ CYCLE): 1. tCHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and arenot referenced to output voltage levels. 2. At any given temperature and voltage condition, tCHZ max. is less than tCLZ min. both for a given device and from device to device. 3. /WE is high for the read cycle. READ CYCLE 2 tRC ADDR tAA tOH tOH Data Out Previous Data Data Valid Note(READ CYCLE): 1. /WE is high for the read cycle. 2. Device is continuously selected /CS= VIL. 3. /OE =VIL. Rev 02 / Apr. 2001 5 GM76U256C Series WRITE CYCLE 1(/OE Clocked) tWC ADDR OE tAW tCW CS tAS tWR tWP WE tDW Data In tDH Data Valid tOHZ Data Out WRITE CYCLE 2 (/OE Low Fixed) tWC ADDR tAW tCW tWR CS tAS tWP WE tDW Data In tDH Data Valid tWHZ tOW (7) (8) Data Out Rev 02 / Apr. 2001 6 GM76U256C Series Notes(WRITE CYCLE): 1. A write occurs during the overlap of a low /CS and a low /WE. A write begins at the latest transition among /CS going low and /WE going low: A write ends at the earliest transition among /CS going high and /WE going high. tWP is measured from the beginning of write to the end of write. 2. tCW is measured from the later of /CS going low to the end of write . 3. tAS is measured from the address valid to the beginning of write. 4. tWR is measured from the end of write to the address change. tWR is applied in case a write ends as /CS, or /WE going high. 5. If /OE and /WE are in the read mode during this period, and the I/O pins are in the output low-Z state, input of opposite phase of the output must not be applied because bus contention can occur. 6. If /CS goes low simultaneously with /WE going low, or after /WE going low, the outputs remain in high impedance state. 7. DOUT is the same phase of the latest written data in this write cycle. 8. DOUT is the read data of the new address. DATA RETENTION CHARACTERISTIC TA=0C to 70C (Normal) Symbol Parameter VDR Vcc for Data Retention ICCDR Data Retention Current tCDR Chip Deselect to Data Retention Time Operating Recovery Time Test Condition CS>Vcc-0.2V, VIN>Vcc-0.2V or VIN<Vss+0.2V Vcc=3.0V, L /CS>Vcc - 0.2V, LL VIN>Vcc - 0.2V or LE VIN< Vss + 0.2V LLE See Data Retention tR Timing Diagram Notes 1. Typical values are under the condition of TA = 25C. 2. tRC is read cycle time. Min 2.0 Typ - Max - Unit V 0 1 0.5 1 0.5 - 15 7 20 10 - uA uA uA uA ns tRC(2) - - ns DATA RETENTION TIMING DIAGRAM DATA RETENTION MODE VCC 2.7V tCDR tR 2.2V VDR CS>VCC-0.2V CS VSS Rev 02 / Apr. 2001 7 GM76U256C Series PACKAGE INFORMATION 28pin 600mil Dual In-Line Package(Blank) * UNIT : INCH(mm) MAX. MIN. 1.467(37.262) 1.447(36.754) 0.600(15.240)BSC 0.090(2.286) 0.065(1.650) 0.070(1.778) 0.050(1.270) 0.550(13.970) 0.155(3.937) 0.530(13.462) 0.145(3.683) 0.035(0.889) 0.020(0.508) 0.140(3.556) 0.021(0.533) 0.100(2.54)BSC 3 deg 11 deg 0.120(3.048) 0.014(0.356) 0.008(0.200) 0.015(0.381) 28pin 330mil Small O utline Package(FW) 0.346(8.788) UNIT : INCH(mm) MAX .MIN. 0.338(8.585) 0.480(12.192) 0.460(11.684) 0.110(2.794) 0.728(18.491) 0.720(18.288) 0.094(2.388) 0.012(0.305) 0.014(0.356) 0.002(0.051) 0.050(1.270)BSC Rev 02 / Apr. 2001 0.020(0.508) 0.014(0.356) 0.008(0.203) 0.050(1.270) 0.030(0.762) 8 GM76U256C Series 28pin 8x13.4mm Thin Small Outline Package Standard(T) UNIT : INCH(mm) MAX. MIN. 0.468(11.9) 0.460(11.7) 0.536(13.6) 0.520(13.2) 0.319(8.1) 0.311(7.9) 0.027(0.7) 0.012(0.3) Rev 02 / Apr. 2001 0.008(0.2) 0.004(0.1) 0.040(1.02) 0.036(0.91) 0.008(0.20) 0.002(0.05) 0.022(0.55 BSC) 9 GM76U256C Series MARKING INFORMATION Package PDIP SOP TSOP-I Marking Example H Y U N D A I G M 7 6 U 2 5 y y w w H Y U N D A I G M 7 6 U 2 5 6 C c y y w w K O R E A H Y U N D A I G M 7 6 U 2 5 6 C c y y w w K O R E A 6 C c c - s s t K O R E A c F W s s c T s t s t Index * HYUNDAI * KOREA * GM76U256C * cc * yy * ww : Hynix Logo : Origin Country : Part Name : Power Consumption -L : Low Power - LL : Low Low Power : Package Type - Blank : DIP - FW : SOP -T : TSOP-I : Speed - 10 : 100ns - 12 : 150ns : Temperature - Blank : Commercial ( 0 ~ 70 C ) -E : Extended ( -25 ~ 85 C ) : Year ( ex : 00 = year 2000, 01 = year 2001 ) : Work Week ( ex : 12 = ww12 ) Note - Capital Letter - Small Letter : Fixed Item : Non-fixed Item * Blank / FW / T * ss *t Rev 02 / Apr. 2001 10