1. General description
The 74LVC574A is an octal D-type flip-flop featuring separate D-type inputs for each
flip-flop and 3-state outputs for bus-oriented applications. A clock (CP) and an Output
Enable (OE) input are common to all flip-flops.
The eight flip-flops will store the state of their individual D-inputs that meet the set-up and
hold times requirements on the LOW to HIGH CP transition.
When OE is LOW, the contents of the eight flip-flops are available at the outputs. When
OE is HIGH, the outputs go to the high-impedance OFF-state. Operatio n of the OE input
does not affect the state of the flip-flops.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V or 5 V applications.
The 74LVC574A is functionally identical to the 74LVC374A, but has a different pin
arrangement.
2. Features and benefits
5 V tolerant inputs for interfacing with 5 V logic
Supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
High-impedance when VCC = 0 V
8-bit positive edge-triggered register
Independent register and 3-state buffer operation
Flow-through pin-out architecture
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from 40 C to +85 C and 40 C to +125 C
74LVC574A
Oct al D-type flip-flop with 5 V tolerant input s/output s; positive
edge-trigger; 3-state
Rev. 5 — 18 December 2012 Product data sheet
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 2 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
3. Ordering information
4. Functional diagram
Tabl e 1. Ordering information
Type number Package
Temperature range Name Description Version
74LVC574AD 40 Cto+125C SO20 plastic small outline package; 20 l eads;
body width 7.5 mm SOT163-1
74LVC574ADB 40 Cto+125C SSOP20 plastic shrink small outline package; 20 leads;
body width 5.3 mm SOT339-1
74LVC574APW 40 Cto+125C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm SOT360-1
74LVC574ABQ 40 Cto+125C DHVQFN20 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 20 terminals;
body 2.5 4.5 0.85 mm
SOT764-1
Fig 1. Logic diagram Fig 2. IEC logic symbol
mna798
D0
D1
D2
D3
D4
D5
D6
D7 OE
CP Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
11
1
12
13
14
15
16
17
18
19
9
8
7
6
5
4
3
2
mna446
12
13
14
15
16
17
18
11 C1
1EN
1D 19
9
8
7
6
5
4
3
2
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 3 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Fig 3. Functional diag ram
mna800
3-STATE
OUTPUTS
FF1
to
FF8
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7 12
13
14
15
16
17
18
19
D0
D1
D2
D3
D4
D5
D6
D7
CP
OE
9
11
1
8
7
6
5
4
3
2
Fig 4. Logic diagra m
mna801
Q4
D4
Q3
D3
Q2
D2
Q1
D1
Q0
D0
D
FF1
Q
CP
CP
D
FF2
Q
CP
D
FF3
Q
CP
D
FF4
Q
CP
D
FF5
Q
CP
D
FF6
Q
CP
D
FF7
Q
CP
D
FF8
Q
CP
OE
Q5
D5
Q6
D6
Q7
D7
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 4 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration for SO20 and (T)SSOP20 Fig 6. Pin configuration for DHVQFN20
74ALVC574
OE V
CC
D0 Q0
D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7
GND CP
001aad095
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
001aad096
74ALVC574
Transparent top view
Q7
D6
D7
Q6
D5 Q5
D4 Q4
D3 Q3
D2 Q2
GND
(1)
D1 Q1
D0 Q0
GND
CP
OE
V
CC
912
8 13
7 14
6 15
5 16
4 17
3 18
2 19
10
11
1
20
terminal 1
index area
Table 2. Pin description
Symbol Pin Description
OE 1 output enable input (active LOW )
CP 11 clock input (LOW to HIGH; edge triggered)
D[0:7] 2, 3, 4, 5, 6, 7, 8, 9 data input
Q[0:7] 19, 18, 17, 16, 15, 14, 13, 12 data output
GND 10 ground (0 V)
VCC 20 supply voltage
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 5 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
6. Functional description
[1] H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the LOW to HIGH CP transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the LOW to HIGH CP tran sition
= LOW to HIGH clock transition
Z = high-impedance OFF-state
7. Limiting values
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For (T)SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
Table 3. Functional table[1]
Operating modes Input Internal
flip-flop Output
OE CP Dn Qn
Load and read register L lLL
LhHH
Load register and disable outputs H lLZ
HhHZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 50 - mA
VIinput voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 - 50 mA
VOoutput voltage output HIGH or LOW state [2] 0.5 VCC + 0.5 V
IOoutput current VO = 0 V to VCC -50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C[3] -500 mW
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 6 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 1.65 - 3.6 V
functional 1.2 - - V
VIinput voltage 0 - 5.5 V
VOoutput voltage output HIGH or LOW state 0 - VCC V
output 3-state 0 - 5.5 V
Tamb ambient temperature in free air 40 - +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
VIH HIGH-level
input voltage VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65 VCC - - 0.65 VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35 VCC -0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage
VI=V
IH or VIL
IO=100 A;
VCC =1.65Vto3.6V VCC 0.2 - - VCC 0.3 - V
IO=4mA; V
CC = 1.65 V 1.2 - - 1.05 - V
IO=8mA; V
CC = 2.3 V 1.8 - - 1.65 - V
IO=12 mA; VCC = 2.7 V 2.2 - - 2.05 - V
IO=18 mA; VCC = 3.0 V 2.4 - - 2.25 - V
IO=24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage
VI=V
IH or VIL
IO= 100 A;
VCC = 1.65 V to 3.6 V - - 0.2 - 0.3 V
IO=4mA; V
CC = 1.65 V - - 0.45 - 0.65 V
IO=8mA; V
CC = 2.3 V - - 0.6 - 0.8 V
IO=12mA; V
CC = 2.7 V - - 0.4 - 0.6 V
IO=24mA; V
CC = 3.0 V - - 0.55 - 0.8 V
II input leakage
current VCC = 3.6 V; VI=5.5VorGND - 0.1 5-20 A
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 7 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25C.
10. Dynamic characteristics
IOZ OFF-state
output
current
VI=V
IH or VIL; VCC = 3.6 V;
VO=5.5VorGND; -0.110 - 20 A
IOFF power-off
leakage
supply
VCC = 0 V; VIor VO= 5.5 V - 0.1 10 - 20 A
ICC supply
current VCC = 3.6 V; VI=V
CC or GND;
IO=0A -0.110 - 40A
ICC additional
supply
current
per input pin; VCC = 2.7 V to 3.6
V; VI=V
CC 0.6 V; IO=0A - 5 500 - 5000 A
CIinput
capacitance VCC = 0 V to 3.6 V;
VI=GNDtoV
CC
-5.0- - -pF
Table 6. Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
tpd propagation
delay CP to Qn; see Figure 7 [2]
VCC = 1.2 V - 17.0 - - - ns
VCC = 1.65 V to 1.95 V 4.6 6.4 13.1 4.6 15.1 ns
VCC = 2.3 V to 2.7 V 2.6 3.9 7. 9 2.6 9.1 ns
VCC = 2.7 V 1.5 3.7 8.0 1.5 10.0 ns
VCC = 3.0 V to 3.6 V 1.5 3.5 7.0 1.5 9.0 ns
ten enable time OE to Qn; see Figure 9 [2]
VCC = 1.2 V - 19.0 - - - ns
VCC = 1.65 V to 1.95 V 1.5 7.0 17.1 1.5 19.8 ns
VCC = 2.3 V to 2.7 V 1.5 4.0 9.4 1.5 10.9 ns
VCC = 2.7 V 1.5 4.1 8.5 1.5 11. 0 ns
VCC = 3.0 V to 3.6 V 1.5 3.2 7.5 1.5 9.5 ns
tdis disable time OE to Qn; see Figure 9 [2]
VCC = 1.2 V - 9.0 - - - ns
VCC = 1.65 V to 1.95 V 2 .5 4.1 10.1 2.5 11.6 ns
VCC = 2.3 V to 2.7 V 1.0 2.3 5.7 1.0 6.6 ns
VCC = 2.7 V 1.5 3.1 6.5 1.5 8.5 ns
VCC = 3.0 V to 3.6 V 1.5 2.9 6.0 1.5 7.5 ns
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 8 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
[1] Typical values are measured at Tamb =25C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PDin W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz; fo= output frequency in MHz
CL= output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(CLVCC2fo) = sum of the outputs
tWpulse width clock HIGH or LOW; see Figure 7
VCC = 1.65 V to 1.95 V 5 .0 - - 5.0 - ns
VCC = 2.3 V to 2.7 V 4.0 - - 4.0 - ns
VCC = 2.7 V 3.3 - - 3.3 - ns
VCC = 3.0 V to 3.6 V 3.3 1.7 - 3.3 - ns
tsu set-up time Dn to CP; see Figure 8
VCC = 1.65 V to 1.95 V 4 .0 - - 4.0 - ns
VCC = 2.3 V to 2.7 V 2.5 - - 2.5 - ns
VCC = 2.7 V 2.0 - - 2.0 - ns
VCC = 3.0 V to 3.6 V 2.0 0.3 - 2.0 - ns
thhold time Dn to CP; see Figure 8
VCC = 1.65 V to 1.95 V 3 .0 - - 3.0 - ns
VCC = 2.3 V to 2.7 V 2.0 - - 2.0 - ns
VCC = 2.7 V 1.5 - - 1.5 - ns
VCC = 3.0 V to 3.6 V +1.5 0.2 - +1.5 - ns
fmax maximum
frequency see Figure 7
VCC = 1.65 V to 1.95 V 100 - - 80 - MHz
VCC = 2.3 V to 2.7 V 125 - - 100 - MHz
VCC = 2.7 V 150 - - 120 - MHz
VCC = 3.0 V to 3.6 V 150 200 - 120 - MHz
tsk(0) output skew time VCC = 3.0 V to 3.6 V [3] - - 1.0 - 1.5 ns
CPD power dissipation
capacitance per flip-flop; VI = GND to VCC [4]
VCC = 1.65 V to 1.95 V - 11.2 - - - pF
VCC = 2.3 V to 2.7 V - 13.2 - - - pF
VCC = 3.0 V to 3.6 V - 14.9 - - - pF
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 10.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 9 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
11. AC waveforms
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. Clock (CP) to output (Qn) propagation delays, the clock pulse width, output transition times, and the
maximum frequency
mna802
CP input
Qn output
t
PHL
t
PLH
t
W
1/f
max
V
M
V
OH
V
I
GND
V
OL
V
M
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 8. Data s et-u p an d hold times for the Dn input to the CP input
mna803
GND
GND
th
tsu th
tsu
VM
VM
VM
VI
VOH
VOL
VI
Qn output
CP input
Dn input
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 10 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 9. 3-state ena ble and disabl e tim es
Table 8. Measurement points
Supply voltage Input Output
VCC VIVMVMVXVY
1.2 V VCC 0.5 VCC 0.5 VCC VOL + 0.15 V VOH 0.15 V
1.65 V to 1.95 V VCC 0.5 VCC 0.5 VCC VOL + 0.15 V VOH 0.15 V
2.3 V to 2.7 V VCC 0.5 VCC 0.5 VCC VOL + 0.15 V VOH 0.15 V
2.7 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V
3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 11 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 10. Test circuitry for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aae331
V
EXT
V
CC
V
I
V
O
DUT
CL
RT
RL
RL
G
Table 9. Test data
Supply voltage Input Load VEXT
VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH
1.2 V VCC 2 ns 30 p F 1 kopen 2 VCC GND
1.65 V to 1.95 V VCC 2 ns 30 pF 1 kopen 2 VCC GND
2.3 V to 2.7 V VCC 2 ns 30 pF 500 open 2 VCC GND
2.7V 2.7V 2.5 ns 50 pF 500 open 2 VCC GND
3.0Vto3.6V 2.7V 2.5 ns 50 pF 500 open 2 VCC GND
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 12 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
12. Package outline
Fig 11. Package outline SOT163-1 (SO20)
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65 0.3
0.1 2.45
2.25 0.49
0.36 0.32
0.23 13.0
12.6 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
wM
bp
detail X
Z
e
11
1
D
y
0.25
075E04 MS-013
pin 1 index
0.1 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.51
0.49 0.30
0.29 0.05
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
0 5 10 mm
scale
X
θ
A
A1
A2
HE
Lp
Q
E
c
L
vMA
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
99-12-27
03-02-19
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 13 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Fig 12. Package outline SOT339-1 (SSOP20)
UNIT A1A2A3bpcD
(1) E(1) eH
ELL
pQ(1)
Zywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05 1.80
1.65 0.38
0.25 0.20
0.09 7.4
7.0 5.4
5.2 0.65 7.9
7.6 0.9
0.7 0.9
0.5 8
0
o
o
0.131.25 0.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
1.03
0.63
SOT339-1 MO-150 99-12-27
03-02-19
X
wM
θ
A
A1
A2
bp
D
HE
Lp
Q
detail X
E
Z
e
c
L
vMA
(A )
3
A
110
20 11
y
0.25
pin 1 index
0 2.5 5 mm
scale
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
A
max.
2
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 14 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Fig 13. Package outline SOT360-1 (TSSOP20)
UNIT A1A2A3bpcD
(1) E(2) (1)
eH
ELL
pQZywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05 0.95
0.80 0.30
0.19 0.2
0.1 6.6
6.4 4.5
4.3 0.65 6.6
6.2 0.4
0.3 0.5
0.2 8
0
o
o
0.13 0.10.21
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT360-1 MO-153 99-12-27
03-02-19
wM
bp
D
Z
e
0.25
110
20 11
pin 1 index
θ
A
A1
A2
Lp
Q
detail X
L
(A )
3
HE
E
c
vMA
X
A
y
0 2.5 5 mm
scale
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
A
max.
1.1
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 15 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Fig 14. Package outline SOT764-1 (DHVQFN20)
terminal 1
index area
0.51
A1Eh
b
UNIT ye
0.2
c
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 4.6
4.4
Dh
3.15
2.85
y1
2.6
2.4 1.15
0.85
e1
3.5
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT764-1 MO-241 - - -- - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT764-1
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
A(1)
max.
AA1c
detail X
y
y1C
e
L
Eh
Dh
e
e1
b
29
19 12
11
10
1
20
X
D
E
C
BA
terminal 1
index area
AC
CB
vM
wM
E(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D(1)
02-10-17
03-01-27
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 16 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged Device Mo del
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC574A v.5 20121218 Product data sheet - 74LVC574A v.4
Modifications: Changed interlacing into interfacing (errata) in features list.
74LVC574A v.4 20121203 Product data sheet - 74LVC574A v.3
Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Table 4, Table 5, Table 6, Table 7, Table 8 and Table 9: values added for lower voltage ranges.
74LVC574A v.3 20040322 Product specification - 74LVC574A v.2
74LVC574A v.2 20030620 Product specification - 74LVC574A v.1
74LVC574A v.1 19980729 Product specification - -
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 17 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or comple teness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificat io nThe information and data provided in a Product
data sheet shall define the specification of the product as agr eed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an inf ormation
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with t heir
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessa ry
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property right s.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
74LVC574A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 5 — 18 December 2012 18 of 19
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lified nor tested
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74LVC574A
Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Functional di agram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6 Functional de scription . . . . . . . . . . . . . . . . . . . 5
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Recommended operating conditions. . . . . . . . 6
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
11 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
16 Contact information. . . . . . . . . . . . . . . . . . . . . 18
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
18 December 2012