PD-9.868 IRFL210 International Rectifier HEXFET Power MOSFET Surface Mount Available in Tape & Reel D @ Dynamic dv/dt Rating Repetitive Avalanche Rated Fast Switching Ease of Paralleling Simple Drive Requirements Voss = 200V Roscon) = 1.50 ; Ip = 0.96A Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOT-223 package is designed for surface-mounting using vapor phase, infra red, or wave soldering techniques. Its unique package design allows for easy automatic pick-and-place as with other SOT or SOIC packages but has the added advantage of improved thermal performance due to an enlarged tab for heatsinking. Power dissipation of greater than 1.25W is possible in a typical surface mount application. SOT-223 Absolute Maximum Ratings Parameter Max. Units lp @ Tc = 25C Continuous Drain Current, Vas @ 10 V 0.96 Ip @ Te= 100C | Continuous Drain Current, Vas @ 10 V 0.60 A lpm Pulsed Drain Current 77 Pp @ Tc =25C__| Power Dissipation 3.1 W Pp @ Ta=25C_| Power Dissipation (PCB Mount)** 2.0 Linear Derating Factor 0.025 Wee Linear Derating Factor (PCB Mount)** 0.017 Ves Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy @ 50 mJ lan Avalanche Current 0.96 A Ear Repetitive Avalanche Energy 0.31 mJ dv/dt Peak Diode Recovery dv/dt_ 5.0 Vins Ty, Tsta Junction and Storage Temperature Range -55 to +150 C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance | Parameter Min. Typ. | Max. Units Rasc | Junction-to-PCB 40 oC Resa | Junction-to-Ambient (PCB mount)** = 60 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 893IRFL210 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. ; Units Test Conditions Visrypss Drain-to-Source Breakdown Voltage 200 | | _ V | Ves=0V, Ip= 250pA AVerypss/ATy| Breakdown Voltage Temp. Coefficient | 0,30 | | veG | Reference to 25C, lo= mA _| Rosion) Static Drain-to-Source On-Resistance _ , 15 | Q | Veg=10V, Ip=0.58A Veasithy Gate Threshold Voltage 2.0 _ 4.0 | Vs | Vos=Ves, Ip= 250nA Ys Forward Transconductance 0.514 | = S_| Vps=50V, Ip=0.58A_ loss | Drain-to-Source Leakage Current |_1+ 25 uA Vos=200V, Vas-0V | | 250 | Vps=160V, Vas=0V, Ty=125C lass poate Sours Forward Leakage = = _| 100 | nA Ves=20V | Gate-to-Source Reverse Leakage _ | -100 | Vas=-20V Qg | Total Gate Charge | | 82 1p=3.3A Qgs | Gate-to-Source Charge - | 18 | nC | Vps=160V Qoa Gate-to-Drain ("Miller") Charge _ _ 4.5 Vas=10V See Fig. 6 and 13 tajon) Turn-On Delay Time _ 8.2 _ Vpp=100V tr Rise Time 17 = ns Ip=3.3A ta(off) Turn-Off Delay Time 14 _ Re=242 tt Fall Time _ 8.9 _ Rp=30Q See Figure 10 Lo Internal Drain tnductance _ 4.0 _ Bonn (zen z nH | from package fis: Ls Internal Source Inductance | 60), and center of ft die contact 8 Ciss Input Capacitance i 140 = Vas=0V Coss Output Capacitance _ 53 _ PF | Vps= 25V Crss Reverse Transfer Capacitance _ 15 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter | Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ | 0.96 MOSFET symbol D (Body Diode) , A showing the Ism Pulsed Source Current _ _ 7 integral reverse a (Body Diode) D | p-n junction diode. 8 Vsp Diode Forward Voltage ~ _ 2.0 Vo | Tys25C, Isx0.96A, Veas=0V @ tr Reverse Recovery Time ~ 150 | 310 ns | Ty=25C, Ir=3.3A Qn Reverse Recovery Charge {| 060; 1.4 | pO |di/dt=100A/is ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: Repetitive rating; pulse width limited by max. junction temperature (See Figure 11) @ Vpp=50V, starting Ty=25C, L=81mH Re=25Q, IA s=0.96A (See Figure 12) Isp<3.3A, di/dt<70A/us, Voo<VieR)Dss, Tys150C Pulse width < 300 ps; duty cycle <2%. 894Ip, Drain Current (Amps) Ip, Drain Current (Amps) a o to-! 4.5 20us PULSE WIDTH Te = 25C sort 400 Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Tc=25C Vpg = SOV 20us_ PULSE WIDTH 4 5 6 7 8 9 10 Vas, Gate-to-Source Voltage (volts) Fig 3. Typical Transfer Characteristics Rogon), Drain-to-Source On Resistance Ip, Drain Current (Amps) (Normalized) IRFL210 S. oO 3S o 20us WIDTH To = 150C Vos, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, Tco=150C V6S = 10V 0.0 -60 -40 -20 0 20 40 60 60 100 120 140 160 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. Temperature 895IRFL210 20 Gs = OV. f= ss = Cgg + Cgg, Cyg SHORTED gd Cgs + i an ao nD a Capacitance (pF) Vas, Gate-to-Source Voltage (volts) A SEE FIGURE 13 10t . 4 Vps, Drain-to-Source Voltage (volts) Qg, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 10? tot OPERATION IN THIS AREA LIMITED Go 5 BY Fos (on) Qa x @ 2 ~ Qa o E 10 5 = oO 5 8 c fo sw 100 3 2 Fs @ 4 o Oo ra A 5 a L a 2 2 Ir j=1500C 4 Ves = OV PULSE oa : 1.2 1.6 2.0 O.4 4 2 5 49 2 5 492 2 5 403 Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 896Ip, Drain Current (Amps) IRFL210 Vos A D.U.T. 41.0 q =" Vpp 0.8 \Piov Pulse Width < ips Duty Factor < 0.1% x 0.6 . . . | . Fig 10a. Switching Time Test Circuit 0.4 Vos 90% 0.2 00 10% | | 25 50 5 100 425 150 Vas Tc, Case Temperature (C) tdjon) tr tao Fig 9. Maximum Drain Current Vs. Case Temperature 102 Oo BS 10 N Ww Cc 9 Q B 1 iam ow E SINGLE PULSE o (THERMAL RESPONSE) poh c OM Fo.t rl 1. DUTY FACTOR, D=t1/t2 @. PEAK Ty=Ppm X Zthjco * Te 1075 1074 103 10 O.4 4 10 102 103 ty, Rectangular Pulse Duration (seconds) Fig it. Maximum Effective Transient Thermal Impedance, Junction-to-Case sale ple Fig 10b. Switching Time Waveforms 897IRFL210 | Vary tp to obtain Vos > required las 120 > 400 > a0 @ c 1 iw . . Pe 2 60 Fig 12a. Unclamped Inductive Test Circuit 3 . oO o TH 40 - ' 2 2 20 Lu DD = 50V Vps / 9 J 25 50 75 100 125 150 Starting Ty, Junction Temperature(C) lag we Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator tov S4@ | + Gas -++ Gap Ve Charge + Ke lp Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit See page 1505 Appendix B: Package Outline Mechanical Drawing - See page 1508 Appendix C: Part Marking information - See page 1516 International Appendix D: Tape & Reel Information See page 1522 Rectifier 898