FNA51560T1/T3 Motion SPM® 55 Series
June 2014
©2014 Fairchild Semiconductor Corporation 1www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
FNA51560T1/T3
Motion SPM® 55 Series
Features
• UL Certified No. E209204 (UL1557)
• 600 V - 15 A 3-Phase IGBT Inverter Including Co ntrol
IC for Gate Drive and Protections
• Low-Loss, Short-Circuit Rated IGBTs
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Active-HIGH interface, works with 3.3 / 5 V Logic,
Schmitt-trigger Input
• Inter-Lock Function
• HVIC for Gate Driving and Under-Voltage Protection
• HVIC Temperature-Sensing Built-In for Temperature
Monitoring
• Optimized for 5 kHz Switching Frequency
• Isolation Rating: 1500 Vrms / min.
Applications
• Motion Control - Home Appliance / Industrial Motor
Related Resources
General Description
FNA51560T1/T3 is a Motion SPM 55 module providing a
fully-featured, high-performance inverter output stage for
AC Induction, BLDC, and PMSM motors. These modules
integrate optimized gate drive of the built-in IGBTs to
minimize EMI and losses, while also provi ding multiple
on-module protectio n features including under-voltage
lockouts, inter-lock function, over-current shutdown,
thermal monitoring of drive IC , and fault reporting. The
built-in, high-speed HVIC requires only a single supply
voltage and translates the incoming logic-level gate
inputs to the high-voltage, high-current drive signals
required to properly drive the module's robust short-
circuit-rated IGBTs. Separate negative IGBT terminals
are available for each phase to support the widest
variety of control algorithms.
Package Mark ing and Ordering Information
Figure 1. Package Overview
Device Device Marking Package Packing Type Quantity
FNA51560T1 FNA51560T1 SPMFA-B20 RAIL 13
FNA51560T3 FNA51560T3 SPMFA-A20 RAIL 13
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 2www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Integrated Power Functions
• 600 V - 15 A IGBT inverter for three phase DC / AC power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: gate drive circuit, high- voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out (UVLO) protection
• For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out (UVLO) protection
• Fault signaling: corresponding to UVLO (low-side supply) and SC faults
• Input interface: High-active interface, works with 3.3 / 5 V logic, Schmitt trigger input
Pin Configuration
Figure 2. Top View
Cas e Temperat ure (Tc )
Detecting Point
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 3www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Pin Descriptions
Pin Number Pin Name Pin Description
1 P Positive DC-Link Input
2U, V
S(U) Output for U Phase
3V, V
S(V) Output for V Phase
4W, V
S(W) Output for W Phase
5N
UNegative DC-Link Input for U Phase
6N
VNegative DC-Link Input for V Phase
7N
WNegative DC-Link Input for W Phase
8IN
(UL) Signal Input for Low-Side U Phase
9IN
(UH) Signal Input for High- ide U Phase
10 IN(VL) Signal Input for Low-Side V Phase
11 IN(VH) Signal Input for High-Side V Phase
12 IN(WL) Signal Input for Low-Side W Phase
13 IN(WH) Signal Input for High-Side W Phase
14 VDD Common Bias Voltage for IC and IGBTs Driving
15 COM Common Supply Ground
16 CSC Capacitor (Low-Pass Filter) for Short-circuit Current Detection Input
17 VFFault Output, Shut-Down Input, Temperature Output of Drive IC
18 VB(W) High-Side Bias Voltage for W-Phase IGBT Driving
19 VB(V) High-Side Bias Voltage for V-Phase IGBT Driving
20 VB(U) High-Side Bias Voltage for U-Phase IGBT Driving
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 4www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Internal Equivalent Circuit and Input/Output Pins
Figure 3. Internal Block Diagram
Note:
1. Inverter high-side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT.
2. Inverter low-side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT. It has gate drive and protection functions.
3. Single drive IC has gate driver for six IGBTs and protection functions.
4. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
VB
HO
HIN
LO
VS
LIN
Csc
VF
COM
VDD
Csc
VF
IN(UL)
IN(UH)
VB(U)
IN(VH)
VB(V)
VB(W)
IN(WH)
IN(WL)
Nu
Nv
Nw
U
V
W
P
IN(VL)
HO
LO
VS
HO
LO
VS
COM
VDD
VB
HIN
LIN
VB
HIN
LIN
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 5www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Absolute Maximum Ratings (TJ = 25°C, unless otherwise specified.)
Inverter Part
Note:
5. The maximum junction temperature rating of the power chips integrated within the Motion SPM® 55 product is 150C.
Control Part
Total System
Thermal Resistance
Note:
6. For the measurement point of case temp erature (TC), please refer to Figure 2.
Symbol Parameter Conditions Rating Unit
VPN Supply Voltage Applied between P - NU, NV, NW450 V
VPN(Surge) Supply Voltage (Surge) Applied between P - NU, NV, NW500 V
VCES Collector - Emitter Voltage 600 V
± ICEach IGBT Collector Current TC = 25°C, TJ ＜150°C 15 A
± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ ＜ 150°C, Under 1 ms Pulse
Width 30 A
PCCollector Dissipation TC = 25°C per Chip 27 W
TJOperating Junction Temperature (Note 5) -40 ~ 150 °C
Symbol Parameter Conditions Rating Unit
VDD Control Supply Voltage Applied between VDD - COM 20 V
VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
20 V
VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH),
IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VDD +0.3 V
VFFault Supply Voltage Applied between VF - COM -0.3 ~ VDD +0.3 V
IFFault Current Sink Current at VF pin 5 mA
VSC Current Sensing Input Voltage Applied between CSC - COM -0.3 ~ VDD +0.3 V
Symbol Parameter Conditions Rating Unit
VPN(PROT) Self Protection Supply Voltage Limit
(Short Circuit Protection Capability) VDD = VBS = 13.5 ~ 16.5 V
TJ = 150°C, Non-Repetitive, < 2 s400 V
TSTG Storage Temperature -40 ~ 125 °C
VISO Isolation Voltage 60 Hz, Sinusoidal, AC 1 Minute, Connect
Pins to Heat Sink Plate 1500 Vrms
Symbol Parameter Conditions Min. Typ. Max. Unit
Rth(j-c)Q Junction to Case Thermal Resistance Inverter IGBT part (per 1 / 6 module) - - 4.55 °C / W
Rth(j-c)F Inverter FWD part (per 1 / 6 module) - - 5.4 °C / W
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 6www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Electrical Characteristics (TJ = 25°C, unless otherwise specified.)
Inverter Part
Note:
7. tON and tOFF include the prop ag ation delay of the intern al dr iv e IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For
the detailed information, please see Figure 4.
Figure 4. Switching Time Definition
Symbol Parameter Conditions Min. Typ. Max. Unit
VCE(SAT) Collector - Emitter Saturation
Voltage VDD = VBS = 15 V
VIN = 5 V
IC = 15 A
TJ = 25°C - 1.45 1.85 V
TJ = 150°C 1.65 V
VFFWDi Forward Voltage VIN = 0 V
IF = 15 A TJ = 25°C - 1.7 2.1 V
TJ = 150°C 1.7 V
HS tON Switching Times VPN = 400 V, VDD = VBS = 15 V, IC = 15 A
TJ = 25°C
VIN = 0 V 5 V, Inductive load
(Note 7)
- 700 - ns
tC(ON) - 140 - ns
tOFF - 850 - ns
tC(OFF) - 140 - ns
trr -85-ns
LS tON VPN = 400 V, VDD = VBS = 15 V, IC = 15A
TJ = 25°C
VIN = 0 V 5 V, Inductive load
(Note 7)
- 800 - ns
tC(ON) - 250 - ns
tOFF - 850 - ns
tC(OFF) - 150 - ns
trr -90-ns
ICES Collector - Emitter Leakage
Current VCE = VCES --1mA
VCE IC
VIN
tON tC(ON)
VIN(ON)
10% IC
10% VCE
90% IC
100% IC
trr
100% IC
VCE
IC
VIN
tOFF tC(OFF)
VIN(OFF) 10% V CE 10% IC
(a ) tu rn -o n (b ) turn-o ff
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 7www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Control Part
Note:
8. Short-c ircuit prot ection is fu nctioning for all six IGB Ts.
Figure. 5. V-T Curve of Temperature Output of IC (5V pull-up with 4.7kohm)
Symbol Parameter Conditions Min. Typ. Max. Unit
IQDD Quiescent VDD Supply
Current VDD = 15 V,
IN(UH,VH,WH,UL,VL,WL) = 0 V VDD - COM - 2.0 2.6 mA
IPDD Operating VDD Supply
Current VDD = 15 V, fPWM = 20 kHz, duty =
50%, applied to one PWM signal
input
VDD - COM - 2.5 3.5 mA
IQBS Quiescent VBS Supply
Current VBS = 15 V, IN(UH, VH, WH) = 0 V VB(U) - VS(U), VB(V) -
VS(V), VB(W) - VS(W)
- 70 100 A
IPBS Operating VBS Supply
Current VDD = VBS = 15 V, fPWM = 20 kHz,
duty = 50%, applied to one PWM
signal input for high - side
VB(U) - VS(U), VB(V) -
VS(V), VB(W) - VS(W)
- 600 800 A
VFH Fault Output Voltage VSC = 0 V, VF Circuit: 4.7 k to 5 V Pull-up 4.5 - - V
VFL VSC = 1 V, VF Circuit: 4.7 k to 5 V Pull-up - - 0.5 V
VSC(ref) Short-Circuit Trip Level VDD = 15 V (Note 4) 0.45 0.5 0.55 V
UVDDD Supply Circuit
Under-Voltage
Protection
Detection level 10.0 11.5 13.0 V
UVDDR Reset level 10.5 12.0 13.5 V
UVBSD Detection level 9.5 11.0 12.5 V
UVBSR Reset level 10.0 11.5 13.0 V
VFT HVIC Temperature
Sensing Voltage VDD = VBS = 15 V, THVIC = 25°C, 4.7 k to 5 V Pull-up
(Figure. 5) 4.43 4.58 4.71 V
tFOD Fault-Out Pulse Width 40 100 - s
VIN(ON) ON Threshold Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL),
IN(WL) - COM --2.4V
VIN(OFF) OFF Threshold Voltage 0.8 - - V
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 8www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Recommended Operating Conditions
Note:
9. This product might not make response if input pulse width is less than the recommanded value.
Note:
10. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s
printed cir cuit board. The input signal secti on of the SP M 55 product integrate s 5 k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay
attention to the signal voltage drop at input terminal.
Figure 6. Recommended MCU I/O Interface Circuit
Symbol Parameter Conditions Min. Typ. Max. Unit
VPN Supply Voltage Applied between P - NU, NV, NW- 300 400 V
VDD Control Supply Voltage Applied between VDD - COM 13.5 15 16.5 V
VBS High - Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) -
VS(W)
13.0 15 18.5 V
dVDD / d t,
dVBS / dt Control Supply Variation -1 - 1 V / s
tdead Blanking Time for
Preventing Arm - Short For each input signal 1.0 - - s
fPWM PWM Input Signal - 40C ＜TJ ＜150°C - - 20 kHz
VSEN Voltage for Current
Sensing Applied between NU, NV, NW - COM
(Including surge voltage) -4 4 V
PWIN(ON) Minimun Input Pulse
Width (Note 9) 1.0 - - s
PWIN(OFF) 1.0 - -
MCU
COM
5 V Line (M C U or Control pow er)
,,
IN(UL) IN(VL) IN(WL)
,,
IN(UH) IN(VH) IN(WH)
VF
RPF = 4.7kΩSPM
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 9www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Mechanical Characteristics and Ratings
Figure 7. Flatness Measurement Position
Figure 8. Mounting Screws Torque Order
Note:
11 . Do not make over torque when mounting screws. Much mounting torque may cause package cracks, as well as bolts and Al heat-sink destruction.
12. Avoi d one s ide tig htening stress. Fig ure 10 sh ows th e recomm ende d torqu e order for mou nting scr ews. Un even mou nting can cause t he ceramic substrate of the Mo tion SPM
55 product to be damaged. The Pre-screwing torque is set to 20 ~ 30 % of maximum torque rating.
Parameter Conditions Min. Typ. Max. Unit
Device Flatness See Figure 7 -50 - 100 m
Mounting Torque Mounting Screw: - M3
Note Figure 8
Recommended 0.7 N • m 0.6 0.7 0.8 N • m
Recommended 7.1 kg • cm 5.9 6.9 7.9 kg • cm
Weight -6.0- g
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Time Charts of Protective Function
a1 : Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UVDDD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts.
a6 : Under voltage reset (UVDDR).
a7 : Normal operation: IGBT ON and carrying current.
Figure 9. Under-Voltage Protection (Low-Side)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UVBSR)
b6 : Normal operation: IGBT ON and carrying current
Figure 10. Under-Voltage Protection (High-Side)
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UVDDR
Protection
Circuit State SET RESET
UVDDD
a1 a3
a2 a4
a6
a5
a7
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UVBSR
Protection
Circuit State SET RESET
UVBSD
b1 b3
b2 b4 b6
b5
High-level (no fault output)
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 11 www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
(with the external shunt resistance and CR connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : Hard IGBT gate interrupt.
c4 : IGBT turns OFF.
c5 : Input “L” : IGBT OFF state.
c6 : Input “H”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7 : IGBT OFF state
Figure 11. Short-Circuit Protection
Hin : High-side Input Signal
Lin : Low-side Input Signal
Ho : Internal IGBT Gate - Emitter Vo ltage of High-side
Lo : Internal IGBT Gate - Emitter Volta ge of Low-side
Figure 12. Inter-Lock Function
Lower arms
control input
Output Current
Sensing Voltage
of the shun t
resistance
Fault Output Signal
SC Reference Voltage
CR circuit time
constant delay
SC
Protection
Circuit state SET RESET
c6 c7
c3
c2
c1
c8
c4
c5
Internal IGBT
Gate-Emitt e r Voltage
Hin
Lin
Ho
Lo
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 12 www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Note:
1) To avoid malfunction, the wiring of each input should be as short as possible. (less than 2 ~ 3 cm)
2) By virt ue of integr atin g an ap plica tion specific type of HVIC inside the SPM® 55 product, direct coupling to MCU terminals without any opto-coupler or transformer isolation is
possible.
3) VF is open-drain type. This sig nal li ne sho uld be pulle d up to th e posi tive side of the M CU or co ntro l power suppl y with a r esistor that makes IFO up to 5 mA . Please r efer to Fig-
ure 14.
4) CSP15 of around seven times larger than bootstrap capacitor CBS is recommended.
5) Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull down each input signal line to GND. RC coupling circuits is recommanded for the prevention of
input signal oscillation. RSCPS time constant should be selected in the range 50 ~ 150 ns. (Reco mm e nde d RS = 100 Ω, CPS = 1 nF)
6) To prevent errors of the protection function, the wiring around RF and CSC should be as short as possible.
7) In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5 ~ 2 s.
8) The connection between con trol GND line and power GND line which includes the NU, NV, NW must be connected to only one point. Please do not connect the control GND
to the power GND by the broad pat tern. Also, the wiring distance between control GND and power GND should be as short as possible.
9) Each capacitor should be mounted as close to the pins of the Motion SPM 55 product as possible.
10) To prevent surge destr uct ion, the wiring betw ee n th e smo oth i ng capacitor and the P an d GND pi n s should be as sho rt as po ssible. The use of a high frequency non-inductive
capacitor of around 0.1 ~ 0.22 F between the P and GND pins is recommended.
11 ) Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays.
12) The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals.
(Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 Ω)
13) Please choose the electrolytic capacitor with good temperature characteristic in CBS. Also, choose 0.1 ~ 0.2 F R-category ceramic capacitors with good temperature and
frequency characteristics in CBSC.
14) For the detailed information, please refer to the application notes.
Figure 13. Typical Application Circuit
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 13 www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Detailed Package Outline Drawings (FNA51560T1, Short Lead)
FNA51560T1/T3 Motion SPM® 55 Series
©2014 Fairchild Semiconductor Corporation 14 www.fairchildsemi.com
FNA51560T1/T3 Rev. C0
Detailed Package Outline Drawings (FNA51560T3, Long Lead)
©2014 Fairchild Semiconductor Corporation www.fairchildsemi.com
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