Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as "Cypress" document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 EZ-BLETM Creator XR Module CYBLE-212006-01, CYBLE-202007-01, CYBLE-202013-11 EZ-BLETM Creator XR Module General Description The CYBLE-2X20XX-X1 is a Bluetooth Low Energy wireless module solution. The CYBLE-2X20XX-X1 is a turnkey solution and includes onboard crystal oscillators, passive components, and the Cypress PSoC 4 Bluetooth LE. Refer to the PSoC 4 Bluetooth LE datasheet for additional details on the capabilities of the PSoC 4 Bluetooth LE device used on this module. The CYBLE-2X20XX-X1 supports a number of peripheral functions (ADC, timers, counters, PWM) and serial communication protocols (I2C, UART, SPI) through its programmable architecture. The CYBLE-2X20XX-X1 includes a royalty-free Bluetooth LE stack compatible with Bluetooth 4.2 and provides up to 19 GPIOs in a 15.0 x 23.0 x 2.0 mm package. TX current consumption Bluetooth LE silicon: 15.6 mA (radio only, 0 dbm) RFX2401C: 27 mA (PA/LNA only, +7.5 dBm) RX current consumption Bluetooth LE silicon: 16.4 mA (radio only, 0 dbm) RFX2401C: 8.0 mA (PA/LNA only) Cypress CYBL1XX7X silicon low power mode support Deep Sleep: 1.3 A with watch crystal oscillator (WCO) on Hibernate: 150 nA with SRAM retention Stop: 60 nA with XRES wakeup Functional Capabilities The CYBLE-2X20XX-X1 is offered in two certified versions (CYBLE-212006-01 and CYBLE-202007-01), as well as an uncertified version (CYBLE-202013-11). The CYBLE-212006-01 includes an integrated trace antenna. The CYBLE-202007-01 supports an external antenna via a u-FL connector. The CYBLE-202013-11 supports an external antenna through a RF solder pad output. The CYBLE-202013-11 does not include a RF shield and is not regulatory certified. Up to 18 capacitive sensors for buttons or sliders 12-bit, 1-Msps SAR ADC with internal reference, sample-and-hold (S/H), and channel sequencer Four dedicated 16-bit timer, counter, or PWM blocks (TCPWMs) Module Description LCD drive supported on all GPIOs (common or segment) Two serial communication blocks (SCBs) supporting I2C (master/slave), SPI (master/slave), or UART Module size: 15.00 mm x 23.00 mm x 2.00 mm Programmable low voltage detect (LVD) from 1.8 V to 3.6 V Extended Range: Up to 400 meters bi-directional communication[1,2] Up to 450 meters in beacon only mode[1] I2S master interface Bluetooth 4.2 qualified single-mode module QDID: 88957 Declaration ID: D032786 Footprint compatible options for integrated antenna or antenna-less design options Certified to FCC, ISED, MIC, KC, and CE regulations (CYBLE-212006-01 and CYBLE-202007-01 only) Castelated solder pad connections for ease-of-use 256-KB flash memory, 32-KB SRAM memory Up to 19 GPIOs Industrial temperature range: -40 C to +85 C 32-bit processor (0.9 DMIPS/MHz) operating up to 48 MHz Watchdog timer with dedicated internal low-speed oscillator Power Consumption Bluetooth LE protocol stack supporting generic access profile (GAP) Central, Peripheral, Observer, or Broadcaster roles Switches between Central and Peripheral roles on-the-go Standard Bluetooth LE profiles and services for interoperability Custom profile and service for specific use cases Benefits CYBLE-2X20XX-X1 is provided as a turnkey solution, including all necessary hardware required to use Bluetooth LE communication standards. Proven hardware design ready to use Cost optimized for applications without space constraint Reprogrammable architecture Fully certified module eliminates the time needed for design, development and certification Bluetooth SIG qualified with QDID and Declaration ID Maximum TX output power: +7.5 dbm Flexible communication protocol support RX Receive Sensitivity: -93 dbm Received signal strength indicator (RSSI) with 1-dB resolution PSoC CreatorTM provides an easy-to-use integrated design environment (IDE) to configure, develop, program, and test a Bluetooth LE application Notes 1. Connection range tested module-to-module in full line-of-sight environment, free of obstacles or interference sources with output power of +7.5 dBm. 2. Specified as EZ-BLE XR module to module range. Mobile phone connection range will decrease based on the PA/LNA performance of the mobile phone used. Cypress Semiconductor Corporation Document Number: 002-15631 Rev. *H * 198 Champion Court * San Jose, CA 95134-1709 * 408-943-2600 Revised December 23, 2020 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right module for your design, and to help you to quickly and effectively integrate the module into your design. Overview: EZ-BLE Module Portfolio, Module Roadmap PSoC 4 Bluetooth LE Silicon Datasheet Application notes: Cypress offers a number of Bluetooth LE application notes covering a broad range of topics, from basic to advanced level. Recommended application notes for getting started with EZ-BLE modules are: AN96841 - Getting Started with EZ-BLE Module AN91267 - Getting Started with PSoC(R) 4 Bluetooth LE (R) AN97060 - PSoC 4 Bluetooth LE and PRoCTM Bluetooth LE - Over-The-Air (OTA) Device Firmware Upgrade (DFU) Guide AN91162 - Creating a Bluetooth LE Custom Profile AN91184 - PSoC 4 Bluetooth LE - Designing Bluetooth LE Applications AN92584 - Designing for Low Power and Estimating Battery Life for Bluetooth LE Applications (R) (R) AN85951 - PSoC 4 CapSense Design Guide (R) AN95089 - PSoC 4/PRoCTM Bluetooth LE Crystal Oscillator Selection and Tuning Techniques AN91445 - Antenna Design and RF Layout Guidelines Technical Reference Manual (TRM): (R) PRoC Bluetooth LE Technical Reference Manual PRoC Programming Specifications Knowledge Base Articles KBA212334 - Pin Mapping Differences Between the EZ-BLE Creator Evaluation Boards (CYBLE-212006-EVAL/CYBLE-202007-EVAL/CYBLE-202013-EVAL) and the Bluetooth LE Pioneer Kit (CY8CKIT-042-Bluetooth LE) KBA97095 - EZ-BLETM Module Placement KBA216380 - RF Regulatory Certifications for CYBLE-212006-01 and CYBLE-202007-01 EZ-BLETM Creator XR Modules KBA213976 - FAQ for Bluetooth LE and Regulatory Certifications with EZ-BLE modules KBA210802 - Queries on Bluetooth LE Qualification and Declaration Processes KBA2108122 - 3D Model Files for EZ-BLE/EZ-BT Modules Development Kits: CYBLE-212006-EVAL, CYBLE-212006-01 Eval Board CYBLE-202007-EVAL, CYBLE-202007-01 Eval Board CYBLE-202013-EVAL, CYBLE-202013-11 Eval Board CY8CKIT-042-Bluetooth LE, Bluetooth Low Energy Pioneer Kit (R) CY8CKIT-002, PSoC MiniProg3 Program and Debug Kit Test and Debug Tools: (R) CYSmart, Bluetooth LE Test and Debug Tool (Windows) CYSmart Mobile, Bluetooth LE Test and Debug Tool (Android/iOS Mobile App) Two Easy-To-Use Design Environments to Get You Started Quickly PSoC(R) CreatorTM Integrated Design Environment (IDE) PSoC Creator is an Integrated Design Environment (IDE) that enables concurrent hardware and firmware editing, compiling and debugging of PSoC 3, PSoC 4, PSoC 5LP, PSoC 4 Bluetooth LE, and EZ-BLE module systems with no code size limitations. PSoC peripherals are designed using schematic capture and simple graphical user interface (GUI) with over 120 pre-verified, production-ready PSoC ComponentsTM. PSoC Components are analog and digital "virtual chips," represented by an icon that users can drag-and-drop into a design and configure to suit a broad array of application requirements. Bluetooth Low Energy Component The Bluetooth Low Energy Component inside PSoC Creator provides a comprehensive GUI-based configuration window that lets you quickly design Bluetooth LE applications. The Component incorporates a Bluetooth Core Specification v4.2 compliant Bluetooth LE protocol stack and provides API functions to enable user applications to interface with the underlying Bluetooth Low Energy Sub-System (BLESS) hardware via the stack. EZ-SerialTM Bluetooth LE Firmware Platform The EZ-Serial Firmware Platform provides a simple way to access the most common hardware and communication features needed in Bluetooth LE applications. EZ-Serial implements an intuitive API protocol over the UART interface and exposes various status and control signals through the module's GPIOs, making it easy to add Bluetooth LE functionality quickly to existing designs. Use a simple serial terminal and evaluation kit to begin development without requiring an IDE. Refer to the EZ-Serial webpage for User Manuals and instructions for getting started as well as detailed reference materials. EZ-BLE modules are pre-flashed with the EZ-Serial Firmware Platform. If you do not have EZ-Serial pre-loaded on your module, you can download each EZ-BLE module's firmware images on the EZ-Serial webpage. Technical Support Frequently Asked Questions (FAQs): Learn more about our Bluetooth LE ECO System. Forum: See if your question is already answered by fellow developers on the PSoC 4 Bluetooth LE. Visit our support page and create a technical support case or contact a local sales representatives. If you are in the United States, you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 2 at the prompt. Document Number: 002-15631 Rev. *H Page 2 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Contents Overview ............................................................................ 4 Module Description ...................................................... 4 Pad Connection Interface ................................................ 6 Recommended Host PCB Layout ................................... 7 Digital and Analog Capabilities and Connections ......... 9 Power Supply Connections and Recommended External Components .......................... 10 Connection Options ................................................... 10 External Component Recommendation .................... 10 Antenna Matching Network Requirements for CYBLE-202013-11 .................................................... 12 Critical Components List ........................................... 14 Antenna Design ......................................................... 14 Qualified Antenna for CYBLE-202007-01 and CYBLE-202013-11 .................................................... 14 Power Amplifier (PA) and Low Noise Amplifier (LNA) ........................................ 14 Enabling Extended Range Feature ........................... 15 Low Power Operation ................................................ 15 Electrical Specification .................................................. 16 GPIO ......................................................................... 18 XRES ......................................................................... 19 Digital Peripherals ..................................................... 21 Serial Communication ............................................... 23 Memory ..................................................................... 24 System Resources .................................................... 25 Document Number: 002-15631 Rev. *H Environmental Specifications ....................................... 30 Environmental Compliance ....................................... 30 RF Certification .......................................................... 30 Safety Certification .................................................... 30 Environmental Conditions ......................................... 30 ESD and EMI Protection ........................................... 30 Regulatory Information .................................................. 31 FCC ........................................................................... 31 ISED .......................................................................... 32 European Declaration of Conformity ......................... 33 MIC Japan ................................................................. 33 KC Korea ................................................................... 33 Packaging ........................................................................ 34 Ordering Information ...................................................... 36 Part Numbering Convention ...................................... 36 Acronyms ........................................................................ 37 Document Conventions ................................................. 37 Units of Measure ....................................................... 37 Document History Page ................................................. 38 Sales, Solutions, and Legal Information ...................... 40 Worldwide Sales and Design Support ....................... 40 Products .................................................................... 40 PSoC(R) Solutions ....................................................... 40 Cypress Developer Community ................................. 40 Technical Support ..................................................... 40 Page 3 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Overview Module Description The CYBLE-2X20XX-X1 module is a complete module designed to be soldered to the applications main board. Module Dimensions and Drawing Cypress reserves the right to select components (including the appropriate Bluetooth LE device) from various vendors to achieve the Bluetooth LE module functionality. Such selections will still guarantee that all height restrictions of the component area are maintained. Designs should be held within the physical dimensions shown in the mechanical drawings in Figure 1. All dimensions are in millimeters (mm). Table 1. Module Design Dimensions Dimension Item Module dimensions Antenna location dimensions Specification Length (X) 15.00 0.15 mm Width (Y) 23.00 0.15 mm Length (X) 15.00 0.15 mm Width (Y) 4.65 0.15 mm PCB thickness Height (H) 0.80 0.10 mm Shield height Height (H) 1.20 0.10 mm Maximum component height Height (H) 1.20 mm typical (shield) - CYBLE-212006-01 1.25 mm typical (connector) - CYBLE-202007-01 0.75mm typical (crystal) - CYBLE-202013-11 Total module thickness (bottom of module to highest component) Height (H) 2.00 mm typical - CYBLE-212006-01 2.05 mm typical - CYBLE-202007-01 1.55 mm typical - CYBLE-202013-11 See Figure 1 on page 5 for the mechanical reference drawing for CYBLE-2X20XX-X1. Document Number: 002-15631 Rev. *H Page 4 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Figure 1. Module Mechanical Drawing Top View (View from Top) Side View Bottom View (Seen from Bottom) Note 3. No metal or traces should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on recommended host PCB layout, see Figure 3, Figure 4, Figure 5 and Figure 6, and Table 3. Document Number: 002-15631 Rev. *H Page 5 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Pad Connection Interface As shown in the bottom view of Figure 1 on page 5, the CYBLE-2X20XX-X1 connects to the host board via solder pads on the backside of the module. Table 2 and Figure 2 detail the solder pad length, width, and pitch dimensions of the CYBLE-2X20XX-X1 module. Table 2. Solder Pad Connection Description Name SP Connections Connection Type 30 Solder Pads Pad Length Dimension Pad Width Dimension Pad Pitch 1.02 mm 0.71 mm 1.27 mm Figure 2. Solder Pad Dimensions (Seen from Bottom) To maximize RF performance, the host layout should follow these recommendations: 1. The ideal placement of the Cypress Bluetooth LE module is in a corner of the host board with the trace antenna located at the far corner. This placement minimizes the additional recommended keep out area stated in item 2. Please refer to AN96841 for module placement best practices. 2. To maximize RF performance, the area immediately around the Cypress Bluetooth LE module trace antenna should contain an additional keep out area, where no grounding or signal trace are contained. The keep out area applies to all layers of the host board. The recommended dimensions of the host PCB keep out area are shown in Figure 3 (dimensions are in mm). Figure 3. Recommended Host PCB Keep Out Area Around the CYBLE-2X20XX-X1 Antenna Host PCB Keep Out Area Around Trace Antenna Document Number: 002-15631 Rev. *H Page 6 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Recommended Host PCB Layout Figure 4, Figure 5, Figure 6, and Table 3 provide details that can be used for the recommended host PCB layout pattern for the CYBLE-212006-01. Dimensions are in millimeters unless otherwise noted. Pad length of 1.27 mm (0.635 mm from center of the pad on either side) shown in Figure 6 is the minimum recommended host pad length. The host PCB layout pattern can be completed using either Figure 4, Figure 5, or Figure 6. It is not necessary to use all figures to complete the host PCB layout pattern. Figure 4. Host Layout Pattern for CYBLE-2X20XX-X1 Top View (Seen on Host PCB) Document Number: 002-15631 Rev. *H Figure 5. Module Pad Location from Origin Top View (Seen on Host PCB) Page 7 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Table 3 provides the center location for each solder pad on the CYBLE-2X20XX-X1. All dimensions reference the to the center of the solder pad. Refer to Figure 6 for the location of each module solder pad. Table 3. Module Solder Pad Location Figure 6. Solder Pad Reference Location Solder Pad (Center of Pad) Location (X,Y) from Orign (mm) Dimension from Orign (mils) 1 (0.38, 10.54) (14.96, 414.96) 2 (0.38, 11.81) (14.96, 464.96) 3 (0.38, 13.08) (14.96, 514.96) 4 (0.38, 14.35) (14.96, 564.96) 5 (0.38, 15.62) (14.96, 614.96) 6 (0.38, 16.89) (14.96, 664.96) 7 (0.38, 18.16) (14.96, 714.96) 8 (0.38, 19.43) (14.96, 764.96) 9 (0.38, 20.70) (14.96, 814.96) 10 (0.38, 21.97) (14.96, 864.96) 11 (2.32, 22.62) (91.34, 890.55) 12 (3.59, 22.62) (141.34, 890.55) 13 (4.86, 22.62) (191.34, 890.55) 14 (6.13, 22.62) (241.34, 890.55) 15 (7.40, 22.62) (291.34, 890.55) 16 (8.67, 22.62) (341.34, 890.55) 17 (9.94, 22.62) (391.34,8 90.55) 18 (11.21, 22.62) (441.34, 890.55) 19 (12.48, 22.62) (491.34, 890.55) 20 (13.75, 22.62) (541.34, 890.55 21 (14.62, 20.70) (575.59, 814.96) 22 (14.62, 19.43) (575.59, 764.96) 23 (14.62, 18.16) (575.59, 714.96) 24 (14.62, 16.89) (575.59, 664.96) 25 (14.62, 15.62) (575.59, 614.96) 26 (14.62, 14.35) (575.59, 564.96) 27 (14.62, 13.08) (575.59, 514.96) 28 (14.62, 11.81) (575.59, 464.96) 29 See Figure 2 See Figure 2 30 See Figure 2 See Figure 2 Document Number: 002-15631 Rev. *H Top View (Seen on Host PCB) Page 8 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Digital and Analog Capabilities and Connections Table 4 details the solder pad connection definitions and available functions for each connection pad. Table 4 lists the solder pads on CYBLE-2X20XX-X1, the Bluetooth LE device port-pin, and denotes whether the function shown is available for each solder pad. Each connection is configurable for a single option shown with a . Table 4. Solder Pad Connection Definitions Solder Pad Device Number Port Pin 1 SPI I2 C GND 2 XRES 3 P4.0[6] 4 P3.7 5 P3.6 6 P3.5 7 P3.4 8 VREF 9 P2.6 10 P2.4 11 P2.3 12 P2.2 13 P2.0 14 P1.7 15 P1.6 16 P1.5 17 P1.4 18 P0.7 19 P1.0 20 P0.4 21 P0.5 22 VDD 23 P0.6 24 UART GND CapSense TCPWM[4,5] WCO ECO LCD Out Out SWD GPIO Ground Connection External Reset Hardware Connection Input (SCB1_RTS) (SCB1_MOSI) (TCPWM0_P) (SCB1_CTS) (TCPWM) (SCB1_RTS) (TCPWM) (SCB1_TX) (SCB1_SCL) (TCPWM) (SCB1_RX) (SCB1_SDA) (TCPWM) (CMOD) (Sensor) (Sensor) (Sensor) (Sensor) Reference Voltage Input (Optional) (SCB0_CTS) (SCB0_RTS) (SCB0_TX) (SCB0_RX) (SCB0_CTS) (SCB0_SS3) (SCB0_SS1) (SCB0_SCLK (SCB0_SS0) (SCB0_MISO) (SCB0_SCL) (SCB0_MOSI) (SCB0_SDA) (SCB0_SCLK (SCB0_RX) (SCB0_MOSI) (SCB0_SDA) (SCB0_TX) (SCB0_MISO) (SCB0_SCL) (SCB0_RTS) (SCB0_SS0) [7] (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (TCPWM) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) (Sensor) Digital Power Supply Input (1.71 to 3.6V) (TCPWM) (Sensor) Ground Connection 25 GND Ground Connection 26 GND Ground Connection (SWDCLK) (SWDIO) 27 GND Ground Connection 28 VDDR Radio Power Supply (2.0V to 3.6V) 29 GND RF Ground Connection for use with CYBLE-202013-11 only; No Connect for CYBLE-212006-01 and CYBLE-202007-01 30 ANT RF Pin to External Antenna for use with CYBLE-202013-11 only; No Connect for CYBLE-212006-01 and CYBLE-202007-01 Notes 4. TCPWM: Timer, Counter, and Pulse Width Modulator. If supported, the pad can be configured to any of these peripheral functions. 5. TCPWM connections on ports 0, 1, 2, and 3 can be routed through the Digital Signal Interconnect (DSI) to any of the TCPWM blocks and can be either positive or negative polarity. TCPWM connections on port 4 are direct and can only be used with the specified TCPWM block and polarity specified above. 6. When using the capacitive sensing functionality, Pad 3 (P4.0) must be connected to a CMOD capacitor (located off of Cypress Bluetooth LE Module). The value of this capacitor is 2.2 nF and should be placed as close to the module as possible. 7. The main board needs to connect all GND connections (Pad 24/25/26/27) on the module to the common ground of the system. 8. If the I2S feature is used in the design, the I2S pins shall be dynamically routed to the appropriate available GPIO by PSoC Creator. Document Number: 002-15631 Rev. *H Page 9 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Power Supply Connections and Recommended External Components Power Connections External Component Recommendation The CYBLE-2X20XX-X1 contains two power supply connections, VDD and VDDR. The VDD connection supplies power for both digital and analog device operation. The VDDR connection supplies power for the device radio. In either connection scenario, it is recommended to place an external ferrite bead between the supply and the module connection. The ferrite bead should be positioned as close as possible to the module pin connection. VDD accepts a supply range of 1.71 V to 3.6 V. VDDR accepts a supply range of 2.0V to 3.6V. These specifications can be found in Table 12. The maximum power supply ripple for both power connections on the module is 100 mV, as shown in Table 10. Figure 7 details the recommended host schematic options for a single supply scenario. The use of one or two ferrite beads will depend on the specific application and configuration of the CYBLE-2X20XX-X1. The power supply ramp rate of VDD must be equal to or greater than that of VDDR. Connection Options Figure 8 details the recommended host schematic for an independent supply scenario. The recommended ferrite bead value is 330 , 100 MHz. (Murata BLM21PG331SN1D). Two connection options are available for any application: 1. Single supply: Connect VDD and VDDR to the same supply. 2. Independent supply: Power VDD and VDDR separately. Figure 7. Recommended Host Schematic Options for a Single Supply Option Single Ferrite Bead Option (Seen from Bottom) Document Number: 002-15631 Rev. *H Two Ferrite Bead Option (Seen from Bottom) Page 10 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Figure 8. Recommended Host Schematic for an Independent Supply Option Independent Power Supply Option (Seen from Bottom) Document Number: 002-15631 Rev. *H Page 11 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Antenna Matching Network Requirements for CYBLE-202013-11 The CYBLE-202013-11 module requires ANT and GND connections to an external antenna via the RF pad connections on the module (Pads 29 and 30). In order to optimize RF performance, an Antenna Matching Network (AMN) is required to be placed between the ANT connection (Pad 29) and the antenna used in the final design. Figure 9 details the recommended Pi topology circuit footprint to use for the Antenna Matching Network. Figure 9. Recommended Antenna Matching Network for CYBLE-202013-11 Module Module Pad Assignments Seen from Bottom View The design guidelines that should be followed when completing the Antenna Matching Network are as follows: The AMN should be placed close to the antenna on the main board. Routing to the AMN from the ANT pad on the module must be controlled to an impedance of 50. The final AMN circuit may contain only a single component, or all three components shown above. The final number and type of components will be determined based on the actual design of the system, and the final values for each component can be determined through tuning the AMN. For details on how to properly tune an AMN, please refer to Application Note AN91445. Document Number: 002-15631 Rev. *H Page 12 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 The CYBLE-2X20XX-X1 schematic is shown in Figure 10. Figure 10. CYBLE-2X20XX-X1 Schematic Diagram Document Number: 002-15631 Rev. *H Page 13 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Critical Components List Table 5 details the critical components used in the CYBLE-2X20XX-X1 module. Table 5. Critical Component List Component Reference Designator Silicon U1 Description 56-pin QFN PSoC 4 Bluetooth LE Crystal Y1 24.000 MHz, 12PF Crystal Y2 32.768 kHz, 12.5PF Antenna Design Table 6 details trace antenna used in the CYBLE-212006-01 module. For more information, see Table 11. Table 6. Trace Antenna Specifications Item Description Frequency Range 2402 - 2480 MHz Peak Gain -0.5 dBi typical Return Loss 10 dB minimum Qualified Antenna for CYBLE-202007-01 and CYBLE-202013-11 The CYBLE-202007-01 module has been designed to work with a standard 2.2 dBi dipole antenna. Any antenna of equivalent or less gain can be used without additional application and testing for FCC regulations. Table 7 details the approved antennas for the CYBLE-202007-01 module for Bluetooth LE operation. These antennas may also be used for the CYBLE-202013-11 module, however all FCC and other regulatory testing will be required. Table 7. Qualified Antenna Manufacturer Part Number Gain Antenova B4844-01 2.2 dBi RFlink RF21C01228A 2.0 dBi Pulse W1030 2.0 dBi Power Amplifier (PA) and Low Noise Amplifier (LNA) Table 8 details the PA/LNA that is used on the CYBLE-2X20XX-X1 module. For more information, see Table 11. Table 8. Power Amplifier/Low Noise Amplifier Details Item Description PA/LNA Manufacturer Skyworks Inc. PA/LNA Part Number RFX2401C Power Supply Range 2.0V to 3.6V Table 9 details the power consumption of the integrated PA/LNA used on the CYBLE-2X20XX-X1 module. Table 9 only details the current consumption of the RFX2401C PA/LNA. VDD= 3.3 V, TA = +25C, measured on the RFX2401C evaluation board, unless otherwise noted. Table 9. Power Amplifier/Low Noise Amplifier Current Consumption Specifications Parameter Test Condition Min Typical Max Unit Tx High Power Current Pout = +20dBm 90 mA Tx Quiescent Current No RF applied 17 mA Rx Quiescent Current No RF applied 8 mA Document Number: 002-15631 Rev. *H Page 14 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Enabling Extended Range Feature The CYBLE-2X20XX-X1 modules come with an integrated Power Amplifier/Low Noise Amplifier to allow for extended communication range of up to 400 meters full line-of-sight. This section describes the firmware steps required to enable extended range operation of the CYBLE-2X20XX-X1 modules. The CYBLE-2X20XX-X1 is designed to provide extended range functionality, and the PA/LNA of the module cannot be operated in bypass mode. The minimum output power configuration available for the CYBLE-2X20XX-X1 is +1 dBm, which is configurable via silicon internal output power settings. The Skyworks RFX2401C PA/LNA is controlled by PSoC 4 Bluetooth LE and uses two GPIOs: 1.One GPIO to control the PA enable (P3[2]). The PA enable GPIO is controlled directly by the Bluetooth LE Link Layer. 2.One GPIO to control the LNA enable (P3[3]). The LNA enable GPIO is controlled directly by the Bluetooth LE Link Layer. Ensure that the PSoC 4 Bluetooth LE silicon device "Adv/Scan TX Power Level (dBm)" and "Connection TX Power Level (dBm)" in the Bluetooth LE Component are both set to -12 dBm[9] To enable the extended range functionality, follow the steps outlined below: 1.Open your project's main.c file and write the below code to define the register at the top of the code. /* define the test register to switch the PA/LNA hardware control pins */ #define CYREG_SRSS_TST_DDFT_CTRL 0x40030008 2.Locate/add the event "CYBLE_EVT_STACK_ON" in the application code and insert the below two lines of code to enable the Skyworks RFX2401C. /* Mandatory events to be handled by BLE application code */ case CYBLE_EVT_STACK_ON: /* Configure the Link Layer to automatically switch PA control pin P3[2] and LNA control pin P3[3] */ CY_SET_XTND_REG32((void CYFAR *)(CYREG_BLE_BLESS_RF_CONFIG), 0x0331); CY_SET_XTND_REG32((void CYFAR *)(CYREG_SRSS_TST_DDFT_CTRL), 0x80000302); Low Power Operation The CYBLE-2X20XX-X1 module is already optimized for low power operation when in high output power, high gain mode. The Cypress Bluetooth LE Link Layer will automatically enable TX high power operation, as well as RX high gain operation. When the radio TX or RX operation is not in use (i.e. sleep), the PA/LNA will be set to shutdown mode by the Bluetooth LE Link Layer. This will occur during sleep modes of the Cypress PSoC 4 Bluetooth LE silicon device. To learn more about optimize the Cypress PSoC 4 Bluetooth LE power consumption, refer to AN92584: Designing for Low Power and Estimating Battery Life for Bluetooth LE Applications. Note 9. The CYBLE-212006-01 module is certified for FCC, ISED, CE, MIC and KC regulations at an output power of +7.5 dBm. To achieve this output power, RFO2 (PSoC 4 Bluetooth LE silicon PA level) must be set to the -12 dBm setting in firmware. Settings higher than this will result in higher output power than specified in the CYBLE-212006-01 certifications. Document Number: 002-15631 Rev. *H Page 15 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Electrical Specification Table 10 details the absolute maximum electrical characteristics for the Cypress Bluetooth LE module. Table 10. CYBLE-2X20XX-X1 Absolute Maximum Ratings Parameter Description Min Typ Max Units Details/Conditions VDDD_ABS Analog, digital, or radio supply relative to VSS (VSSD = VSSA) -0.5 - 3.6 V Absolute maximum VCCD_ABS Direct digital core voltage input relative to VSSD -0.5 - 1.95 V Absolute maximum VDD_RIPPLE Maximum power supply ripple for VDD and VDDR input voltage - - 100 mV VGPIO_ABS GPIO voltage -0.5 - VDD +0.5 V Absolute maximum IGPIO_ABS Maximum current per GPIO -25 - 25 mA Absolute maximum IGPIO_injection GPIO injection current: Maximum for VIH > VDD and minimum for VIL < VSS -0.5 - 0.5 mA Absolute maximum current injected per pin LU Pin current for latch up -200 200 mA - Max Units Details/Conditions 7.5 Configurable via silicon dBm register settings VDD = 3.3 V 3.0 V supply Ripple frequency of 100 kHz to 750 kHz Table 11 details the RF characteristics for the Cypress Bluetooth LE module. Table 11. CYBLE-2X20XX-X1 RF Performance Characteristics Parameter Description Min Typ RFO RF output power on ANT 1 RXS RF receive sensitivity on ANT - -93 - dBm FR Module frequency range 2402 - 2480 MHz - GP Peak gain - -0.5 - dBi - RL Return loss - -10 - dB - Measured value (CYBLE-212006-01) Table 12 through Table 52 list the module level electrical characteristics for the CYBLE-2X20XX-X1. All specifications are valid for - 40 C TA 85 C and TJ 100 C, except where noted. Specifications are valid for 1.71 V to 3.6 V, except where noted. Table 12. CYBLE-2X20XX-X1 DC Specifications Min Typ Max Units VDD1 Parameter Power supply input voltage Description 1.8 - 3.6 V With regulator enabled Details/Conditions VDD2 Power supply input voltage unregulated (VDD) 1.71 1.8 1.89 V Internally unregulated supply VDDR1 Radio supply voltage (radio on) 2.0 - 3.6 V Restricted by RFX2401C VDDR2 Radio supply voltage (radio off) 2.0 - 3.6 V - Active Mode, VDD = 1.71 V to 3.6 V IDD3 Execute from flash; CPU at 3 MHz - 1.7 - mA T = 25 C, VDD = 3.3 V IDD4 Execute from flash; CPU at 3 MHz - - - mA T = -40 C to 85 C IDD5 Execute from flash; CPU at 6 MHz - 2.5 - mA T = 25 C, VDD = 3.3 V IDD6 Execute from flash; CPU at 6 MHz - - - mA T = -40 C to 85 C mA T = 25 C, VDD = 3.3 V IDD7 Execute from flash; CPU at 12 MHz Document Number: 002-15631 Rev. *H - 4 - Page 16 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Table 12. CYBLE-2X20XX-X1 DC Specifications (continued) Parameter IDD8 Description Execute from flash; CPU at 12 MHz Min Typ Max Units Details/Conditions - - - mA T = -40 C to 85 C IDD9 Execute from flash; CPU at 24 MHz - 7.1 - mA T = 25 C, VDD = 3.3 V IDD10 Execute from flash; CPU at 24 MHz - - - mA T = -40 C to 85 C IDD11 Execute from flash; CPU at 48 MHz - 13.4 - mA T = 25 C, VDD = 3.3 V IDD12 Execute from flash; CPU at 48 MHz - - - mA T = -40 C to 85 C - - - mA T = 25 C, VDD = 3.3 V, SYSCLK = 3 MHz - - - mA T = 25 C, VDD = 3.3 V, SYSCLK = 3 MHz T = 25 C, VDD = 3.3 V Sleep Mode, VDD = 1.8 to 3.6 V IDD13 IMO on Sleep Mode, VDD and VDDR = 2.0 to 3.6 V IDD14 ECO on Deep-Sleep Mode, VDD = 1.8 to 3.6 V IDD15 WDT with WCO on - 1.5 - A IDD16 WDT with WCO on - - - A T = -40 C to 85 C IDD17 WDT with WCO on - - - A IDD18 WDT with WCO on - - - A T = 25 C, VDD = 5 V T = -40 C to 85 C T = 25 C Deep-Sleep Mode, VDD = 1.71 to 1.89 V (Regulator Bypassed) IDD19 WDT with WCO on - - - IDD20 WDT with WCO on - - - A A T = -40 C to 85 C Hibernate Mode, VDD = 1.8 to 3.6 V IDD27 GPIO and reset active - 150 - nA T = 25 C, VDD = 3.3 V IDD28 GPIO and reset active - - - nA T = -40 C to 85 C Stop Mode, VDD = 1.8 to 3.6 V IDD33 Stop-mode current (VDD) - 20 - nA T = 25 C, VDD = 3.3 V IDD34 Stop-mode current (VDDR) - 40 -- nA T = 25 C, VDDR = 3.3 V IDD35 Stop-mode current (VDD) - - - nA T = -40 C to 85 C nA T = -40 C to 85 C, VDDR = 2.0 V to 3.6 V IDD36 Stop-mode current (VDDR) - - - Table 13. AC Specifications Parameter Description Min Typ Max Units DC - 48 MHz Wakeup from Sleep mode - 0 - s TDEEPSLEEP Wakeup from Deep-Sleep mode - - 25 s 24-MHz IMO. Guaranteed by characterization THIBERNATE Wakeup from Hibernate mode - - 2 ms Guaranteed by characterization TSTOP Wakeup from Stop mode - - 2 ms XRES wakeup FCPU CPU frequency TSLEEP Document Number: 002-15631 Rev. *H Details/Conditions 1.71 V VDD 3.6 V Guaranteed by characterization Page 17 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 GPIO Table 14. GPIO DC Specifications Parameter VIH[10] VIL VOH VOL Description Min Typ Max Units Input voltage HIGH threshold 0.7 x VDD - - V LVTTL input, VDD < 2.7 V 0.7 x VDD - - V LVTTL input, VDD 2.7 V Details/Conditions CMOS input - 2.0 - - V Input voltage LOW threshold - - 0.3 x VDD V - LVTTL input, VDD < 2.7 V - - 0.3 x VDD V - LVTTL input, VDD 2.7 V - - 0.8 V - CMOS input Output voltage HIGH level VDD -0.6 - - V IOH = 4 mA at 3.3-V VDD Output voltage HIGH level VDD -0.5 - - V IOH = 1 mA at 1.8-V VDD Output voltage LOW level - - 0.6 V IOL = 8 mA at 3.3-V VDD Output voltage LOW level - - 0.6 V IOL = 4 mA at 1.8-V VDD RPULLUP Pull-up resistor 3.5 5.6 8.5 k - RPULLDOWN Pull-down resistor 3.5 5.6 8.5 k - IIL Input leakage current (absolute value) - - 2 nA IIL_CTBM Input leakage on CTBm input pins - - 4 nA 25 C, VDD = 3.3 V - CIN Input capacitance - - 7 pF VHYSTTL Input hysteresis LVTTL 25 40 - mV VHYSCMOS Input hysteresis CMOS 0.05 x VDD - - 1 - IDIODE Current through protection diode to VDD/VSS - - 100 A - ITOT_GPIO Maximum total source or sink chip current - - 200 mA - - VDD > 2.7 V Table 15. GPIO AC Specifications Parameter Description Min Typ Max Units Details/Conditions TRISEF Rise time in Fast-Strong mode 2 - 12 ns 3.3-V VDDD, CLOAD = 25 pF TFALLF Fall time in Fast-Strong mode 2 - 12 ns 3.3-V VDDD, CLOAD = 25 pF TRISES Rise time in Slow-Strong mode 10 - 60 ns 3.3-V VDDD, CLOAD = 25 pF TFALLS Fall time in Slow-Strong mode 10 - 60 ns 3.3-V VDDD, CLOAD = 25 pF FGPIOUT1 GPIO Fout; 3.3 V VDD 5.5 V Fast-Strong mode - - 33 MHz 90/10%, 25 pF load, 60/40 duty cycle FGPIOUT2 GPIO Fout; 1.7 VVDD 3.3 V Fast-Strong mode - - 16.7 MHz 90/10%, 25 pF load, 60/40 duty cycle FGPIOUT3 GPIO Fout; 3.3 V VDD 5.5 V Slow-Strong mode - - 7 MHz 90/10%, 25 pF load, 60/40 duty cycle FGPIOUT4 GPIO Fout; 1.7 V VDD 3.3 V Slow-Strong mode - - 3.5 MHz 90/10%, 25 pF load, 60/40 duty cycle FGPIOIN GPIO input operating frequency 1.71 V VDD 5.5 V - - 48 MHz 90/10% VIO Note 10. VIH must not exceed VDD + 0.2 V. Document Number: 002-15631 Rev. *H Page 18 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Table 16. OVT GPIO DC Specifications (P5_0 and P5_1 Only) Parameter Description Min Typ Max Units IIL Input leakage (absolute value). VIH > VDD - - 10 A VOL Output voltage LOW level - - 0.4 V Details/Conditions 25C, VDD = 0 V, VIH = 3.0 V IOL = 20 mA, VDD > 2.9 V Table 17. OVT GPIO AC Specifications (P5_0 and P5_1 Only) Description Min Typ Max Units TRISE_OVFS Parameter Output rise time in Fast-Strong mode 1.5 - 12 ns Details/Conditions TFALL_OVFS Output fall time in Fast-Strong mode 1.5 - 12 ns 25-pF load, 10%-90%, VDD = 3.3 V TRISESS Output rise time in Slow-Strong mode 10 - 60 ns 25 pF load, 10%-90%, VDD = 3.3 V TFALLSS Output fall time in Slow-Strong mode 10 - 60 ns 25 pF load, 10%-90%, VDD = 3.3 V FGPIOUT1 GPIO FOUT; 3.3 V VDD 3.6 V Fast-Strong mode - - 24 MHz 90/10%, 25 pF load, 60/40 duty cycle FGPIOUT2 GPIO FOUT; 1.71 V VDD 3.3 V Fast-Strong mode - - 16 MHz 90/10%, 25 pF load, 60/40 duty cycle 25-pF load, 10%-90%, VDD = 3.3 V XRES Table 18. XRES DC Specifications Parameter Description Min Typ Max Units Details/Conditions VIH Input voltage HIGH threshold 0.7 x VDDD - - V CMOS input VIL Input voltage LOW threshold - - 0.3 x VDDD V CMOS input RPULLUP Pull-up resistor 3.5 5.6 8.5 k - CIN Input capacitance - 3 - pF - VHYSXRES Input voltage hysteresis - 100 - mV - IDIODE Current through protection diode to VDD/VSS - - 100 A - Min Typ Max Units Details/Conditions 1 - - s - Table 19. XRES AC Specifications Parameter TRESETWIDTH Description Reset pulse width Temperature Sensor Table 20. Temperature Sensor Specifications Parameter TSENSACC Description Temperature-sensor accuracy Document Number: 002-15631 Rev. *H Min -5 Typ 1 Max 5 Units C Details/Conditions -40 C to +85 C Page 19 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 SAR ADC Table 21. SAR ADC DC Specifications Parameter Description Min Typ Max Units bits Details/Conditions A_RES Resolution - - 12 A_CHNIS_S Number of channels - single-ended - - 6 6 full-speed[11] A-CHNKS_D Number of channels - differential - - 3 Diff inputs use neighboring I/O[11] A-MONO Monotonicity - - - A_GAINERR Gain error - - 0.1 % Yes A_OFFSET Input offset voltage - - 2 mV With external reference Measured with 1-V VREF A_ISAR Current consumption - - 1 mA - A_VINS Input voltage range - single-ended VSS - VDDA V - A_VIND Input voltage range - differential VSS - VDDA V - A_INRES Input resistance - - 2.2 k - A_INCAP Input capacitance - - 10 pF VREFSAR Trimmed internal reference to SAR -1 - 1 % Description Min Typ Max Units Details/Conditions A_PSRR Power-supply rejection ratio 70 - - dB Measured at 1-V reference A_CMRR Common-mode rejection ratio 66 - - dB - A_SAMP Sample rate - - 1 Msps - Fsarintref SAR operating speed without external ref. bypass - - 100 Ksps A_SNR Signal-to-noise ratio (SNR) 65 - - dB A_BW Input bandwidth without aliasing - - A_SAMP/2 kHz A_INL Integral nonlinearity. VDD = 1.71 V to 5.5 V, 1 Msps -1.7 - 2 LSB VREF = 1 V to VDD A_INL Integral nonlinearity. VDDD = 1.71 V to 3.6 V, 1 Msps -1.5 - 1.7 LSB VREF = 1.71 V to VDD A_INL Integral nonlinearity. VDD = 1.71 V to 5.5 V, 500 Ksps -1.5 - 1.7 LSB VREF = 1 V to VDD A_dnl Differential nonlinearity. VDD = 1.71 V to 5.5 V, 1 Msps -1 - 2.2 LSB VREF = 1 V to VDD A_DNL Differential nonlinearity. VDD = 1.71 V to 3.6 V, 1 Msps -1 - 2 LSB VREF = 1.71 V to VDD A_DNL Differential nonlinearity. VDD = 1.71 V to 5.5 V, 500 Ksps -1 - 2.2 LSB VREF = 1 V to VDD A_THD Total harmonic distortion - - -65 dB - Percentage of Vbg (1.024 V) Table 22. SAR ADC AC Specifications Parameter 12-bit resolution FIN = 10 kHz - FIN = 10 kHz Note 11. A maximum of six single-ended ADC Channels can be accomplished only if the AMUX Buses are not being used for other funcitonality (e.g. CapSense). If the AMUX Buses are being used for other functions, then the maximum number of single-ended ADC channels is four. Similarly, if the AMUX Buses are being used for other functionality, then the maximum number of differential ADC channels is two. Document Number: 002-15631 Rev. *H Page 20 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 CSD Table 23. CSD Block Specifications Parameter Description Min Typ Max Units Details/Conditions 1.71 - 3.6 V - VCSD Voltage range of operation IDAC1 DNL for 8-bit resolution -1 - 1 LSB - IDAC1 INL for 8-bit resolution -3 - 3 LSB - IDAC2 DNL for 7-bit resolution -1 - 1 LSB - IDAC2 INL for 7-bit resolution -3 - 3 LSB SNR Ratio of counts of finger to noise 5 - - Ratio - Capacitance range of 9 pF to 35 pF, 0.1-pF sensitivity. Radio is not operating during the scan IDAC1_CRT1 Output current of IDAC1 (8 bits) in High range - 612 - A - IDAC1_CRT2 Output current of IDAC1 (8 bits) in Low range - 306 - A - IDAC2_CRT1 Output current of IDAC2 (7 bits) in High range - 305 - A - IDAC2_CRT2 Output current of IDAC2 (7 bits) in Low range - 153 - A - Digital Peripherals Timer Table 24. Timer DC Specifications Parameter ITIM1 Description Block current consumption at 3 MHz Min - Typ - Max 42 Units A Details/Conditions 16-bit timer ITIM2 Block current consumption at 12 MHz - - 130 ITIM3 Block current consumption at 48 MHz - - 535 A A Min FCLK Typ - Max 48 Units MHz Details/Conditions 16-bit timer 16-bit timer Table 25. Timer AC Specifications Parameter TTIMFREQ Description Operating frequency TCAPWINT Capture pulse width (internal) 2 x TCLK - - ns - TCAPWEXT Capture pulse width (external) 2 x TCLK - - ns - TTIMRES Timer resolution TCLK - - ns - TTENWIDINT Enable pulse width (internal) 2 x TCLK - - ns - TTENWIDEXT Enable pulse width (external) 2 x TCLK - - ns - TTIMRESWINT Reset pulse width (internal) 2 x TCLK - - ns - TTIMRESEXT Reset pulse width (external) 2 x TCLK - - ns - Document Number: 002-15631 Rev. *H - Page 21 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Counter Table 26. Counter DC Specifications Parameter ICTR1 Description Block current consumption at 3 MHz Min - Typ - Max 42 Units A ICTR2 Block current consumption at 12 MHz - - 130 ICTR3 Block current consumption at 48 MHz - - 535 A A Details/Conditions 16-bit counter 16-bit counter 16-bit counter Table 27. Counter AC Specifications Parameter TCTRFREQ Description Operating frequency Min FCLK Typ - Max 48 Units MHz Details/Conditions - TCTRPWINT TCTRPWEXT Capture pulse width (internal) 2 x TCLK - - ns - Capture pulse width (external) 2 x TCLK - - ns - TCTRES Counter Resolution TCENWIDINT Enable pulse width (internal) TCLK - - ns - 2 x TCLK - - ns TCENWIDEXT Enable pulse width (external) - 2 x TCLK - - ns - TCTRRESWINT TCTRRESWEXT Reset pulse width (internal) 2 x TCLK - - ns - Reset pulse width (external) 2 x TCLK - - ns - Details/Conditions Pulse Width Modulation (PWM) Table 28. PWM DC Specifications Parameter Description Min Typ Max Units A A A IPWM1 Block current consumption at 3 MHz - - 42 16-bit PWM IPWM2 Block current consumption at 12 MHz - - 130 IPWM3 Block current consumption at 48 MHz - - 535 Min Typ Max Units Details/Conditions 16-bit PWM 16-bit PWM Table 29. PWM AC Specifications Parameter Description TPWMFREQ Operating frequency FCLK - 48 MHz - TPWMPWINT Pulse width (internal) 2 x TCLK - - ns - TPWMEXT Pulse width (external) 2 x TCLK - - ns - TPWMKILLINT Kill pulse width (internal) 2 x TCLK - - ns - TPWMKILLEXT Kill pulse width (external) 2 x TCLK - - ns - TPWMEINT Enable pulse width (internal) 2 x TCLK - - ns - TPWMENEXT Enable pulse width (external) 2 x TCLK - - ns - TPWMRESWINT Reset pulse width (internal) 2 x TCLK - - ns - TPWMRESWEXT Reset pulse width (external) 2 x TCLK - - ns - Document Number: 002-15631 Rev. *H Page 22 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 LCD Direct Drive Table 30. LCD Direct Drive DC Specifications Parameter ILCDLOW Description Min Typ Max Units - 17.5 - A Details/Conditions 16 x 4 small segment display at 50 Hz - 500 5000 pF - Operating current in low-power mode LCDOFFSET LCD capacitance per segment/common driver Long-term segment offset - 20 - mV - ILCDOP1 LCD system operating current, VBIAS = 5 V - 2 - mA 32 x 4 segments. 50 Hz at 25 C ILCDOP2 LCD system operating current, VBIAS = 3.3 V - 2 - mA 32 x 4 segments. 50 Hz at 25 C CLCDCAP Table 31. LCD Direct Drive AC Specifications Parameter FLCD Description Min 10 LCD frame rate Typ 50 Max 150 Units Hz Details/Conditions - Serial Communication Table 32. Fixed I2C DC Specifications Parameter Description Min Typ Max Units Details/Conditions - Details/Conditions II2C1 Block current consumption at 100 kHz - - 50 II2C2 Block current consumption at 400 kHz - - 155 II2C3 Block current consumption at 1 Mbps - - 390 II2C4 I2C - - 1.4 A A A A Min Typ Max Units - - 400 kHz enabled in Deep-Sleep mode - - - Table 33. Fixed I2C AC Specifications Parameter FI2C1 Description Bit rate Table 34. Fixed UART DC Specifications Description Min Typ Max Units Details/Conditions IUART1 Parameter Block current consumption at 100 kbps - - 55 - IUART2 Block current consumption at 1000 kbps - - 312 A A Min Typ Max Units Details/Conditions - - 1 Mbps - Min Typ Max Units Details/Conditions A A A - - Table 35. Fixed UART AC Specifications Parameter FUART Description Bit rate Table 36. Fixed SPI DC Specifications Parameter Description ISPI1 Block current consumption at 1 Mbps - - 360 ISPI2 Block current consumption at 4 Mbps - - 560 ISPI3 Block current consumption at 8 Mbps - - 600 Document Number: 002-15631 Rev. *H - - Page 23 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Table 37. Fixed SPI AC Specifications Parameter FSPI Description Min Typ Max Units Details/Conditions SPI operating frequency (master; 6x over sampling) - - 8 MHz - Table 38. Fixed SPI Master Mode AC Specifications Min Typ Max Units Details/Conditions TDMO Parameter MOSI valid after SCLK driving edge Description - - 18 ns - TDSI MISO valid before SCLK capturing edge Full clock, late MISO sampling used 20 - - ns Full clock, late MISO sampling THMO Previous MOSI data hold time 0 - - ns Referred to Slave capturing edge Table 39. Fixed SPI Slave Mode AC Specifications Parameter Description Min Typ Max Units TDMI MOSI valid before SCLK capturing edge 40 - - ns TDSO MISO valid after SCLK driving edge - - 42 + 3 x TCPU ns TDSO_ext MISO Valid after SCLK driving edge in external clock mode. VDD < 3.0 V - - 50 ns THSO Previous MISO data hold time TSSELSCK SSEL valid to first SCK valid edge 0 - - ns 100 - - ns Memory Table 40. Flash DC Specifications Parameter Description Min Typ Max Units Details/Conditions 1.71 - 5.5 V - Number of Wait states at 32-48 MHz 2 - - CPU execution from flash Number of Wait states at 16-32 MHz 1 - - CPU execution from flash Number of Wait states for 0-16 MHz 0 - - CPU execution from flash Min Typ Max VPE Erase and program voltage TWS48 TWS32 TWS16 Table 41. Flash AC Specifications Parameter Description Units Details/Conditions TROWWRITE[12] TROWERASE[12] Row (block) write time (erase and program) - - 20 ms Row erase time - - 13 ms TROWPROGRAM[12] TBULKERASE[12] TDEVPROG[12] Row program time after erase - - 7 ms - Bulk erase time (256 KB) - - 35 ms - FEND Flash endurance FRET FRET2 Total device program time Row (block) = 256 bytes - - - 25 seconds - 100 K - - cycles - Flash retention. TA 55 C, 100 K P/E cycles 20 - - years - Flash retention. TA 85 C, 10 K P/E cycles 10 - - years - Note 12. It can take as much as 20 ms to write to flash. During this time, the device should not be reset, or flash operations will be interrupted and cannot be relied on to have completed. Reset sources include the XRES pin, software resets, CPU lockup states and privilege violations, improper power supply levels, and watchdogs. Make certain that these are not inadvertently activated. Document Number: 002-15631 Rev. *H Page 24 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 System Resources Power-on-Reset (POR) Table 42. POR DC Specifications Min Typ Max Units Details/Conditions VRISEIPOR Parameter Rising trip voltage Description 0.80 - 1.45 V - VFALLIPOR Falling trip voltage 0.75 - 1.40 V - VIPORHYST Hysteresis 15 - 200 mV - Min Typ Max Units Details/Conditions - - 1 s - Description Min Typ Max Units Details/Conditions VFALLPPOR BOD trip voltage in Active and Sleep modes 1.64 - - V - VFALLDPSLP BOD trip voltage in Deep Sleep 1.4 - - V - Table 43. POR AC Specifications Parameter TPPOR_TR Description Precision power-on reset (PPOR) response time in Active and Sleep modes Table 44. Brown-Out Detect Parameter Table 45. Hibernate Reset Parameter VHBRTRIP Description BOD trip voltage in Hibernate Min Typ Max Units Details/Conditions 1.1 - - V - Voltage Monitors (LVD) Table 46. Voltage Monitor DC Specifications Parameter VLVI1 Description LVI_A/D_SEL[3:0] = 0000b Min 1.71 Typ 1.75 Max 1.79 Units V Details/Conditions - VLVI2 LVI_A/D_SEL[3:0] = 0001b 1.76 1.80 1.85 V - VLVI3 LVI_A/D_SEL[3:0] = 0010b 1.85 1.90 1.95 V - VLVI4 LVI_A/D_SEL[3:0] = 0011b 1.95 2.00 2.05 V - VLVI5 LVI_A/D_SEL[3:0] = 0100b 2.05 2.10 2.15 V - VLVI6 LVI_A/D_SEL[3:0] = 0101b 2.15 2.20 2.26 V - VLVI7 LVI_A/D_SEL[3:0] = 0110b 2.24 2.30 2.36 V - VLVI8 LVI_A/D_SEL[3:0] = 0111b 2.34 2.40 2.46 V - VLVI9 LVI_A/D_SEL[3:0] = 1000b 2.44 2.50 2.56 V - VLVI10 LVI_A/D_SEL[3:0] = 1001b 2.54 2.60 2.67 V - VLVI11 LVI_A/D_SEL[3:0] = 1010b 2.63 2.70 2.77 V - VLVI12 LVI_A/D_SEL[3:0] = 1011b 2.73 2.80 2.87 V - VLVI13 LVI_A/D_SEL[3:0] = 1100b 2.83 2.90 2.97 V - VLVI14 LVI_A/D_SEL[3:0] = 1101b 2.93 3.00 3.08 V - VLVI15 LVI_A/D_SEL[3:0] = 1110b 3.12 3.20 3.28 V - VLVI16 LVI_A/D_SEL[3:0] = 1111b 4.39 4.50 4.61 V - LVI_IDD Block current - - 100 A - Document Number: 002-15631 Rev. *H Page 25 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Table 47. Voltage Monitor AC Specifications Parameter Description TMONTRIP Min Typ Max Units Details/Conditions - - 1 s - Min Typ Max Units Details/Conditions Voltage monitor trip time SWD Interface Table 48. SWD Interface Specifications Parameter Description F_SWDCLK1 3.3 V VDD 5.5 V - - 14 MHz SWDCLK 1/3 CPU clock frequency F_SWDCLK2 1.71 V VDD 3.3 V - - 7 MHz SWDCLK 1/3 CPU clock frequency T_SWDI_SETUP T = 1/f SWDCLK 0.25 x T - - ns - T_SWDI_HOLD 0.25 x T - - ns - T_SWDO_VALID T = 1/f SWDCLK - - 0.5 x T ns - T_SWDO_HOLD 1 - - ns - T = 1/f SWDCLK T = 1/f SWDCLK Internal Main Oscillator Table 49. IMO DC Specifications Parameter Description Min Typ Max Units Details/Conditions - Details/Conditions IIMO1 IMO operating current at 48 MHz - - 1000 IIMO2 IMO operating current at 24 MHz - - 325 IIMO3 IMO operating current at 12 MHz - - 225 IIMO4 IMO operating current at 6 MHz - - 180 IIMO5 IMO operating current at 3 MHz - - 150 A A A A A Min Typ Max Units - - - - Table 50. IMO AC Specifications Parameter Description FIMOTOL3 Frequency variation from 3 to 48 MHz - - 2 % FIMOTOL3 IMO startup time - 12 - s - Min Typ Max Units Details/Conditions - 0.3 1.05 A - Min Typ Max Units Details/Conditions With API-called calibration Internal Low-Speed Oscillator Table 51. ILO DC Specifications Parameter IILO2 Description ILO operating current at 32 kHz Table 52. ILO AC Specifications Parameter Description TSTARTILO1 ILO startup time - - 2 ms - FILOTRIM1 32-kHz trimmed frequency 15 32 50 kHz - Table 53. ECO Trim Value Specification Parameter ECOTRIM Description 24-MHz trim value (firmware configuration) Document Number: 002-15631 Rev. *H Value Details/Conditions 0x0000D0D0 Optimum trim value that needs to be loaded to register CY_SYS_XTAL_BLERD_BB_XO_CAPTRIM_REG Page 26 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Bluetooth LE Subsystem Table 54. Bluetooth LE Subsystem Parameter Description Min Typ Max Units Details/Conditions RX sensitivity with idle transmitter - -89 - dBm Silicon only RXS, IDLE RX sensitivity with idle transmitter excluding Balun loss - -91 - dBm Silicon only Guaranteed by design simulation RXS, DIRTY RX sensitivity with dirty transmitter - -87 -70 dBm Silicon only RF-PHY Specification (RCV-LE/CA/01/C) RXS, HIGHGAIN RX sensitivity in high-gain mode with idle transmitter - -91 - dBm Silicon only RXS, IDLE, MOD RX sensitivity for full module with idle transmitter - -93 - dBm Full module, LNA active PRXMAX Maximum input power -10 -1 - dBm RF-PHY Specification (RCV-LE/CA/06/C) CI1 Cochannel interference, Wanted signal at -67 dBm and Interferer at FRX - 9 21 dB RF-PHY Specification (RCV-LE/CA/03/C) CI2 Adjacent channel interference Wanted signal at -67 dBm and Interferer at FRX 1 MHz - 3 15 dB RF-PHY Specification (RCV-LE/CA/03/C) CI3 Adjacent channel interference Wanted signal at -67 dBm and Interferer at FRX 2 MHz - -29 - dB RF-PHY Specification (RCV-LE/CA/03/C) CI4 Adjacent channel interference Wanted signal at -67 dBm and Interferer at FRX 3 MHz - -39 - dB RF-PHY Specification (RCV-LE/CA/03/C) CI5 Adjacent channel interference Wanted Signal at -67 dBm and Interferer at Image frequency (FIMAGE) - -29 - dB RF-PHY Specification (RCV-LE/CA/03/C) CI6 Adjacent channel interference Wanted signal at -67 dBm and Interferer at Image frequency (FIMAGE 1 MHz) - -30 - dB RF-PHY Specification (RCV-LE/CA/03/C) OBB1 Out-of-band blocking, Wanted signal at -67 dBm and Interferer at F = 30-2000 MHz -30 -27 - dBm RF-PHY Specification (RCV-LE/CA/04/C) OBB2 Out-of-band blocking, Wanted signal at -67 dBm and Interferer at F = 2003-2399 MHz -35 -27 - dBm RF-PHY Specification (RCV-LE/CA/04/C) OBB3 Out-of-band blocking, Wanted signal at -67 dBm and Interferer at F = 2484-2997 MHz -35 -27 - dBm RF-PHY Specification (RCV-LE/CA/04/C) OBB4 Out-of-band blocking, Wanted signal a -67 dBm and Interferer at F = 3000-12750 MHz -30 -27 - dBm RF-PHY Specification (RCV-LE/CA/04/C) IMD Inter modulation performance Wanted signal at -64 dBm and 1-Mbps Bluetooth LE, third, fourth, and fifth offset channel -50 - - dBm RF-PHY Specification (RCV-LE/CA/05/C) RF Receiver Specification Document Number: 002-15631 Rev. *H Page 27 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Table 54. Bluetooth LE Subsystem (continued) Parameter Description Min Typ Max Units Details/Conditions RXSE1 Receiver spurious emission 30 MHz to 1.0 GHz - - -57 dBm 100-kHz measurement bandwidth ETSI EN300 328 V2.1.1 RXSE2 Receiver spurious emission 1.0 GHz to 12.75 GHz - - -47 dBm 1-MHz measurement bandwidth ETSI EN300 328 V2.1.1 RF Transmitter Specifications TXP, ACC RF power accuracy - 1 - dB - TXP, RANGE RF power control range - 6 21 dB Usable range to comply to certifications. TXP, TYP Output power, -12-dB (PA2) Gain setting for silicon dBm This is the required power level to comply to certifications and qualificatons for this module - 7.5 - TXP, MAX Output power, maximum power setting - 22.5 - dBm Output power above +7.5 dBm will void certifications and qualifications of this module. TXP, MIN Output power, minimum power setting - 1.5 - dBm - F2AVG Average frequency deviation for 10101010 pattern 185 - - kHz RF-PHY Specification (TRM-LE/CA/05/C) F1AVG Average frequency deviation for 11110000 pattern 225 250 275 kHz RF-PHY Specification (TRM-LE/CA/05/C) EO Eye opening = F2AVG/F1AVG 0.8 - - FTX, ACC Frequency accuracy -150 - 150 kHz RF-PHY Specification (TRM-LE/CA/06/C) FTX, MAXDR Maximum frequency drift -50 - 50 kHz RF-PHY Specification (TRM-LE/CA/06/C) FTX, INITDR Initial frequency drift -20 - 20 kHz RF-PHY Specification (TRM-LE/CA/06/C) FTX, DR Maximum drift rate -20 - 20 kHz/ 50 s RF-PHY Specification (TRM-LE/CA/06/C) IBSE1 In-band spurious emission at 2-MHz offset - - -20 dBm RF-PHY Specification (TRM-LE/CA/03/C) IBSE2 In-band spurious emission at 3-MHz offset - - -30 dBm RF-PHY Specification (TRM-LE/CA/03/C) TXSE1 Transmitter spurious emissions (average), <1.0 GHz - - -55.5 dBm FCC-15.247 TXSE2 Transmitter spurious emissions (average), >1.0 GHz - - -41.5 dBm FCC-15.247 RF-PHY Specification (TRM-LE/CA/05/C) RF Current Specifications IRX Receive current in normal mode - 18.7 - mA Silicon only IRX_RF Radio receive current in normal mode - 16.4 - mA Silicon only Measured at VDDR IRX, HIGHGAIN Receive current in high-gain mode - 21.5 - mA Silicon only Document Number: 002-15631 Rev. *H Page 28 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Table 54. Bluetooth LE Subsystem (continued) Parameter Description Min Typ Max Units Details/Conditions IRX, LNA Receive current, LNA - 8.0 - mA LNA only ITX, 3dBm TX current at 3-dBm setting (PA10) - 20 - mA Silicon only ITX, 0dBm TX current at 0-dBm setting (PA7) - 16.5 - mA Silicon only ITX_RF, 0dBm Radio TX current at 0 dBm setting (PA7) - 15.6 - mA Silicon only. Measured at VDDR ITX_RF, 0dBm Radio TX current at 0 dBm excluding Balun loss - 14.2 - mA Silicon only. Guaranteed by design simulation ITX,-3dBm TX current at -3-dBm setting (PA4) - 15.5 - mA Silicon only ITX,-6dBm TX current at -6-dBm setting (PA3) - 14.5 - mA Silicon only ITX,-12dBm TX current at -12-dBm setting (PA2) - 13.2 - mA Silicon only ITX,-18dBm TX current at -18-dBm setting (PA1) - 12.5 - mA Silicon only - 8.0 - mA PA only average current Packet length of 0x01 Continuous Transmit - 27.0 - mA PA only average current Packet length of 0xFF Continuous Transmit - 1.0 - A PA/LNA only current A Module TXP: +7.5 dBm; 20-ppm master and slave clock accuracy. For empty PDU exchange ITX, +7.5dBm ITXRX, PA/LNA PA TX Current at +7.5 dBm module TXP Silicon TXP set to -12-dBm setting (PA2) PA/LNA set to shutdown mode Average current at 1-second Bluetooth Iavg_1sec, 7.5dBm LE connection interval Average current at 4-second Bluetooth Iavg_4sec, 7.5dBm LE connection interval - 30 - - 13 - A Module TXP: +7.5 dBm; 20-ppm master and slave clock accuracy. For empty PDU exchange 2400 - 2482 MHz - General RF Specifications FREQ RF operating frequency CHBW Channel spacing - 2 - MHz - DR On-air data rate - 1000 - kbps - IDLE2TX Bluetooth LE.IDLE to Bluetooth LE. TX transition time - 120 140 s - IDLE2RX Bluetooth LE.IDLE to Bluetooth LE. RX transition time - 75 120 s - RSSI, ACC RSSI accuracy - 5 - dB - RSSI, RES RSSI resolution - 1 - dB - RSSI, PER RSSI sample period - 6 - s - RSSI Specifications Document Number: 002-15631 Rev. *H Page 29 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Environmental Specifications Environmental Compliance CYBLE-212006-01 and CYBLE-202013-11 are built in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen Free (HF) directives. CYBLE-212006-01 and CYBLE-202013-11 and components used to produce this module are RoHS and HF compliant. CYBLE-202007-01 is built in compliance with the Restriction of Hazardous Substances (RoHS) directives. CYBLE-202007-01 and components used to produce this module are RoHS compliant. RF Certification The CYBLE-212006-01 and CYBLE-202007-01 modules will be certified under the following RF certification standards at production release. FCC: WAP2006 CE IC: 7922A-2006 MIC: 203-JN0599 KC: MSIP-CRM-Cyp-2006 Safety Certification The CYBLE-212006-01 and CYBLE-202007-01 modules comply with the following regulations: Underwriters Laboratories, Inc. (UL) - Filing E331901 CSA TUV Environmental Conditions Table 55 describes the operating and storage conditions for the Cypress Bluetooth LE module. Table 55. Environmental Conditions for CYBLE-2X20XX-X1 Description Operating temperature Operating humidity (relative, non-condensation) Thermal ramp rate Storage temperature Minimum Specification Maximum Specification -40 C 85 C 5% 85% - 3 C/minute -40 C 85 C Storage temperature and humidity - 85 C at 85% ESD: Module integrated into system Components[13] - 15 kV Air 2.2 kV Contact ESD and EMI Protection Exposed components require special attention to ESD and electromagnetic interference (EMI). A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance. Any openings in the enclosure near the module should be surrounded by a grounded conductive layer to provide ESD protection and a low-impedance path to ground. Device Handling: Proper ESD protocol must be followed in manufacturing to ensure component reliability. Note 13. This does not apply to the RF pins (ANT, XTALI, and XTALO). RF pins (ANT, XTALI, and XTALO) are tested for 500-V HBM. Document Number: 002-15631 Rev. *H Page 30 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Regulatory Information FCC FCC NOTICE: The devices CYBLE-212006-01 and CYBLE-202007-01 comply with Part 15 of the FCC Rules. The device meet the requirements for modular transmitter approval as detailed in FCC public Notice DA00-1407.transmitter Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation. CAUTION: The FCC requires the user to be notified that any changes or modifications made to this device that are not expressly approved by Cypress Semiconductor may void the user's authority to operate the equipment. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, e may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate the receiving antenna. Increase the separation between the equipment and receiver. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. Consult the dealer or an experienced radio/TV technician for help LABELING REQUIREMENTS: The Original Equipment Manufacturer (OEM) must ensure that FCC labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor FCC identifier for this product as well as the FCC Notice above. The FCC identifier is FCC ID: WAP2006. In any case the end product must be labeled exterior with "Contains FCC ID: WAP2006". ANTENNA WARNING: This device is tested with a standard SMA connector and with antennas meeting the characteristics shown in Table 7 on page 14. When integrated in the OEMs product, these fixed antennas require installation preventing end-users from replacing them with non-approved antennas. Any antenna not in the following table must be tested to comply with FCC Section 15.203 for unique antenna connectors and Section 15.247 for emissions. RF EXPOSURE: To comply with FCC RF Exposure requirements, the Original Equipment Manufacturer (OEM) must ensure to install the approved antenna in the previous. The preceding statement must be included as a CAUTION statement in manuals, for products operating with the approved antennas in Table 6 and Table 7 on page 14, to alert users on FCC RF Exposure compliance. Any notification to the end user of installation or removal instructions about the integrated radio module is not allowed. The radiated output power of CYBLE-212006-01 and CYBLE-202007-01 with the specified antennas are far below the FCC radio frequency exposure limits. Nevertheless, use CYBLE-212006-01 and CYBLE-202007-01 in such a manner that minimizes the potential for human contact during normal operation. End users may not be provided with the module installation instructions. OEM integrators and end users must be provided with transmitter operating conditions for satisfying RF exposure compliance. Document Number: 002-15631 Rev. *H Page 31 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 ISED Innovation, Science and Economic Development (ISED) Canada Certification CYBLE-212006-01 and CYBLE-202007-01 are licensed to meet the regulatory requirements of Innovation, Science and Economic Development (ISED) Canada, License: IC: 7922A-2006 Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and ensure compliance for SAR and/or RF exposure limits. Users can obtain Canadian information on RF exposure and compliance from www.ic.gc.ca. This device has been designed to operate with the antennas listed in Table 6 and Table 7 on page 14, having a maximum gain of 2.2 dBi. Antennas not included in this list or having a gain greater than 2.2 dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms. The antenna used for this transmitter must not be co-located or operating in conjunction with any other antenna or transmitter. ISED NOTICE: The devices CYBLE-212006-01 and CYBLE-202007-01, including the specified antennas comply with Canada RSS-GEN Rules. The device meets the requirements for modular transmitter approval as detailed in RSS-GEN. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation. Les dispositifs CYBLE-212006-01 et CYBLE-202007-01, y compris les antennes specifiees, sont conformes aux Regles RSS-GEN de Canada. L'appareil repond aux exigences d'approbation de l'emetteur modulaire tel que decrit dans RSS-GEN. L'operation est soumise aux deux conditions suivantes: (1) Cet appareil ne doit pas causer d'interferences nuisibles, et (2) Cet appareil doit accepter toute interference recue, y compris les interferences pouvant entrainer un fonctionnement indesirable. ISED INTERFERENCE STATEMENT FOR CANADA These modules comply with Innovation, Science and Economic Development (ISED) Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Ces modules sont conformes a la norme (s) RSS soumise (s) a la licence de l'innovation, de la science et du developpement economique (ISED). Le fonctionnement est soumis aux deux conditions suivantes: (1) cet appareil ne doit pas provoquer d'interference, et (2) cet appareil doit accepter toute interference, y compris les interferences susceptibles de provoquer un fonctionnement indesirable de l'appareil. ISED RADIATION EXPOSURE STATEMENT FOR CANADA This equipment complies with ISED radiation exposure limits set forth for an uncontrolled environment. Cet equipement est conforme aux limites d'exposition aux radiations ISED prevues pour un environnement incontrole. LABELING REQUIREMENTS: The Original Equipment Manufacturer (OEM) must ensure that ISED labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor IC identifier for this product as well as the ISED Notice above. The IC identifier is 7922A-2006. In any case, the end product must be labeled in its exterior with "Contains IC: 7922A-2006". Document Number: 002-15631 Rev. *H Page 32 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 European Declaration of Conformity Hereby, Cypress Semiconductor declares that Bluetooth modules CYBLE-212006-01 and CYBLE-202007-01 comply with the essential requirements and other relevant provisions of Directive 2014. As a result of the conformity assessment procedure described in Annex III of the Directive 2014, the end-customer equipment should be labeled as follows: All versions of the CYBLE-212006-01 and CYBLE-202007-01 in the specified reference design can be used in the following countries: Austria, Belgium, Cyprus, Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Poland, Portugal, Slovakia, Slovenia, Spain, Sweden, The Netherlands, the United Kingdom, Switzerland, and Norway. MIC Japan CYBLE-212006-01 and CYBLE-202007-01 are certified as a module with type certification number 203-JN0599. End products that integrate CYBLE-212006-01 and CYBLE-202007-01 do not need additional MIC Japan certification for the end product. End product can display the certification label of the embedded module. KC Korea CYBLE-212006-01 and CYBLE-202007-01 are certified for use in Korea with certificate number MSIP-CRM-Cyp-2006. Document Number: 002-15631 Rev. *H Page 33 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Packaging Table 56. Solder Reflow Peak Temperature Module Part Number Package CYBLE-2X20XX-X1 30-pad SMT Maximum Peak Temperature Maximum Time at Peak Temperature No. of Cycles 260 C 30 seconds 2 Table 57. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2 Module Part Number Package MSL CYBLE-2X20XX-X1 30-pad SMT MSL 3 The CYBLE-2X20XX-X1 is offered in tape and reel packaging. Figure 11 details the tape dimensions used for the CYBLE-2X20XX-X1. Figure 11. CYBLE-2X20XX-X1 Tape Dimensions Figure 12 details the orientation of the CYBLE-2X20XX-X1 in the tape as well as the direction for unreeling. Figure 12. Component Orientation in Tape and Unreeling Direction (Illustration Only) Document Number: 002-15631 Rev. *H Page 34 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Figure 13 details reel dimensions used for the CYBLE-2X20XX-X1. Figure 13. Reel Dimensions The CYBLE-2X20XX-X1 is designed to be used with pick-and-place equipment in an SMT manufacturing environment. The center-of-mass for the CYBLE-2X20XX-X1 is detailed in Figure 14. Figure 14. CYBLE-2X20XX-X1 Center of Mass (Seen from Top) CYBLE-212006-01 Center of Mass Document Number: 002-15631 Rev. *H CYBLE-202007-01 Center of Mass CYBLE-202013-11 Center of Mass Page 35 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Ordering Information Table 58 lists the CYBLE-2X20XX-X1 part numbers and features. Table 58. Ordering Information Part Number CPU Speed (MHz) Flash Size (KB) CYBLE-212006-01 48 256 Yes 2 CYBLE-202007-01 48 256 Yes 2 CYBLE-202013-11 48 256 Yes 2 12-Bit SAR ADC I2S LCD Package Packing Certified 4 1 Msps Yes Yes 30-SMT Tape and Reel Yes 4 1 Msps Yes Yes 30-SMT Tape and Reel Yes 4 1 Msps Yes Yes 30-SMT Tape and Reel No CapSense SCB TCPWM Table 59. Tape and Reel Package Quantity and Minimum Order Amount Description Minimum Reel Quantity Maximum Reel Quantity Reel Quantity 500 500 Minimum Order Quantity (MOQ) 500 - Order Increment (OI) 500 - Comments Ships in 500 unit reel quantities. The CYBLE-2X20XX-X1 is offered in tape and reel packaging. The CYBLE-2X20XX-X1 ships with a maximum of 500 units/reel. Part Numbering Convention The part numbers are of the form CYBLE-FATT##-SB where the fields are defined as follows. CY BLE - F A T T ## - S B Bluetooth Version: 0 = BT 4.1, 1 = BT 4.2, 2 = BT 5.0 Integration Type: 0 = Full Integration With Shield, 1 = No Shield Device Identification Number: Unique sequential product number for each module Temperature Range: 0 = Industrial, 1 = Extended Industrial EZ-BLE Module Type: 2/4 = PSoC4, 3 = WICED, 4 = PSoC6 Antenna Type: 0 = No Antenna, 1 = PCB Antenna, 2 = Chip Antenna Flash Size: 0 = 128KB, 2 = 256KB Marketing Code: BLE = Bluetooth LE Product Family Company ID: CY = Cypress For additional information and a complete list of Cypress Semiconductor Bluetooth LE products, contact your local Cypress sales representative. To locate the nearest Cypress office, visit our website. U.S. Cypress Headquarters Address U.S. Cypress Headquarter Contact Info Cypress website address Document Number: 002-15631 Rev. *H 198 Champion Court, San Jose, CA 95134 (408) 943-2600 http://www.cypress.com Page 36 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Acronyms Document Conventions Table 60. Acronyms Used in this Document Units of Measure Acronym Description BLE Bluetooth Low Energy Bluetooth SIG Bluetooth Special Interest Group CE European Conformity CSA Canadian Standards Association EMI electromagnetic interference ESD electrostatic discharge FCC Federal Communications Commission GPIO general-purpose input/output IC Industry Canada IDE integrated design environment KC Korea Certification MIC Ministry of Internal Affairs and Communications (Japan) PCB printed circuit board RX receive QDID qualification design ID SMT surface-mount technology; a method for producing electronic circuitry in which the components are placed directly onto the surface of PCBs TCPWM timer, counter, pulse width modulator (PWM) TUV Germany: Technischer Uberwachungs-Verein (Technical Inspection Association) TX transmit Document Number: 002-15631 Rev. *H Table 61. Units of Measure Symbol Unit of Measure C degree Celsius kV kilovolt mA milliamperes mm millimeters mV millivolt A m microamperes MHz megahertz micrometers GHz gigahertz V volt Page 37 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Document History Page Document Title: CYBLE-212006-01, CYBLE-202007-01, CYBLE-202013-11 EZ-BLETM Creator XR Module Document Number: 002-15631 Revision ECN Submission Date ** 5446955 10/07/2016 Preliminary datasheet for CYBLE-2X20XX-X1 modules. 11/29/2016 Updated More Information: Added EZ-SerialTM Bluetooth LE Firmware Platform section. Updated Overview: Added Bluetooth Declaration ID and QDID under "Bluetooth 4.2 qualified single-mode module" Updated Recommended Host PCB Layout: Updated Figure 4, Figure 5, and Figure 6 captions to specify that these as "Seen on Host PCB". Updated Power Supply Connections and Recommended External Components: Updated Figure 7 and Figure 8 to specify that these are "Seen from Bottom". Updated Digital and Analog Capabilities and Connections: Updated Table 4: Updated TCPWM column to add TCPWM capability on Port 2 pins. Added Footnote 5. 12/15/2016 Updated More Information: Added hyperlinks for Evaluation Board listed under Development Kits Updated Enabling Extended Range Feature: Updated SAR ADC: Updated Table 21 to add Note 10 to specify under what conditions the maximum number of ADC channels can be achieved. *A *B 5536076 5554670 Description of Change *C 5667227 03/21/2017 Changed status from "Preliminary" to "Final". Added Antenna Matching Network Requirements for CYBLE-202013-11 section. Updated Table 54 to update specifications for RX, TX, and module power consumption. Updated Figure 14 to add Center of Mass for CYBLE-212006-01. *D 5705684 04/21/2017 Updated Cypress Logo and Copyright. 06/22/2017 Updated More Information. Updated Enabling Extended Range Feature to specifically state that there is no bypass mode of operation for this module. Updated Table 53, specifications RSXE1 and RSXE2 comment to latest CE specification - ETSI EN300 V2.1.1. Updated power supply upper voltage range for VDD signal throughout document to 3.6 V due to PA/LNA digital interface power level requirement: Updated Power Supply Connections and Recommended External Components. Updated Figure 8. Updated Table 4, Table 10 through Table 14, Table 15, Table 17, Table 22, and Table 23. Updated ISED on page 32 to latest ISED documentation requirements. Updated European Declaration of Conformity on page 33 to latest European regulatory requirements. Updated Sales page. *E 5782926 Document Number: 002-15631 Rev. *H Page 38 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Document Title: CYBLE-212006-01, CYBLE-202007-01, CYBLE-202013-11 EZ-BLETM Creator XR Module Document Number: 002-15631 Revision ECN Submission Date *F 6087230 03/07/2018 Updated document title as "EZ-BLETM Creator XR Module". Updated "PRoCTM" references to "Creator". Updated the links of QDID and Declaration ID in Module Description section as "https://launchstudio.bluetooth.com/ListingDetails/2184" Updated "PRoC BLE" to "PSoC 4 BLE" throughout the document. Updated More Information section. Updated the term "IC" to "ISED". Changed the Heading "Industry Canada (IC) Certification" to "ISED" and added a subtitle "Innovation, Science and Economic Development Canada (ISED) Certification". Updated Part Numbering Convention. Updated the Copyright year. *G 6380022 01/23/2019 Updated Environmental Specifications section. *H 7051348 12/23/2020 Changed from Bluetooth Low Energy (BLE) to Bluetooth Low Energy and BLE to Bluetooth LE throughout the document. Document Number: 002-15631 Rev. *H Description of Change Page 39 of 40 CYBLE-212006-01 CYBLE-202007-01 CYBLE-202013-11 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer's representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. PSoC(R) Solutions Products Arm(R) Cortex(R) Microcontrollers Automotive cypress.com/arm cypress.com/automotive Clocks & Buffers Interface cypress.com/clocks cypress.com/interface Internet of Things Memory cypress.com/iot cypress.com/memory Microcontrollers cypress.com/mcu PSoC cypress.com/psoc Power Management ICs Cypress Developer Community Community | Code Examples | Projects | Video | Blogs | Training | Components Technical Support cypress.com/support cypress.com/pmic Touch Sensing cypress.com/touch USB Controllers Wireless Connectivity PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP | PSoC 6 MCU cypress.com/usb cypress.com/wireless (c) Cypress Semiconductor Corporation, 2016-2020. This document is the property of Cypress Semiconductor Corporation and its subsidiaries ("Cypress"). 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"High-Risk Device" means any device or system whose failure could cause personal injury, death, or property damage. Examples of High-Risk Devices are weapons, nuclear installations, surgical implants, and other medical devices. "Critical Component" means any component of a High-Risk Device whose failure to perform can be reasonably expected to cause, directly or indirectly, the failure of the High-Risk Device, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from any use of a Cypress product as a Critical Component in a High-Risk Device. You shall indemnify and hold Cypress, its directors, officers, employees, agents, affiliates, distributors, and assigns harmless from and against all claims, costs, damages, and expenses, arising out of any claim, including claims for product liability, personal injury or death, or property damage arising from any use of a Cypress product as a Critical Component in a High-Risk Device. Cypress products are not intended or authorized for use as a Critical Component in any High-Risk Device except to the limited extent that (i) Cypress's published data sheet for the product explicitly states Cypress has qualified the product for use in a specific High-Risk Device, or (ii) Cypress has given you advance written authorization to use the product as a Critical Component in the specific High-Risk Device and you have signed a separate indemnification agreement. Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners. Document Number: 002-15631 Rev. *H Revised December 23, 2020 Page 40 of 40