Preliminary Datasheet HD74LS74A Dual D-type Positive Edge-triggered Flip-Flops (with Preset and Clear) R04DS0012EJ0400 (Previous: REJ03D0415-0300) Rev.4.00 Dec 21, 2011 Features Ordering Information Part Name Package Type Package Code (Previous Code) Package Abbreviation Taping Abbreviation (Quantity) HD74LS74AP DILP-14 pin PRDP0014AB-B (DP-14AV) P -- HD74LS74AFPEL SOP-14 pin (JEITA) PRSP0014DF-B (FP-14DAV) FP EL (2,000 pcs/reel) HD74LS74ARPEL SOP-14 pin (JEDEC) PRSP0014DE-A (FP-14DNV) RP EL (2,500 pcs/reel) Note: Please consult the sales office for the above package availability. Pin Arrangement 1CLR 1 1D 2 1CK 3 1PR 4 1Q 5 D 1Q 6 CLR Q GND 7 CK D PR CLR Q Q CK PR Q 14 VCC 13 2CLR 12 2D 11 2CK 10 2PR 9 2Q 8 2Q (Top view) Function Table Input Output Preset L H L H H Clear H L L H H Clock X X X D X X X H L Q H L H* H L Q L H H* L H H H L X Q0 Q0 H; high level, L; low level, X; irrelevant, ; transition from low to high level, Q0; level of Q before the indicated steady-state input conditions were established. Q0; complement of Q0 or level of Q before the indicated steady-state input conditions were established. *;This configuration is nonstable, that is, it will not persist when preset and clear inputs return to their inactive (high) level. R04DS0012EJ0400 Rev.4.00 Dec 21, 2011 Page 1 of 7 HD74LS74A Preliminary Absolute Maximum Ratings Item Supply voltage Input voltage Power dissipation Storage temperature Note: Symbol VCC VIN PT Tstg Ratings 7 7 400 -65 to +150 Unit V V mW C Voltage value, unless otherwise noted, are with respect to network ground terminal. Recommended Operating Conditions Item Supply voltage Output current Operating temperature Clock frequency Clock High Pulse width Clear Preset "H" Data Setup time "L" Data Hold time Note: Symbol VCC IOH IOL Topr fclock tw tw tsu tsu th Min 4.75 -- -- -20 0 25 25 20 20 5 Typ 5.00 -- -- 25 -- -- -- -- -- -- Max 5.25 -400 8 75 25 -- -- -- -- -- Unit V A mA C MHz ns ns ns ; The arrow indicates the rising edge. Electrical Characteristics (Ta = -20 to +75 C) Item Input voltage Symbol VIH VIL min. 2.0 -- typ.* -- -- max. -- 0.8 Unit V V VOH 2.7 -- -- V -- -- -- -- -- -- -- -- -- -- -- -- 0.5 0.4 20 40 40 20 IIL -- -- -- -- -- -- -- -- II -- -- -- -- IOS ICC** VIR Output voltage VOL Input current D Clear Preset Clock D Clear Preset Clock D Clear Preset Clock Short-circuit output current Supply current Input clamp voltage IIH V Condition VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, IOH = -400 A IOL = 8 mA VCC = 4.75 V, VIL = 0.8 V, VIH = 2 V IOL = 4 mA A VCC = 5.25 V, VI = 2.7 V -0.4 -0.8 -0.8 -0.4 mA VCC = 5.25 V, VI = 0.4 V -- -- -- -- 0.1 0.2 0.2 0.1 mA VCC = 5.25 V, VI = 7 V -20 -- -100 mA VCC = 5.25 V -- -- 4 -- 8 -1.5 mA V VCC = 5.25 V VCC = 4.75 V, IIN = -18 mA Notes: * VCC = 5 V, Ta = 25C ** With all output open, ICC is measured with the Q and Q outputs high in turn. At the time of measurement, the clock input is grounded. R04DS0012EJ0400 Rev.4.00 Dec 21, 2011 Page 2 of 7 HD74LS74A Preliminary Switching Characteristics (VCC = 5 V, Ta = 25C) Item Maximum clock frequency Propagation delay time Symbol fmax tPLH tPHL Inputs Outputs Clear, Clock or Preset Q, Q min. 25 -- typ. 33 13 max. 25 Unit MHz ns -- 25 40 ns Condition CL = 15 pF, RL = 2 k Timing Definition tw 3V 1.3 V 1.3 V 1.3 V Clock tsu th tsu 0V th 3V 1.3 V 1.3 V 1.3 V Data 0V "H" Data R04DS0012EJ0400 Rev.4.00 Dec 21, 2011 "L" Data Page 3 of 7 HD74LS74A Preliminary Testing Method Test Circuit 1. max, tPLH, tPHL (ClockQ, Q) 4.5V VCC Output Q Input RL PR P.G. Zout = 50 D Q Input CL Output Q P.G. Zout = 50 Notes: Load circuit 1 CK CLR Q Same as Load Circuit 1. 1. Test is put into the each flip-flop. 2. CL includes probe and jig capacitance. 3. All diodes are 1S2074(H). 2. tPHL, tPLH (Clear or Preset Q, Q) VCC Input Output Q P.G. Zout = 50 RL Load circuit 1 PR D Q CL Output Q Input CK CLR Q Same as Load Circuit 1. P.G. Zout = 50 Notes: 1. Test is put into the each flip-flop. 2. CL includes probe and jig capacitance. 3. All diodes are 1S2074(H). R04DS0012EJ0400 Rev.4.00 Dec 21, 2011 Page 4 of 7 HD74LS74A Preliminary Waveforms 1 tTHL tTLH tw(L) 90% 90% 1.3 V 1.3 V Clock 3V 1.3 V 10% 10% 0V tw(H) 3V D 0V tPLH tPHL VOH 1.3 V Q 1.3 V tPHL VOL tPLH Q VOH 1.3 V 1.3 V VOL Note: Clock input pulse; tTLH 15 ns, tTHL 6 ns, PRR = 1 MHz, duty cycle = 50% and for fmax, tTLH = tTHL 2.5 ns Waveforms 2 tTHL Clear tTLH 90% 1.3V 10% 3V 90% 1.3V 10% tw (clear) 25ns 0V tTHL tTLH 90% 1.3V 10% Preset 90% 1.3V 10% tw (preset) 25ns tPLH tPHL 1.3V Q 3V 0V VOH 1.3V tPLH VOL VOH Q Note: 1.3V 1.3V tPHL VOL Crear and presel input pulse; tTLH 15 ns, tTHL 6 ns, PRR = 1 MHz, R04DS0012EJ0400 Rev.4.00 Dec 21, 2011 Page 5 of 7 HD74LS74A Preliminary Package Dimensions JEITA Package Code P-DIP14-6.3x19.2-2.54 RENESAS Code PRDP0014AB-B Previous Code DP-14AV MASS[Typ.] 0.97g D 8 E 14 1 7 b3 A Z A1 Reference Symbol L e1 D E A A1 bp b3 c e Z L bp e c e1 ( Ni/Pd/Au plating ) JEITA Package Code P-SOP14-5.5x10.06-1.27 RENESAS Code PRSP0014DF-B *1 Previous Code FP-14DAV D Min Nom Max 7.62 19.2 20.32 6.3 7.4 5.06 0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 2.39 2.54 MASS[Typ.] 0.23g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F 14 Dimension in Millimeters 8 c HE *2 E bp Index mark Terminal cross section (Ni/Pd/Au plating) Z Reference Symbol 7 1 *3 e bp x M L1 A1 A S L y S Detail F R04DS0012EJ0400 Rev.4.00 Dec 21, 2011 D E A2 A1 A bp b1 c c1 HE e x y Z L L1 Dimension in Millimeters Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.34 0.40 0.20 2.20 0.46 0.15 0.20 0.25 0 7.50 0.50 7.80 1.27 0.70 1.15 8 8.00 0.12 0.15 1.42 0.90 Page 6 of 7 HD74LS74A JEITA Package Code P-SOP14-3.95x8.65-1.27 Preliminary RENESAS Code PRSP0014DE-A *1 Previous Code FP-14DNV MASS[Typ.] 0.13g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. F D 14 8 c *2 Index mark HE E bp Terminal cross section Reference Symbol (Ni/Pd/Au plating) 1 Z 7 *3 e bp x M A L1 A1 S y S R04DS0012EJ0400 Rev.4.00 Dec 21, 2011 L Detail F D E A2 A1 A bp b1 c c1 HE e x y Z L L1 Dimension in Millimeters Min Nom Max 8.65 9.05 3.95 0.10 0.14 0.34 0.40 0.25 1.75 0.46 0.15 0.20 0.25 0 5.80 0.40 6.10 1.27 8 6.20 0.25 0.15 0.635 0.60 1.27 1.08 Page 7 of 7 Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm the latest product information with a Renesas Electronics sales office. Also, please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website. 2. 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