Crystal Clock Oscillator 3.3V, PECL, FR4 Technical Data SEL481 / SEL482 Series Frequency Range: 200 MHz to 670 MHz Frequency Stability: *Aging: 20, 25, 50 or 100 ppm over all conditions: calibration tolerance, operating temperature, rated input (supply) voltage, load, *aging, shock and vibration. 30 days (7ppm in 10 years typical) Temperature Range: Operating: Storage: 0 to +70C or -40 to +85C -55 to +125C Supply Voltage (VCC): +3.3V PECL Supply Current: 85mA typ, 110mA max Output Drive: Description A crystal controlled, high frequency, highly stable oscillator, compatible with LVPECL logic. The output can be disabled to facilitate testing or combining with multiple clocks. The oscillator is packaged in leadless SMD FR4 SO20 available in four (4) or six (6) pad configurations (see part number builder) and achieves exceptional frequency stability. This oscillator is ideal for today's automated assembly environments. Applications & Features * SONET/SDH/DWDM linecards * XGigE NICs * Optical SOHO FTTC/FTTP OC-12 & STM-4 first/last mile networking * 3.3V PECL (LVPECL) capability * Frequency range from 200 to 670MHz * Disable output feature available * Economical and rugged FR4 package * Guaranteed long-term aging available, consult SaRonix for details * Designed for standard reflow and washing techniques * Available on tape & reel; 16mm tape, 500pcs per reel * See SEL393x Series for frequencies 200MHz * See SEL381x Series for comparable performance in a smaller ceramic 5x7mm package * See SDS3811 Series for new LVDS capability in a smaller ceramic 5x7mm package Symmetry: 45/55% max @ VBB or Complementary Outputs Crossing Rise & Fall Times: 550ps typ, 850ps max, 20% to 80% of waveform Logic 0: VCC -1.620V (-40 to 85C ) Logic 1: VCC -1.025V (0 to +70C), VCC -1.085V (-40 to 85C) Load: 50 to VCC -2V Accumulated Jitter: 10ps RMS (1-sigma) max, accumulated in 20,000 adjacent periods Phase Jitter: 3ps RMS (1-sigma) max, in 12kHz to 40MHz Freq. Band Total Jitter: 50ps peak-to-peak max in 100,000 random periods Output Enable/Disable for SEL481x (n/a for SEL4810): Output Enable Voltage: Level 0 or open Disable Voltage: Level 1 (Q & Q outputs disabled to High Impedance) Output Enable/Disable for SEL482x: Output Enable: Level 1 or open Output Disable: Level 0 (Q & Q outputs disabled to High Impdeance) Mechanical: Shock: Solderability: Terminal Strength: Vibration: Resistance to Soldering Heat: Solvent Resistance: Environmental: Thermal Shock: Moisture Resistance: MIL-STD-883, Method 2002, Condition B MIL-STD-883, Method 2003 MIL-STD-883, Method 2004, Condition D MIL-STD-883, Method 2007, Condition A MIL-STD-202, Method 210, Condition I or J MIL-STD-202, Method 215 MIL-STD-883, Method 1011, Condition A MIL-STD-833, Method 1004 Solder Reflow Guide ACTUAL SIZE Output Waveform www.pericom.com DS-235 REV A 08/02/04 Crystal Clock Oscillator 3.3V, PECL, FR4 Technical Data SEL481 / SEL482 Series Package Details Part Numbering Guide SEL48 1 0 B - 312.5000 (T) 1 = 3.3V PECL, Hi-True Disable 2 = 3.3V PECL, Hi-True Enable Frequency Stability AA = 20 ppm, 0 to +70C A = 25 ppm, 0 to +70C B = 50 ppm, 0 to +70C E = 50 ppm, -40 to +85C F = 100 ppm, -40 to +85C Connection Options Pad: 1 / 2 *0 = / 3 / 4 / 5 / 6 / VEE OUT VCC 1 = E/D VEE OUT VCC 2= OUT E/D VEE OUT N/C VCC 3 = OUT N/C VEE OUT E/D VCC OUT 4 = E/D N/C VEE OUT OUT VCC 5 = N/C E/D VEE OUT OUT VCC *Note: Use with SEL481X only Test Circuit* Packing Method (T) = Tape & Reel full reel increments only Blank = Bulk Series SaRonix, LVPECL FR4SO20 Recommended Land Pattern *All specfications subject to changes without notice www.pericom.com DS-235 REV A 08/02/04