ADVANCED MICRO DEVICES b4E D MM 0257525 OO45034 274 mMAMDL YOM? Ni [e) a esr Vee) al Am29240, Am29245~, and Am29243 Advanced High-Performance RISC Microcontrollers Micro Devices Am29240 MICROCONTROLLER BLOCK DIAGRAM A Paral-e! Port /, Clockf /, 4 BDREQ ContravStatus 6 STAT 44 5 Contra! , 8 tf 4DACK Lines MEMCLK | JTAG Lines GREOQ/GACK/ITDMA Parallel Port Dual Serial Ports Printer/Scanner Video Serializer/ Deserializer ROM Grip Selects ROM Controller PIA Controller / Controller Am29000 CPU Controller 4-Channel DMA Programmable /O Port interrupt Interrupts, Traps Controller DRAM Controller RASICAS 4l4 J y cc Timer/Counter PIA Address Chip Selects Bus LY v 32 Inatruction/Data Bus ; \Z Peripherals DISTINCTIVE CHARACTERISTICS Am29240 Microcontroller Completely integrated system for embedded applications Full 32-bit architecture 4-Kbyte two-way set-associative instruction cache 2-Kbyte two-way set-associative data cache Single cycle 32-bit multiplier for faster integer math; two-cycle Multiply Accumulate (MAC) function 16-entry on-chip Memory Management Unit (MMU) with one Translation Look-Aside Buffer 4-Gbyte virtual address space, 304-Mbyte physical space implemented Glueless system interfaces with on-chip wait state control 25 million instructions per second (MIPS) sus- tained at 33 MHz Four banks of ROM, each separately program- mable for 8-, 16-, or 32-bit interface Four banks of DRAM, each separately pro- grammable for 16- or 32-bit interface Single-cycle ROM burst-mode and DRAM page- mode access 4-channel double-buffered DMA controller with queued reload 6-port peripheral interface adapter 16-line programmable I/O port D-{ Publication #: 17787 Rev. B Amendment: /0 Issue Date: July 1993ADVANCED MICRO DEVICES b4E D Ml 0257525 OO4SO35 100 MANDI il ano ADVANCE INFORMATION Two serial ports (UARTs) Mm 3.3 V-5 V operating range Bidirectional parallel port controller mM CMOS technology/TTL compatible Ml Bidirectional bit serializer/deserializer . (video interface) Am29245 Microcontroller The low-cost Am29245 microcontroller is similar to the a Interrupt controller Am29240 microcontroller, without the data cache and @ Full- and double-speed internal clock 32-bit multiplier. It includes the following features: M Fully pipelined pipennee ; One serial port (UART) M Three-address instruction architecture . @ Two-channel DMA controller M 192 general purpose registers . . . HM 16-MHz operating frequency M@ 20-, 25-, and 33-MHz operating frequencies @ Traceable Cache instruction and data cache Am29243 Microcontroller tracing feature The Am29243 data microcontroller is similar to the @ IEEE Std. 1149.1-1990 (JTAG) compliant Stan- Am29240 microcontroller, without the video interface. It dard Test Access Port and includes the following additional features: Boundary Scan Architecture Ml Binary compatibility with all 29K Family micro- processors and microcontrollers @ Fully static system clock capabilities Bm DRAM parity @ 32-entry on-chip MMU with dual Transfation Look-Aside Buffers (TLBs) Am29245 MICROCONTROLLER BLOCK DIAGRAM A Parallel Port /, Clock/ 2 DREQ Control/Status J 6 STAT / 4 Controt 4 8 7 2DACK Lines MEMCLK | JTAG Lines GREG/GACK/TDMA ay 4 Parallel Port 2-Channel DMA ef oy Controller Am29000 CPU Controller Siglo | Programmable vo Serial Port 4K ICache /0 Port Printe/Seanner Ld ee Video Serializer/ Interrupt Interrupts, Traps Deserializer Controller wi ROM Ld we eee eee Chip Selects ROM RAS/CAS Controller DRAM Controller 4 / ccsscecees 4/4 / 4 PIA MMU Timer/Counter 4 4 Controller y | Zs / LA Y A6 24 | 32 PIA Address Instruction/Data DRAM Chip Selects Bus Bus } \Z i Peripherals | D-2 Am29240 Microcontroller SeriesADVANCED #ICRO DEVICES ADVANCE INFORMATION AMD zl Am29243 MICROCONTROLLER BLOCK DIAGRAM , Y's Clack/ V 4 DREQ Contra | 8 1 4DACK Lines GREQ/GACK/TDMA Paralle! Port Controller Dual Serial Ports JTAG ROM Chip Selects ROM Controller PIA Controller / Am29000 CPU 4-Channel DMA Controller Programmable 1/0 Port Interrupt Controller DRAM Controller Timer/Counter L 3 / As 24 PIA Address Chip Setecis Bus Ad a 32 Instrustion/Data Bus Peripherals GENERAL DESCRIPTION The Am29240 microcontroller series is an enhanced bus-compatible extension of the Am29200 RISC mi- crocontroller family, with two to four times the perfor- mance. The Am29240 microcontroller series includes the Am29240 microcontroller, the low-cost Am29245 microcontroller, and the Am29243 data microcontroller. The on-chip caches, MMU, faster integer math, and ex- tended DMA addressing capability of the Am29240 mi- crocontroller series allow the embedded systems de- signer to provide increasing levels of performance and software compatibility throughout a range of products (see Table 1). Based on a static low-voltage design, these CMOS- technology devices offer a complete set of system pe- ripherals and interfaces commonly used in embedded applications. Compared to CISC processors, the Am29240 microcontroller series offers better perfor- mance, more efficient use of low-cost memories, lower system cost, and complete design flexibility for the de- signer. Coupled with hardware and software develop- ment tools from AMD and the AMD Fusion2SK" part- ners, the Am29240 microcontroller series provides the embedded product designer with the cost and perfor- mance edge required by todays marketplace. Am29240 Microcontroller For general purpose embedded applications, such as mass storage controllers, communications, digital sig- nal processing, networking, industrial control, pen- based systems, and multimedia, the Am29240 micro- controlier provides a high-performance solution with a low total system cost. The memory interface of the Am29240 microcontroller provides even faster direct memory access than the Am29200 microcontroller. This performance improvement minimizes the effect of memory latency, allowing designers to use low-cost memory with simpler memory designs. On-chip instruc- tion and data caches provide even better performance for time-critical code. Other on-chip functions include: a ROM controfler, DRAM controller, peripheral interface adapter controller, DMA controller, programmable I/O port, parallel port controller, serial ports, and an interrupt controller. For a complete description of the technical features, on-chip peripherals, programming interface, and instruction set, please refer to the Am29240, Am29245, and Am29243 RISC Microcontrollers User's Manual and Data Sheet (order #17741C). Am29240 Microcontroller SeriesADVANCED MICRO DEVICES . zl AMD The Am29240 microcontroller is available in a 196-pin plastic quad flat-pack (PQFP) package. Of the available 196 pins, 150 are signal inputs and outputs, 36 are pow- er and ground connections, and 10 are no-connects. Am29245 Microcontroller The low-cost Am29245 microcontroller is designed for embedded applications in which cost and space constraints, along with increased performance require- ments, are primary considerations. In addition, the Am29245 microcontroller provides an easy upgrade path for Am29200 and Am29205 microcontroller- based products. The Am29245 microcontroller is available in a 196-pin POFP package. Of the available 196 pins, 144 are sig- nal inputs and outputs, 36 are power and ground con- nections, and 16 are no-connects. bYE D MM 0257525 0045037 Taa MAMDL ADVANCE INFORMATION Am29243 Microcontroller With DRAM parity support and a full MMU, the Am29243 data microcontroller is recommended for communications applications that require high-speed data movement and fast protocol processing in a fault- tolerant environment. Both the Am29243 and Am29240 microcontrollers sup- port fly-by DMA at 100 Mbytes/sec for LANs and switch- ing applications, and a two-cycle Multiply Accumulate function for DSP applications. The low power require- ments make either microcontroller a good choice for field-deployed devices. The Am29243 microcontroller is available in a 196-pin PQFP package. Of the available 196 pins, 150 are signal inputs and outputs, 36 are power and ground connec- tions, and 8 are no-connects. RELATED AMD PRODUCTS 29K Family Devices Part No. Description Am29000 Am29005 32-Bit RISC Microprocessor Low-Cost 32-Bit RISC Microprocessor with No MMU and No BTC Am29030 Am29035 Am29050 Am29200 Am29205 32-Bit RISC Microprocessor with 8-Kbyte Instruction Cache 32-Bit RISC Microprocessor with 4-Kbyte Instruction Cache 32-Bit RISC Microprocessor with On-Chip Floating Point 32-Bit RISC Microcontroller Low-Cost RISC Microcontroller with 16-Bit Bus Interface 29K Family Development Support Products Contact your local AMD representative for information on the complete set of development support tools. The following software and hardware development products are available on several hosts: m= Optimizing compilers for common high-level lan- guages Assembler and utility packages Source- and assembly-level software debuggers Target-resident development monitors Simulators Execution boards Third-Party Development Support Products The Fusion29K Program of Partnerships for Application Solutions provides the user with a vast array of products designed to meet critical time-to-market needs. Prod- ucts/solutions available from the AMD Fusion29K Part- ners include m Silicon products @ Software generation and debug tools @ Hardware development tools Board level products Laser printer solutions Multiuser, kernel, and real-time operating systems Graphics solutions Networking and communication solutions Manufacturing support Custom software consulting, support, and training Am29240 Microcontroller SeriesADVANCED MICRO DEVICES b4YE D MM 0257525 oO45038 T1T MMAMDL ADVANCE INFORMATION AMD zl Table D-1 Product ComparisonAm29200 Microcontroller Family FEATURE Am29205 Microcontroller Am29200 Microcontroller Am29245 Microcontroller Am29240 Microcontroller Am29243 Microcontroller instruction Cache 4 Kbytes 4 Kbytes 4 Kbytes Data Cache 2 Kbytes 2 Kbytes Integer Multiplier Software Software Software 32 x 32-bit 32 x 32-bit MMU 1TLB 16 Entry 1TLB 16 Entry 2 TLBs 32 Entry Data Bus Width Intemal External 32 bits 16 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits 32 bits ROM Interface Banks Width ROM Size (Max/Bank) Boot-up ROM Width Burst-mode access 3 16 bits only 4 Mbytes 16 bits Not Supported 4 8, 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported 4 8, 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported 4 8, 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported 4 16, 32 bits 16 Mbytes 8, 16, 32 bits Supported DRAM Interface Banks Width Size: 32-bit mode Size: 16-bit mode Video DRAM InitiaYBurst Access Cycles 4 16 bits only 8 Mbytes/bank Not Supported 3/2 4 16, 32 bits 16 Mbytes/bank 8 Mbytes/bank Supported 3/2 4 16, 32 bits 16 Mbytes/bank 8 Mbytes/bank Supported 2 4 16, 32 bits 16 Mbytes/bank 8 Mbytes/bank Supported ani 4 8, 16, 32 bits 16 Mbytes/pank 8 Mbytes/bank Not Supported afi On-Chip DMA Width (ext. peripherals) Externally Controlied GREQ/GACK Access GREQ/GACK Burst TDMA 8, 16 bits 1 Channel No No No 8, 16, 32 bits 2 Channels Yes No Yes 8, 16, 32 bits 2 Channels Yes Yes Yes 8, 16, 32 bits 4 Channels Yes Yes Yes 8, 16, 32 bits 4 Channels Yes Yes Yes Double-Frequency CPU Option No No No Yes Yes Low Voltage Operation No No Yes Yes PIA PIA Ports Data Width Cycles 2 8, 16 bits 3 6 8, 16, 32 bits 3 6 8, 16, 32 bits 2 6 8, 16, 32 bits 2 6 8, 16, 32 bits 2 Programmable YO Port Signals 8 16 16 16 16 Serial Ports Ports DSR DTR 1 Port Not Supported Not Supported 1 Port Supported Supported 1 Port Supported Supported 2 Ports 1 Port Supported 1 Port Supported 2 Ports 1 Port Supported 1 Port Supported Interrupt Controller External Interrupt Pins External Trap and Warn Pins 2 0 4 3 4 3 4 3 4 3 Parallel Port Controller Full-Word Transfer No Yes Yes Yes Yes Yes Yes Yes Yes JTAG Testing No Yes Yes Yes Yes Serializer/Deserializer Yes Yes Yes Yes No DRAM Parity No No No No Yes Pin Count and Package 100 PQFP 168 PQFP 196 PQFP 196 PQFP 196 POFP Processor Clock Rate 16 MHz 16, 20 MHz 16 MHz 20, 25, 33 MHz 20, 25, 33 MHz Am29240 Microcontroller SeriesADVANCED MICRO DEVICES t ano KEY FEATURES AND BENEFITS The Am29240 microcontroller series extends the line of RISC microcontrollers based on the 29K architecture, providing performance upgrades to the Am29205 and Am29200 microcontrollers. The RISC microcontroller product line allows users to benefit from the very high performance of the 29K architecture, while also capital- izing on the very low system cost made possible by the integration of processor and peripherals. The Am29240 microcontroller series expands the price/ performance range of systems that can be built with the 29K Family. The Am29240 microcontroller series is fully software compatible with the Am29000, Am29005, Am2903, Am29035, and Am29050 microprocessors, as well as the Am29200 and Am29205 microcontrollers. It can be used in existing 29K Family microcontroller ap- plications without software modifications. On-Chip Caches The Am29240 microcontroller series incorporates a 4-Kbyte, two-way instruction cache that supplies most processor instructions without wait states at the proces- sor frequency. For best performance, the instruction cache supports critical-word-first reloading with fetch- through, so that the processor receives the required instruction and the pipeline restarts with minimum delay. The instruction cache has a valid bit per word to mini- mize the reload overhead. All cache array elements are visible to software for testing and preload. The Am29240 and Am29243 microcontrollers incorpo- rate a2-Kbyte, two-way set-associative data cache. The data cache appears in the execute stage of the proces- sor pipeline, so that loaded data is available immediate- ly to the next instruction. This provides the maximum performance for loads without requiring load schedul- ing. The data cache performs critical-word-first, wrap- around, burst-mode refill with load-through. This mini- mizes the time the processor waits on external data as well as minimizing the reload time. The data cache uses a write-through policy with a two-entry write buffer. Byte, half-word, and word reads and writes are supported. All cache array elements are visible to software for testing and preload. Single-Cycle Multiplier The Am29240 and Am29248 microcontrollers incorpo- rate a full combinatorial multiplier that accepts two 32-bit input operands and produces a 32-bit result in a single cycle. The multiplier can produce a 64-bit result in two cycles. The multiplier permits maximum perfor- mance without requiring instruction scheduling, since the latency of the multiply is the same as the latency of other integer operations. High-performance multiplica- tion benefits imaging, signal processing, and state modeling applications. ADVANCE INFORMATION Complete Set of Common System Peripherals The Am29240 microcontroller series minimizes system cost by incorporating a complete set of system facilities commonly found in embedded applications, eliminating the cost of additional components. The on-chip functions include: a ROM controller, a DRAM controller, a peripher- al interface adapter, a DMA controller, a programmable I/O port, a parallel port, two serial ports, and an interrupt controller. A video interface is also included in the Am29240 and Am29245 microcontrollers for printer, scanner, and other imaging applications. These facilities allow many simple systems to be built using only the Am29240 microcontroller series, external ROM, and/or DRAM memory. ROM Controller The ROM controller supports four individual banks of ROM or other static memory, each with its own timing characteristics. Each ROM bank may be a different size and may be either 8, 16, or 32 bits wide. The ROM banks can appear as a contiguous memory area of up to 64 Mbyte in size. The ROM controller also supports byte, half-word, and word writes to the ROM memory space for devices such as flash EPROMs and SRAMs. DRAM Controller The DRAM controller supports four separate banks of dynamic memory. Each bank may bea different size and may be either 16 or 32 bits wide. The DRAM banks can appear as a contiguous memory area of up to 64 Mbyte in size. To further enhance the performance, the DRAM controller supports two-cycle accesses, with single- cycle page-mode and burst-mode accesses. Peripheral Interface Adapter The Peripheral Interface Adapter (PIA) permits glueless interfacing to as many as six external peripheral chips. The PIA allows for additional system features imple- mented by external peripheral chips. DMA Controller The DMA controller provides up to four channels for transferring data between the DRAM and internal or ex- ternal peripherals. The DMA channels are double buff- ered to relax constraints on reload time. 1/0 Port The I/O port permits direct access to 16 individually pro- grammable external input/output signals. Eight of these signals can be configured to cause interrupts. D-6 Am29240 Microcontroller SeriesADVANCED MICRO DEVICES bE D - 257525 OO4SO4O 578 MANDI ADVANCE INFORMATION AMD cl Parallel Port The parallel port implements a bidirectional IBM PC- compatible parallel interface to a host processor. Serial Port The serial port implements up to two full-duplex UARTs. Serializer/Deserializer The serializer/deserializer (video interface) permits direct connection to a number of laser marking engines, video displays, or raster input devices such as scanners. Interrupt Controller The interrupt controller generates and reports the status of interrupts caused by on-chip peripherals. Wide Range of Price/Performance Points To reduce design costs and time-to-market, the product designer can use the Am29200 microcontroller family and one basic system design as the foundation for an entire product line. From this design, numerous imple- mentations of the product at various levels of price and performance may be derived with minimum time, effort, and cost. The Am29240 RISC microcontroller series supports this capability through various combinations of on-chip caches, programmable memory widths, programmable wait states, burst-mode and page-mode access support, bus compatibility, and 29K Family software compatibility. A system can be upgraded without hardware and soft- ware redesign using various memory architectures. Within the Am29240 microcontroller series, the external interfaces operate at frequencies in the range of 16 to 25 MHz, and the processor operates at frequencies in the range of 16 to 33 MHz. The internal processor core can operate either at the interface frequency or twice this fre- quency. For example, the processor can operate at 33 MHz while the interface operates at 16.5 MHz. The ROM controller accommodates memories that are either 8, 16, or 32 bits wide, and the DRAM controller ac- commodates dynamic memories that are either 16 or 32 bits wide. This unique feature provides a flexible inter- face to low-cost memory as well as a convenient, flexible upgrade path. For example, a system can start with a 16-bit memory design and can subsequently improve performance by migrating to a 32-bit memory design. One particular advantage is the ability to add memory in half-megabyte increments. This provides significant cost savings for applications that do not require larger memory upgrades. The Am29200, Am29205, Am29240, Am29245, and Am29243 microcontrollers allow users to address an extremely wide range of cost performance points, with higher performance and lower cost than existing de- signs based on CISC microprocessors. Glueless System Interfaces The Am29240 microcontroller series also minimizes system cost by providing a glueless attachment to exter- nal ROMs, DRAMs, and other peripheral components. Processor outputs have edge-rate control that allows them to drive a wide range of load capacitances with low noise and ringing. This eliminates the cost of external logic and buffering. Bus- and Software-Compatibility Compatibility within a processor family is critical for achieving a rational, easy upgrade path. The Am29240 processors are all members of a bus-compatible series of RISC microcontrollers. All members of this family, the Am29205, Am29200, Am29240, Am29245, and Am29243 microcontrollers, allow improvements in price, performance, and system capabilities without re- quiring that users redesign their system hardware or software. Bus compatibility ensures a convenient up- grade path for future systems. The Am29240 microcontroller series is available in a 196-pin plastic quad flat-pack (PQFP) package. The Am29240 microcontroller series is signal-compatible with the Am29205 and the Am29200 microcontrollers. Moreover, the Am29240 microcontroller series is binary compatible with existing RISC microcontrollers and other members of the 29K Family (the Am29000, Am29005, Am29030, Am29035, and Am29050 micro- processors, as well as the Am29205 and Am29200 mi- crocontrollers). The Am29240 microcontroller series provides a migration path to low-cost, high-perfor- mance, highly integrated systems from other 29K Fam- ily members, without requiring expensive rewrites of application software. Complete Development and Support Environment Acomplete development and support environmentis vi- tal for reducing a product's time-to-market. Advanced Micro Devices has created a standard development en- vironment for the 29K Family of processors. In addition, the Fusion29K third-party support organization provides the most comprehensive customer/partner program in the embedded processor market. Advanced Micro Devices offers a complete set of hard- ware and software tools for design, integration, debug- ging, and benchmarking. These tools, which are avail- able now for the 29K Family, include the following: m High C@ 29K optimizing C compiler with assem- bler, linker, ANSI library functions, and 29K archi- tectural simulator m XRAY29K" source-level debugger @ MiniMON29K debug monitor @ Acomplete family of demonstration and develop- ment boards Am29240 Microcontroller Series D-7ADVANCED MICRO DEVICES ol AMD In addition, Advanced Micro Devices has developed a standard host interface (HIF) specification for operating system services, the Universal Debug Interface (UDI) for seamless connection of debuggers to iCEs and tar- get hardware, and extensions for the UNIX common ob- ject file format (COFF). This support is augmented by an engineering hotline, an on-line bulletin board, and field application engineers. PERFORMANCE OVERVIEW The Am29240 microcontroller series offers a significant margin of performance over CISC microprocessors in existing embedded designs, since the majority of pro- cessor features were defined for the maximum achiev- able performance at very low cost. This section de- scribes the features of the Am29240 microcontroller se- ries from the point of view of system performance. Instruction Timing The Am29240 microcontroller series uses an arithmetic/ logic unit, a field shift unit, and a prioritizer to execute most instructions. Each of these is organized to operate on 32-bit operands and provide a 32-bit result. All opera- tions are performed in a single cycle. The performance degradation of load and store opera- tions is minimized in the Am29240 microcontroller se- ries by overlapping them with instruction execution, by taking advantage of pipelining, by an on-chip data cache, and by organizing the flow of external data into the processor so that the impact of external accesses is minimized. Pipelining Instruction operations are overlapped with instruction fetch, instruction decode and operand fetch, instruction execution, and result write-back to the Register File. Pipeline forwarding logic detects pipeline dependencies and routes data as required, avoiding delays that might arise from these dependencies. Pipeline interlocks are implemented by processor hard- ware. Except for a few special cases, itis not necessary to rearrange programs to avoid pipeline dependencies, although this is sometimes desirable for performance. On-Chip Instruction and Data Caches On chip instruction and data caches satisfy most proces- sor fetches without wait states, even when the processor operates at twice the system frequency. The caches are pipelined for best performance. The reload policies mini- mize the amount of time spent waiting for reload, while optimizing the benefit of locality of reference. LYE DM 0257525 GO4SO4L 4O4 MANDI ADVANCE INFORMATION Burst-Mode and Page-Mode Memories The Am29240 microcontroller series directly supports burst-mode memories. The burst-mode memory sup- plies instructions at the maximum bandwidth, without the complexity of an external cache or the performance degradation due to cache misses. The processor can also use the page-mode capability of common DRAMs to improve the access time in cases where page-mode accesses can be used. This is partic- ularly useful in very low-cost systems with 16-bit-wide DRAMs, where the DRAM must be accessed twice for each 32-bit operand. Instruction Set Overview Ail 29K Family members employ a three-address instruction set architecture. The compiler or assembly- language programmer is given complete freedom to al- locate register usage. There are 192 general-purpose registers, allowing the retention of intermediate calcula- tions and avoiding needless data destruction. Instruc- tion operands may be contained in any of the general- purpose registers, and the results may be stored into any of the general-purpose registers. The Am29240 microcontroller series instruction set con- tains 117 instructions that are divided into nine classes. These classes are integer arithmetic, compare, logical, shift, data movement, constant, floating point, branch, and miscellaneous. The floating-point instructions are not executed directly, but are emulated by trap handlers. All directly implemented instructions are capable of executing in one processor cycle, with the exception of interrupt returns, loads, and stores. Data Formats The Am29240 microcontroller series defines a word as 32 bits of data, a half-word as 16 bits, and a byte as 8 bits. The hardware provides direct support for word-inte- ger (signed and unsigned), word-logical, word-boolean, half-word integer (signed and unsigned), and character data (signed and unsigned). Word-boolean data is based on the value contained in the most significant bit of the word. The values TRUE and FALSE are represented by the most significant bit values 1 and 0, respectively. Other data formats, such as character strings, are sup- ported by instruction sequences. Floating-point formats (single and double precision) are defined for the proces- sor; however, there is no direct hardware support for these formats in the Am29240 microcontroller series. Am29240 Microcontroller SeriesADVANCED MICRO DEVICES ADVANCE INFORMATION b4YE D MM O257525 OO4SO42 340 MANDI Amp of Protection The Am29240 microcontroller series offers two mutually exclusive modes of execution, the user and supervisor modes, that restrict or permit accesses to certain pro- cessor registers and external storage locations. The register file may be configured to restrict accesses fo supervisor-mode programs on a bank-by-bank basis. Memory Management Unit The Am29240 microcontroller series provides a memory-management unit (MMU) for translating virtual addresses into physical addresses. The page size for translation ranges from 1 Kbyte to 16 Mbyte in powers of four. The Am29245 and Am29240 microcontrolters each have a single, 16-entry TLB. The Am29243 micro- controller has dual 16-entry TLBs, each capable of map- ping pages of different size. Interrupts and Traps When an Am29240 microcontroller series takes an in- terrupt or trap, it does not automatically save its current state information in memory. This lightweight interrupt and trap facility greatly improves the performance of temporary interruptions such as simple operating-sys- tem calls that require no saving of state information. In cases where the processor state must be saved, the saving and restoring of state information is under the control of software. The methods and data structures used to handie interruptsand the amount of state savedmay be tailored to the needs of a particular system. Interrupts and traps are dispatched through a 256-entry vector table that directs the processor to a routine that handles a given interrupt or trap. The vector table may be relocated in memory by the modification of a proces- sor register. There may be multiple vector tables in the system, though only one is active at any given time. The vector table is a table of pointers to the interrupt and trap handlers, and requires only 1 Kbyte of memory. The processor performs a vector fetch every time an inter- rupt or trap is taken. The vector fetch requires at least three cycles, in addition to the number of cycles required for the basic memory access. DEBUGGING AND TESTING The Am29240 microcontroller series provides debug- ging and testing features at both the software and hardware levels. Software debugging is facilitated by the instruction trace facility and instruction breakpoints. Instruction tracing is accomplished by forcing the processor to trap after each instruction has been executed. Instruction breakpoints are implemented by the HALT instruction or by a software trap. The processor provides several additional features to assist system debugging and testing: m@ The Test/Development Interface is composed of a group of pins that indicate the state of the proces- sor and control the operation of the processor. A Traceable Cache feature permits a hardware-de- velopment system to track accesses to the on-chip caches, permitting a high level of visibility into pro- cessor operation. @ AnlEEE Std. 1149.1-1990 (JTAG) compliant Stan- dard Test Access Port and Boundary-Scan Archi- tecture. The Test Access Port provides a scan in- terface for testing processor and system hardware in a production environment, and contains exten- sions that allow a hardware-development system to control and observe the processor without interpos- ing hardware between the processor and system. Am29240 Microcontroller SeriesADVANCED MICRO DEVICES BYE D MM 0257525 OO4uSO43 287 MANDI iL AMD ADVANCE INFORMATION CONNECTION DIAGRAM Top Side View 196-Pin PQFP (Plastic Quad Fiat Pack) Package BSSSSSSsrBShGSAES Am29240 Microcontroller Series Notes:Pin 1 marked for orientation. Am29240 Microcontroller SeriesADVANCED MICRO DEVICES b4E D MM 0257525 0045044 113 MANDI ADVANCE INFORMATION AMD &h PQFP PIN DESIGNATION Sorted by Pin NUMBER PIN NO. PIN NAME PIN NO. PIN NAME PIN NO. PIN NAME PIN NO. PIN NAME Ves 50 Ves 99 Vee 148 Voc MEMCLK 51 Reserved 100 Reserved 149 Reserved MEMDRV 52 101 Reserved 150 PIO12 INCLK 53 102 A23 151 PiO11 ID31 54 103 A22 152 PIO10 {D30 55 DTRi 104 A21 163 PIOg ID29 56 105 A20 154 PIO8 ID28 57 106 155 PiO7 ID27 58 DSR 107 156 PIO6 ID26 59 108 157 PIO5 ID25 60 109 158 PIO4 ID24 61 110 159 Ves Vss 62 111 160 Veo Veo 63 112 161 PIO3 ID23 64 113 162 Pi02 ID22 65 114 163 PIO1 ID21 66 115 164 PIOO ID20 67 116 165 TDO IDi9 68 117 166 STAT2 ID18 69 118 167 STATI ID17 70 119 168 STATO ID16 71 120 169 VDAT2 Ves 72 121 x 170 PSYNC2 Ves 73 122 171 Ves ID15 74 123 172 Veg 1D14 75 124 173 GREQ 1D13 76 125 174 DREQB ID12 77 126 175 ID11 78 127 176 1D10 79 128 177 ID9 80 129 178 [D8 81 130 179 Voss 82 131 180 Ves 83 132 BOOTW 181 ID7 84 133 WAIT 182 ID6 85 134 PAUTOFD 183 ID5 86 135 PSTROBE 184 iD4 87 136 PWE 185 ID3 88 137 POE 186 ID2 89 138 PACK 187 ID1 90 139 PBUSY 188 IDO 91 140 Ves 189 Vsg 92 141 Ves 190 Voc 93 DACKB 142 PIO15 191 IDP3 1-3 94 DACKA 143 PIO14 192 IDP2 1.3 95 DACKD3 144 PIO13 193 IDP1 7.3 96 DACKC3 145 DREQD? 194 IDPO 1.3 97 Reserved 146 DREQC3 195 49 Ves 98 ss 147 Ves 198 ss Ol@O!I NI opont pe] ow] po] = oO _ _ _ ny _ Lo) _ bb ay a _ o = AJ oo o Ded So Nn = nN nD np a np a nN a NO a ND NI i) ao nN 8 @ = 8 a ao ow a & g 8 ao & th _ b Rh > @ oy Py > a > a > qq > a Notes: All values are typical and preliminary. 2. Defined as ano-connect on the Am29243 microcontroller. 1. Defined as a no-connect on the Am29240 microcontroller. 3. Defined as a no-connect on the Am29245 microcontroller, Am29240 Microcontroller Series D-11ADVANCED MICRO DEVICES b4YE D WM 0257525 OO4SO4S OST MANDI Lt amp ADVANCE INFORMATION PQFP PIN DESIGNATION - Sorted by Pin NAME PIN NAME PIN NO. PIN NAME PIN NO. PIN NAME PIN NO. PIN NAME PIN NO. AO 129 IDS 37 PIAWE 90 TRICE 79 Al 128 ID6 386 PIOO 164 TRAPO 177 A2 127 ID7 35 PIO1 163 TRAP1 178 AS 126 ID8 32 PIlO2 162 TRIST 195 A4 125 IDg 31 PIO3 161 TRST 189 AS 124 IDi0 30 PIO4 158 TXDA 59 A6 123 ID11 29 PIO5 157 TXDB? 53 A7 122 IDi2 28 PIO6 156 UCLK 57 A8 119 ID13 27 PIO7 155 Veo 1 AQ 118 ID14 26 PIO8 154 Veo 14 A10 117 ID15 25 PIO9 153 Veo 24 Alt 116 IDI6 22 PIO10 152 Veo 34 Al2 115 ID17 2i PIO11 151 Voc 44 A13 114 iD18 20 PIO12 150 Voc 50 Al4 113 ID19 19 PIO13 144 Veo 64 A15 112 ID20 18 PIO14 143 Voc 75 A16 109 ID21 17 PIO15 142 Voc 86 A17 108 ID22 16. POE 137 Veo 99 Ai8 107 ip23 15 PSTROBE 135 Voc 111 A19 106 1D24 12 PSYNC2 170 Veo 121 A20 105 ID25 11 PWE 136 Veo 131 A21 104 ID26 10 RASO 72 Voc 141 A22 103 1D27 9 RAS1 71 Voc 148 A23 102 iD28 8 RAS2 70 Voc 160 BOOTW 132 ID29 7 RAS3 69 Veo 172 BURST 66 ID380 6 Reserved 51 Veo 184 CASO 78 1D31 5 Reserved 52 VCLK2 186 CAS1 77 IDPO138 48 Reserved 97 VDAT2 169 CAS2 74 IDP11.3 47 Reserved 100 Vss 13 CAS3 73 IDP21s 46 Reserved 101 Ves 23 CNTLO 194 IDP3t8 45 Reserved 149 Ves 33 CNTL1 193 INCLK 4 RESET 192 Ves 43 DACKA 94 INTRO 179 ROMCSO 63 Vos 49 DACKB 93 INTRI1 180 ROMCS1 62 Vss 65 DACKC? 96 INTR2 181 ROMCS2 61 Ves 76 DACKD? 95 INTR3 182 ROMCS3 60 Vss 87 DREQA 175 LSYNC2 187 ROMOE 68 Veg 98 DREQB 174 MEMCLK 2 RSWE 67 Vs 110 DREQC? 146 MEMDRV 3 RXDA 56 Vss 120 DREQD? 145 PACK 138 RXDB? 54 Ves 130 DSRA 58 PAUTOFD 134 RAW 92 Vss 140 DTRA 55 PBUSY 139 STATO 168 Vss 147 GACK 81 PIACSO 89 STAT1 167 Ves 159 - GREQ 173 PIACSi 88 STAT2 166 Vss 171 IDO 42 PIACS2 85 TCK 190 Ves 183 ID4 41 PIACS3 84 TDO 165 Vss 196 ID2 40 PIACS4 83 TDI 191 WAIT 133 ID3 39 PIACS5 82 TDMA 176 WARN 185 ID4 38 PIAOE 91 TS 188 WE 80 Notes: All values are typical and preliminary. 2. Defined as ano-connect on the Am29243 microcontroller. 1. Defined as ano-connect on the Am29240 microcontroller. 3. Defined as a no-connect on the Am29245 microcontroller. D-12 Am29240 Microcontroller SeriesADVANCED MICRO DEVICES BYE D MM 0257525 OOSO4bL TIb MANDI ADVANCE INFORMATION Amp cl Am29240 MICROCONTROLLER LOGIC SYMBOL INCLK MEMDRV STAT2-STATO TRIST A23-A0 _ 2 CNTL1-CNTLO RESET +| WARN z> INTR3-INTRO ROMCS3-ROMCSO _24 TRAP 1TRAPO ROMOE WAIT RSW UR: Am29240 Microcontroller DREQD-DREQA DACKD-DACKA GREQ GAC| PSTROBE PBUSY PAUTOFD PACK POE PWE J ck *A] RXDB-RXDA TXDB-TXDA --pl DTRA DSRA -_ J UVCLK __b LSYNC i TCK _ > TDI > TMS _ FH OTRST MEMCLKVDAT_PSYNC TDMA PIO15-PIOO _1D31-IDo fll] & e Am29240 Microcontroller SeriesADVANCED MICRO DEVICES ADVANCE INFORMATION Am29245 MICROCONTROLLER LOGIC SYMBOL Ll amp LUE DM 0257525 OO4SO4? 922 MMAMDI INCLK MEMDRV TRIST CNTL1-CNTLO RESET WARN INTR3-INTRO TRAP1-TRAPO WAIT DREQB-DREQA GREQ PAUTOFD UCLK RXDA DTRA VCLK LSYNC TCK TDI TRST MEMCLK VDAT STAT2-STATO A23-A0] RW ROMCS3-ROMCSO ROMOE Am29245 Microcontroller PSYNC TDMA _PIOi5-PIO0__!D31-IDO I | Lf) % & Am29240 Microcontroller SeriesADVANCED MICRO DEVICES bB4UE D MM 0257525 ADVANCE INFORMATION GQO4S5048 669 MBAMDI amp Am29243 MICROCONTROLLER LOGIC SYMBOL > > > 2, > > __ = A a z> 9 _2 4. _ > > __ _> CNTL1I-CNTLO ESET ROMCS3-ROMCS0 Am29243 Microcontroller DREQD-DREQA GREQ PSTROBE PAUTOFD UCLK RXDB-RXDA DTRA TCK TDI TMS TRST MEMCLK TDMA _Pi015-PIO0 1D31-IDO STAT2-STATO A23~A0 RW ROMOE RSWE BURST RAS3-RASO CAS3-CASO PBUSY PACK POE PWE TXDB-TXDA DSRA IDP3-IDPO |! Lee vg Am29240 Microcontroller SeriesADVANCED MICRO DEVICES ~ BUE D W@ 0257525 OO45049 77S MBANDSL ZA amp ADVANCE INFORMATION ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. Valid order numbers are formed by a combination of the elements below. OPTIONAL PROCESSING Blank = with Carrier Ring (PQB 196) \W = Trimmed and Formed (PQB 196) TEMPERATURE RANGE C = Commercial (To = 0C to +85C) PACKAGE TYPE K=196-Lead Plastic Quad Flat Pack (PQFP) SPEED OPTION -33 = 33 MHz 25 = 25 MHz -20 = 20 MHz DEVICE NUMBER/DESCRIPTION ~16 = 16 MHz Am29240 RISC Microcontroller Am29243 RISC Data Microcontroller Am29245 RISC Microcontroller Valid Combinations AM29240-20 Valid Combinations ANM?29240-25 Valid Combinations lists configurations AM29240-33 KC, KC\W planned to be supported in volume. Consult the local AMD sales office to confirm AM29243-20 availability of specitic valid combinations, to check on newly released combinations, and AM29243-25 KC, KC\W to obtain additional data on AMD standard AM29243-33 military grade products. AM2924516 KC, KC\W Am29240 Microcontroller SeriesADVANCED MICRO DEVICES : BYE D MM 0257525 o045050 41 ADVANCE INFORMATION ? MANDI AMD @l ABSOLUTE MAXIMUM RATINGS Storage Temperature Voltage on any Pin with Respect to GND 65C to +125C 0.5 V to Veo +0.5 V OPERATING RANGES Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maxi- mum ratings for extended periods may affect device reliability. Commercial (C) Devices Case Temperature (Te) Supply Voltage (Vcc) 0C to +85C +4.75 V to +5.25 V Operating ranges define those limits between which the func- tionality of the device is guaranteed. DC CHARACTERISTICS over COMMERCIAL operating ranges Symbol Parameter Description Advance Information Test Conditions Min Max Vit Input Low Voltage 0.5 0.8 Vin Input High Voltage 2.4 Voc +05 VILINCLK INCLK Input Low Voltage 0.5 0.8 VinINCLK INCLK Input High Voltage 2.0 Vec +0.5 Vo. Output Low Voltage for All Outputs except MEMCLK loL = 3.2 mA 0.45 Vou Output High Voltage for All Outputs except MEMCLK lou =400 pA It Input Leakage Current (Note 1) 0.45 V < Vin S$ Voc 0.45 V +10 or +10/-200 lLo Output Leakage Current 0.45 V s VourS Voc -0.45 V +10 lecop Operating Power-Supply Current with respect to MEMCLK Voc = 5.25 V, Outputs Floating; Holding RESET active at 25 MHz 14 Voic MEMCLK Output Low Voltage lotg = 20 MA 0.6 Voue MEMCLK Output High Voltage lore =~20 mA Voc -0.6 losq@np MEMCLK GND Short Circuit Current Veg =5.0V 100 mA losvec MEMCLK Vec Short Circuit Current Voc =5.0V 100 mA Notes: The Low input leakage current for the inputs C(NTL1-GNTLO, INTR 3-INTRO, TRAP1-TRAPO, DREQD-DREQA, TCK, TDI, TRST, TMS, RESET, WARN, MEMORV, WAIT, and TRIST is -200 1A. These pins have internal pull-up resistors. CAPACITANCE Symbo! Parameter Description Advance Information Test Conditions Min Max Cin Input Capacitance Cincik INCLK Input Capacitance CMEMCLK MEMCLK Capacitance Cour Output Capacitance Cuo V/O Pin Capacitance 15 15 fC = 10 MHz 20 20 20 Notes: Limits guaranteed by characterization. Am29240 Microcontroller SeriesADVANCED MICRO DEVICES 7 amp ADVANCE INFORMATION SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges BYE D MM 0257525 0045051 353 MANDI Symboi Parameter Description Test Conditions (Note!) Advance Information 25 MHz Min Max INCLK Period (=0.5T) Note? INCLK High Time Note? INCLK Low Time Note? INCLK Rise Time Note? INCLK Fall Time Note2 MEMCLK Delay from INCLK MEMCLK Output? MEMCLK Delay (MD) from INCLK MEMCLK Input MEMCLK Period (T) MEMCLK Input MEMCLK High Time MEMCLK Output MEMCLK Input MEMCLK Low Time MEMCLK Output? MEMCLK Input MEMCLK Rise Time Note? MEMCLK Fall Time Note? Synchronous Output Valid Delay Rise Time from MEMCLK PIO15-PIO0, STAT2-STATO, and PIACSS-PIACSO MEMCLK Output!A 11 MEMCLK Input 13+ (MD-5) RAS3-RASO MEMCLK Ouput!8 17 MEMCLK Input? 174 (MD-5) All others MEMCLK Output? 10 12+ (MD-5) Synchronous Output Valid Delay Fall Time from MEMCLK MEMCLK Input! PIO15~PIO0, STAT2-STATO, and PIACSS-PIACSO MEMCLK Output! 10 MEMCLK Input! 124 (MD-5) RAS3-RASO MEMCLK Output!B 16 MEMCLK Input! All others MEMCLK Output? 9 16+ (MD-5) MEMCLK Input! 11+ (MD-5) Synchronous Output Disable Delay from MEMCLK Rise MEMCLK Output 10 MEMCLK Input 12+ (MD-5) Synchronous Input Setup Time to MEMCLK Available CAS Access Time (TcasT setup) Parity Disabled* Parity Enabled* Am29240 Microcontroller SeriesADVANCED MICRO DEVICES BYE D MM G257525 0045052 297 MANDI ADVANCE INFORMATION AMD &t Advance Information Parameter Description Test tent 25 MHz Unit Min Max Synchronous Input Hold Time to MEMCLK Synchronous Input Hold Time to GAS3-CAS0 Asynchronous Input Pulse Width LSYNC and PSYNC All others UCLK Period Note? VCLK Period Note? UCLK High Time Note2 VCLK High Time Note? UCLK Low Time Note2 VCLK Low Time Note? UCLK Rise time Note? VGCLK Rise time Note? 22 UCLK Fall Time Note? VGLK Fall Time Note? 23 Synchronous Output Valid Delay from VCLK Rise and | Note Fall 24 Input Setup Time to VCLK Rise and Fall Notes.7 25 Input Hold Time to VCLK Rise and Fall Notes.7 Notes: 1. Alloutputs driving 80 pF, measured at Vo, = 1.5 V and Vow = 1.5 V. For higher capacitance: A. Add 1-ns output delay per 15 pF loading up to 150-pF total. 8. Add 1-ns output delay per 25 pF loading up to 300-pF total. In order to meet the setup time (fasn) from A23-A0 to RAS3-RASO for DRAM, the capacitance loading of A23-A0 must net exceed the capacitance loading of RAS3-RASO by more than 150 pF. C. Add 1-ns output delay per 25 pF loading up to 300-pF total. . INCLK, VCLK, and UCLK can be driven with TTL inputs. UCLK must be tied High if it is unused. . MEMCLK can drive an extemal load of 100 pF. . Applies to 1D31-ID0 and IDP3-IDPO for DRAM page-mode accesses only. . LSYNC and PSYNC minimum width is two bit-times. A bit-time is one period of the internal video clock, which is determined by the CLKDIV field in the Video Control Register and VCLK. . Active VCLK edge depends on the CLKI bit in the Video Control Register. . LSYNC and PSYNC can be treated as synchronous signals by meeting the setup and hold times, though the synchronization delay still applies. SO/ClOl/OlSOlAlOl]A!oO Am29240 Microcontroller SeriesADVANCED MICRO DEVICES b4E D - 0257525 GoO4SoOS3 12b MBANDI ZA amp ADVANCE INFORMATION SWITCHING WAVEFORMS MEMCLK SYNCHRONOUS OUTPUTS SYNCHRONOUS INPUTS Note: Applies to 1D31-IDO and IDP3-IDPO for DRAM page-mode accesses only. ASYNCHRONOUS INPUTS UCLK, VCLK VCLK-RELATIVE OUTPUTS Note: Video Timing may be relative to VCLK falling edge VCLK-RELATIVE INPUTS : @5) if CLK = 1. Note: During AC testing, all inputs are driven at Vi, = 0.45 V, Vin = 2.4 V. D-20 Am29240 Microcontroller SeriesADVANCED MICRO DEVICES bYE D MM 0257525 OO4SOS4 Ob2 MANDI ADVANCE INFORMATION AMD &4 SWITCHING TEST CIRCUIT VL Am29240 Microcontroller Pin Under Test T% VREF = 1.5V lon = 400 pA THERMAL CHARACTERISTICS PQFP Package Thermal Resistance C/Watt Parameter Qja Junction-to-Ambient Q@jc Junction-to-Case 8ca Case-to-Ambient Am29240 Microcontroller SeriesADVANCED MICRO DEVICES LYE D MM 0257525 | oousoss TT4 mm ANDI GN amp ADVANCE INFORMATION PHYSICAL DIMENSIONS PGB 196 Plastic Quad Flat Pack; Trimmed and Formed (Measured in inches) le 1,495 > L 4.475 1.505 _ 1.345 1.485 ae 1.355 7 A) --= A =~ HAM / | Pin 98 | a1 Tt =S Pin 494-2>= == | = | | 0.008 i ! | +358 0.012 oe - - _ - - LE ~ -__- __- = 1.475 1.485 | | | | | Pin 11D | te Bote 8 +e Pin 147 | , = | CO WW Wt | Pin 196 Top View roesces ryt 0.160 ' my f 0.025 Basic 0.180 1 ] ((( Gy WY ii See Detail A s vue vee rr = L..-../f : REP 0,025 0.035 Side View Notes: For reference only. BSC is an ANSI standard for Basic Space Centering. 04/9/93 MB D-22 Am29240 Microcontroller SeriesADVANCED MICRO DEVICES b4YE D MM 0257525 0045056 935 MANDI ADVANCE INFORMATION AMD &t PHYSICAL DIMENSIONS (continued) PQB 196Plastic Quad Flat Pack; Trimmed and Formed (continued) 0.045 x 45 Chamfer wot tT L = if | 9.036MIN | lug 0.046 MAX | | | jt__ .065 REF __ ! Detail A Notes: . All dimensions are in inches. 2. Dimensions do not include mold protrusion. . Coplanarity of all leads will be within 0.004 inches measured from the seating plan. Coplanarity is measured per specification 06-500. 4. Deviation from lead-tip true position shall be within 40.003 inches. 5. Half span (center of package to lead-tip) shall be within +0.0085 inches. Am29240 Microcontroller SeriesBYE D WM 0257525 0045057 4671 MANDI a amp ADVANCE INFORMATION PHYSICAL DIMENSIONS (continued) Solder Land Recommendations196-Lead PQFP 1.500 > ys mmm ULUVUVTATIVADU NUON UTUENTUUUAVITTTTUTTITNTTTIMT] A ole 0.012 | fe 0.025 Am29240 Microcontroller SeriesADVANCED MICRO DEVICES BYE D = 0257525 0045056 708 MANDI ADVANCE INFORMATION AMD &A PHYSICAL DIMENSIONS (continued) PGB 196 Plastic Quad Flat Pack; Molded Carrier Ring (outer ring measured in millimeters) 55.87 56.13 51.37 51.63 45.15 45.25 1.495 1.505 55.50 | 47.87 | 42.15 | 1.345 55.90 | 48.13 | 42.25 | 1.355 55.87 | 51.37 | 45.15 | 1.495 56.13 | 51.63 | 45.25 | 1.505 0.920 1.50 DIA Top View See Detail Y = A L | | \ | acnacthoc-chacoucusceacasce=cuucuanceesuaceconscaacoacg \ Avg ares 2.00 4.80 180 \/[1_| / | + S 1 20009A Side View C183 See Detail B 06/10/93 MRH Notes: For reference only. Am29240 Microcontroller SeriesADVANCED MICRO DEVICES - bYE D MM 0257525 00450559 b44 MANDI G4 amp ADVANCE INFORMATION PHYSICAL DIMENSIONS (continued) ; PQB 196Plastic Quad Flat Pack with Molded Carrier Ring (continued) .008 4 le 012 a +,025 .707 x 45 (4X) | | Sharp Measured +.025 1.8 x 45 | | Sharp Measured 08 TE oe 016 Detail A Basic etal A . q .650 Pitch _ 1.85 Sharp Measured Detail Y Co 55 | 1 | | J 450Typ p fe Detail B 0 ne A opel KXGT 1.50 70 1.27 Top Gate ee xe 1.13 16 v 1.50 K z SX 402 Section C-C 2.73 *0% .045 X 45 Chamfer Bottom Gate Section E-E Section D-D Am29240 Microcontroller SeriesADVANCED MICRO DEVICES BYE D MM 0257525 OO4SObO 3bb MMANDL ADVANCE INFORMATION AMD PHYSICAL DIMENSIONS (continued) PQB 196Plastic Quad Flat Pack with Molded Carrier Ring (continued) Notes: 1. All dimensions and tolerances conform to ANSI Y14.5M-1982. . Controlling dimensions: package is measured in inches and ring is measured in millimeters. . These dimensions do not include mold protrusion. Allowable mold protrusion is 0.2 mm per side. . These dimensions include mald mismatch and are measured at the parting line. . Dimensions are centered about centerline of fead material. . These dimensions are from the outside edge to the outside edge of the test points. . There are six locating holes in the ring. -B and C datum holes are used for trim form and excise of the molded package only. Holes Zi and Z2 are used for electrical testing only. . This area is reserved for vacuum pickup on each of the four corners of the ring and must be flat within 0.025 mm. No ejector pins in this area. . Datum ~A- surface for seating in socket applications. . Pin one orientation with respect to carrier ring as indicated. Trademarks Copyright 1993 Advanced Micro Devices, inc. All rights reserved. AMD is a registered trademark; 29K, Am29000, Am29005, Am29030, Am29035, Am29050, Am29200, Am29205, Am29240, Am29243, Am29245, Traceable Cache, MiniMON29K, and XRAY29K are trade- marks; and Fusion29K is a servicemark of Advanced Micro Devices, Inc. High Cis aregistered trademark of MetaWare, Inc. Productnames usedin this publication are for identification purposes only and may be trademarks of thelr respective companigs. Am29240 Microcontroller Series D-27