Description
The A1642 is an optimized Hall effect sensing integrated
circuit that provides a user-friendly solution for true zero-speed
digital ring-magnet sensing in two-wire applications. This small
package can be easily assembled and used in conjunction with
a wide variety of target shapes and sizes.
The integrated circuit incorporates dual Hall effect elements
and signal processing that switches in response to differential
magnetic signals created by ring magnet poles. The circuitry
contains a sophisticated digital circuit to reduce system offsets,
to calibrate the gain for air-gap–independent switchpoints,
and to achieve true zero-speed operation. Signal optimization
occurs at power-on through the combination of offset and
gain adjust and is maintained throughout the operating time
with the use of a running-mode calibration. The running-mode
calibration allows immunity to environmental effects such as
micro-oscillations of the target or sudden air gap changes.
The regulated current output is configured for two-wire
applications and the A1642 is ideally suited for obtaining
speed and duty cycle information in ABS (antilock braking
systems). The 1.5 mm spacing between the dual Hall elements
is optimized for fine pitch ring-magnet–based configurations.
For applications requiring sensing of rotating ferrous gears and
targets, refer to the Allegro ATS series of products. The package
is lead (Pb) free, with 100% matte tin leadframe plating.
A1642LKN-DS, Rev. 4
Features and Benefits
Running mode calibration for continuous optimization
Single chip IC for high reliability
Internal current regulator for 2-wire operation
Precise duty cycle signal over operating temperature range
Large operating air gaps
Automatic Gain Control (AGC) for air gap independent
switchpoints
Automatic Offset Adjustment (AOA) for signal processing
optimization
True zero-speed operation
Undervoltage lockout
Wide operating voltage range
Wide-lead package suitable for welding external
components directly to the package leads or for welding
the device to a leadframe.
Two-Wire True Zero-Speed Miniature Differential
Peak-Detecting Sensor IC with Continuous Calibration
Package: 4-pin SIP (Suffix KN)
Functional Block Diagram
Not to scale
A1642
VCC
Automatic Offset
Control AOA DAC
Hall
Amplifier
AGC DAC
Gain
Tracking
DAC Peak Hold
Gain Control
Internal Regulator
Test Signals
GND
Test
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
2
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
1234
Pin-out Diagram
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
Supply Voltage VCC 28 V
Reverse Supply Voltage VRCC –18 V
Operating Ambient Temperature TARange L –40 to 150 ºC
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC
Terminal List Table
Number Name Function
1 VCC Connects power supply to chip
2 NC No connection
3 Test Float or tie to GND
4 GND Ground connection
Selection Guide
Part Number ICC Range Packing*
A1642LKNTN-I1-T 4.0 mA Low to 16.0 mA High
Tape and reel, 13-inch reel
4000 pieces per reel
A1642LKNTN-I2-T 5.9 mA Low to 16.8 mA High
A1642LKNTN-I3-T 5.9 mA Low to 16.0 mA High
*Contact Allegro for additional packing options
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
3
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
OPERATING CHARACTERISTICS TA and VCC within speci cation, unless otherwise noted
CHARACTERISTIC Symbol Test Conditions Min. Typ.1Max. Units
ELECTRICAL CHARACTERISTICS
Supply Voltage2VCC Operating; TJ < 165°C 4.0 24 V
Undervoltage Lockout VCC(UV) VCC 0 5 V and 5 0 V 4.0 V
Supply Zener Clamp Voltage VZICC = ICC(max) + 3 mA; TA = 25°C 28 V
Supply Zener Current IZTest conditions only; VZ = 28 V ICC(max)+
3 mA mA
Supply Current
ICC(Low)
A1642LKN-I1 4.0 6.0 8.0 mA
A1642LKN-I2, A1642LKN-I3 5.9 7.0 8.4 mA
ICC(High)
A1642LKN-I1, A1642LKN-I3 12.0 14.0 16.0 mA
A1642LKN-I2 11.8 14.0 16.8 mA
Supply Current Ratio ICC(High)/
ICC(Low)
Ratio of high current to low current 1.85 3.05
Reverse Battery Current IRCC VRCC = –18 V –5 mA
POWER-ON STATE CHARACTERISTICS
Power-On State3POS t > tPO –I
CC(High) ––
Power-On Time4tPO fOP < 100 Hz 1 2 ms
OUTPUT STAGE
Output Slew Rate5dI/dt RLOAD = 100 Ω, CLOAD = 10 pF 14 mA/μs
Continued on the next page.
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
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Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
OPERATING CHARACTERISTICS (continued) TA and VCC within speci cation, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ.1Max. Units
SWITCHPOINT CHARACTERISTICS
Operating Speed fOP 0 8,000 Hz
Analog Signal Bandwidth BW Equivalent to f – 3 dB 20 40 kHz
Operate Point BOP
Transitioning from ICC(High) to ICC(Low); positive peak
referenced; AG < AGMAX
120 mV
Release Point BRP
Transitioning from ICC(Low) to ICC(High); negative peak
referenced; AG < AGMAX
120 mV
CALIBRATION
Initial Calibration CI
Quantity of rising output (current) edges required for
accurate edge detection 3 Edge
DAC CHARACTERISTICS
Allowable User-Induced Differential
Offset Operating within speci cation ±90 G
FUNCTIONAL CHARACTERISTICS6
Operating Signal Range7Sig Operating within speci cation 30 1000 G
Minimum Operating Signal SigOP(min)
Output switching (no missed edges); DC not
guaranteed 20 G
1Typical values are at TA = 25°C and VCC = 12 V. Performance may vary for individual units, within the speci ed maximum and minimum limits.
2Maximum voltage must be adjusted for power dissipation and junction temperature; see Power Derating section.
3Please refer to Device Operation section.
4Power-On Time includes the time required to complete the internal automatic offset adjust. The DAC is then ready for peak acquisition.
5dI is the difference between 10% of ICC(Low) and 90% of ICC(High), and dt is the time period between those two points.
Note: dI/dt is dependent upon the value of the bypass capacitor, if one is used.
6Functional characteristics valid only if magnetic offset is within the speci ed range for Allowable User Induced Differential Offset.
7In order to remain in speci cation, the magnetic gradient must induce an operating signal greater than the minimum value speci ed. This includes the
effect of target wobble.
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
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Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Characteristic Data
Supply Current (High) versus Am bient Temperat ur e
(I1 Trim)
12
13
14
15
16
-50 0 50 100 150
T
A
(°C)
I
CC(HIGH)
(mA)
Vcc (V)
24
12
4
Supply Current (High) v ersus Supply Voltage
(I1 Trim)
12
13
14
15
16
0 5 10 15 20 25
V
CC
(V)
T
A
(°C)
-40
25
85
150
Supply Curr ent (Low) versus Am bient Temperature
(I1 Trim)
4
5
6
7
8
-50 0 50 100 150
T
A
(°C)
Vcc (V)
24
12
4
Supply Current (Low) v ersus Supply Voltage
(I1 Trim)
4
5
6
7
8
0 5 10 15 20 25
V
CC
(V)
I
CC(LOW)
(mA)
T
A
(°C)
-40
25
150
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
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Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ΔTEAGIN (mm)
ΔTEAGOUT (mm)
Allowable Air Gap Movement from TEAGCAL*
-0.2
0
0.2
0.4
0.6
0.8
1.0
1.2
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
Characteristic Allowable Air Gap Movement
The colored area in the chart above shows the region of allow-
able air gap movement within which the device will continue
output switching. The output duty cycle is wholly dependent on
the target’s magnetic signature across the air gap range of move-
ment, and may not always be within speci cation throughout the
entire operating region (to AG(OPmax)).
The axis parameters for the chart are de ned in the drawings
below. As an example, assume the case where the air gap is
allowed to vary from the nominal installed air gap (TEAGCAL
,
panel a) within the range de ned by an increase of TEAGOUT =
0.35 mm (shown in panel b), and a decrease of TEAGIN =
0.65 mm (shown in panel c). This case is plotted with an “x” in
the chart above.
TEAGIN
A1642
A1642
TEAGOUT
(a)
A1642 TEAGCAL
(b) (c)
*Data based on study performed using spur gear reference target 60-0, and
applicable to ring magnet targets with similar magnetic characteristics.
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
7
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
CHARACTERISTIC Symbol TEST CONDITIONS* Value Units
Package Thermal Resistance RθJA Single-layer PCB with copper limited to solder pads 170 ºC/W
*Additional information is available on the Allegro Web site.
1300
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
Power Dissipation versus Ambient Temperature
(RQJA = 170 ºC/W)
20 40 60 80 100 120 140 160 180
Ambient Temperature, T
A
C)
Power Dissipation, P
D
(mW)
6
7
8
9
2
3
4
5
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
20 40 60 80 100 120 140 160 180
Ambient Temperature, TA (ºC)
Maximum Allowable V
CC
(V)
Power Derating Curve
(R
QJA
= 170 ºC/W)
VCC(min)
VCC(max)
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
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Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Sensing Technology
The single-chip differential Hall effect sensor IC possesses two
Hall elements, which sense the magnetic pro le of the ring mag-
net simultaneously, but at different points (spaced at a 1.5 mm
pitch), generating a differential internal analog voltage, VPROC ,
that is processed for precise switching of the digital output
signal.
The Hall IC is self-calibrating and also possesses a temperature
compensated ampli er and offset compensation circuitry. Its
voltage regulator provides supply noise rejection throughout the
operating voltage range. Changes in temperature do not greatly
affect this device due to the stable ampli er design and the offset
compensation circuitry. The Hall transducers and signal process-
ing electronics are integrated on the same silicon substrate, using
a proprietary BiCMOS process.
Target Profiling
An operating device is capable of providing digital informa-
tion that is representative of the magnetic features on a rotating
target. The waveform diagram shown in gure 3 presents the
automatic translation of the magnetic pro le to the digital output
signal of the device.
Output Polarity
Figure 3 shows the output polarity for the orientation of target
and device shown in gure 2. The target direction of rota-
tion shown is: perpendicular to the leads, across the face of the
device, from the pin 1 side to the pin 4 side. This results in the
device output switching from high, ICC(High), to low ICC(Low),
as the leading edge of a north magnetic pole passes the device
face. In this con guration, the device output current switches to
its low polarity when a north pole is the target feature nearest to
the device. If the direction of rotation is reversed, then the output
polarity inverts.
Note that output voltage polarity is dependent on the position of
the sense resistor, RSENSE (see gure 4).
Target
(Ring Magnet)
(Pin 1 Side)(Pin 4 Side)
Hall IC
Element Pitch
Hall Element 1
Hall Element 2
NN
S
S
of Device
Rotating Target
Branded Face
14
Functional Description
Figure 1. Relative motion of the target is detected by the dual Hall ele-
ments mounted on the Hall IC.
Figure 2. This left-to-right (pin 1 to pin 4) direction of target rotation
results in a low output signal when a magnetic north pole of the target is
nearest the face of the device (see gure 3). A right-to-left (pin 4 to pin
1) rotation inverts the output signal polarity. Figure 4: Voltage pro les for high side and low side two-wire sensing.
Figure 3. Output Pro le of a ring magnet target for the polarity
indicated in gure 2.
A1642
VCC
GND
VCC
ICC
1
4
VOUT(L)
A1642
VCC
GND
VSUPPLY
1
4
VOUT(H)
ICC
RSENSE
RSENSE
I
OUT
V
OUT(H)
V+
V
OUT(L)
V+
I+
NN
SS
Representative
Differential
Magnetic Profile
Target
Ring Magnet
Device Electrical
Output Profile, I
OUT
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
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Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Automatic Gain Control (AGC)
This feature allows the device to operate with an optimal internal
electrical signal, regardless of the air gap (within the AG speci-
cation). During calibration, the device determines the peak-to-
peak amplitude of the signal generated by the target. The gain of
the device is then automatically adjusted. Figure 5 illustrates the
effect of this feature.
Automatic Offset Adjust (AOA)
The AOA is patented circuitry that automatically compensates
for the effects of chip, magnet, and installation offsets. (For
capability, see Dynamic Offset Cancellation, in the Operat-
ing Characteristics table.) This circuitry is continuously active,
including both during calibration mode and running mode,
compensating for offset drift. Continuous operation also allows
it to compensate for offsets induced by temperature variations
over time.
Digital Peak Detection
A digital DAC tracks the internal analog voltage signal VPROC,
and is used for holding the peak value of the internal analog
signal. In the example shown in gure 6, the DAC would rst
track up with the signal and hold the upper peak’s value. When
VPROC drops below this peak value by BOP, the device hyster-
esis, the output would switch and the DAC would begin tracking
the signal downward toward the negative VPROC peak. Once the
DAC acquires the negative peak, the output will again switch
states when VPROC is greater than the peak by the value BRP. At
this point, the DAC tracks up again and the cycle repeats. The
digital tracking of the differential analog signal allows the device
to achieve true zero-speed operation.
Figure 5. Automatic Gain Control (AGC). The AGC function corrects for
variances in the air gap. Differences in the air gap affect the magnetic
gradient, but AGC prevents that from affecting device performance, as
shown in the lowest panel.
NN
SS
AG
Small
AG
Large
AG
Small
AG
Large
Internal Differential
Analog Signal
Response, with AGC
Internal Differential
Analog Signal
Response, without AGC
V+
V+
Target
Ring Magnet
Figure 6: Peak Detecting Switchpoint Detail
Device
Output Current
B
RP
Internal
Differential
Analog Signal
V+
I+
B
OP
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
10
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Power Supply Protection
The device contains an on-chip regulator and can operate over
a wide VCC range. For devices that need to operate from an
unregulated power supply, transient protection must be added
externally. For applications using a regulated line, EMI/RFI pro-
tection may still be required. Contact Allegro Microsystems for
information on the circuitry needed for compliance with various
EMC speci cations. Refer to gure 7 for an example of a basic
application circuit.
Undervoltage Lockout
When the supply voltage falls below the undervoltage lockout
voltage, VCC(UV), the device enters Reset, where the output state
returns to the Power-On State (POS) until suf cient VCC is sup-
plied. ICC levels may not meet datasheet limits when
VCC < VCC(min).
Assembly Description
This device is integrally molded into a plastic body that has been
optimized for size, ease of assembly, and manufacturability.
High operating temperature materials are used in all aspects of
construction.
Diagnostics
The regulated current output is con gured for two wire appli-
cations, requiring one less wire for operation than do switches
with the more traditional open-collector output. Additionally,
the system designer inherently gains diagnostics because there is
always output current flowing, which should be in either of two
narrow ranges, shown in figure 8 as ICC(High) and ICC(Low). Any
current level not within these ranges indicates a fault condi-
tion. If ICC > ICC(High)max, then a short condition exists, and if
ICC < ICC(low)min, then an open condition exists. Any value of ICC
between the allowed ranges for ICC(High) and ICC(Low) indicates a
general fault condition.
Figure 7: Typical Application Circuit
A1642
VCC
GND
V+
0.01
1
4
µF
ECU
Pins 2 and 3 floating
R
100 Ω
SENSE
CBYP
Figure 8: Diagnostic Characteristics of Supply Current Values
ICC(High)max
ICC(High)min Range for Valid ICC(HIGH)
Range for Valid ICC(LOW)
ICC(Low)max
ICC(Low)min
0
+mA
Short
Fault
Open
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
11
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
DEVICE OPERATION
Each operating mode is described in detail below.
Power-On
When power (VCC > VCC(Min)) is applied to the device, a short
period of time is required to power the various portions of the
IC. During this period, the A1642 powers-on in the high current
state, ICC(High). After power-on, there are conditions that could
induce a change in the output state. Such an event could be
caused by thermal transients, but would require a static applied
magnetic eld, proper signal polarity, and particular direction
and magnitude of internal signal drift.
Initial Offset Adjust
The device initially cancels the effects of chip, magnet, and
installation offsets. Once offsets have been cancelled, the digital
tracking DAC is ready to track the signal and provide output
switching. The period of time required for both Power-On and
Initial Offset Adjust is de ned as the Power-On Time.
Calibration Mode
The calibration mode allows the device to automatically select
the proper signal gain and continue to adjust for offsets. The
AGC is active, and selects the optimal signal gain based on the
amplitude of the VPROC signal. Following each adjustment to
the AGC DAC, the Offset DAC is also adjusted to ensure the
internal analog signal is properly centered.
During this mode, the tracking DAC is active and output switch-
ing occurs, but the duty cycle is not guaranteed to be within
speci cation.
Running Mode
After the Initial Calibration period, CI, establishes a signal gain,
the device moves to Running mode. During Running mode, the
device tracks the input signal and gives an output edge for every
peak of the signal. AOA remains active to compensate for any
offset drift over time.
The A1642 incorporates a novel algorithm for adjusting the
signal gain during Running mode. This algorithm is designed
to optimize the VPROC signal amplitude in instances where the
magnetic signal “seen” during the calibration period is not repre-
sentative of the amplitude of the magnetic signal for the installed
device air gap (see gure 9).
Device Electrical
Output, I
OUT
Internal Differential
Signal, V
PROC
B
RP
B
OP
B
OP
B
RP
1 2 3 4 5
Figure 9: Operation of Running Mode Gain Adjust.
Position 1. The device is initially powered-on. Self-calibration occurs.
Position 2. Small amplitude oscillation of the target sends an erroneously small differential signal to the device. The ampli-
tude of VPROC is greater than the switching hysteresis (BOP and BRP), and the device output switches.
Position 3. The calibration period completes on the third rising output edge, and the device enters Running mode.
Position 4. True target rotation occurs and the correct magnetic signal is generated for the installation air gap. The estab-
lished signal gain is too large for the target’s rotational magnetic signal at the given air gap.
Position 5. Running Mode Calibration corrects the signal gain to an optimal level for the installation air gap.
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
12
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Power Derating
Example: Reliability for VCC at TA =
150°C, package KN
(I1 trim), using 1-layer PCB
Observe the worst-case ratings for the device, speci cally:
RJA
=
170 °C/W, TJ(max) =
165°C, VCC(max)
=
24
V, and
ICC(max) = 16 mA.
Calculate the maximum allowable power level, PD(max). First,
invert equation 3:
Tmax = TJ(max) – TA = 165
°C
150
°C = 15
°C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = Tmax ÷ RJA = 15°C ÷ 170 °C/W = 88.2 mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(max) = 88.2 mW ÷ 16 mA = 5.5 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages VCC(est).
Compare VCC(est) to VCC(max). If VCC(est) VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
RJA. If VCC(est) VCC(max), then operation between VCC(est)
and VCC(max) is reliable under these conditions.
The device must be operated below the maximum junction
temperature of the device, TJ(max). Under certain combinations of
peak conditions, reliable operation may require derating sup-
plied power or improving the heat dissipation properties of the
application. This section presents a procedure for correlating
factors affecting operating TJ. (Thermal data is also available on
the Allegro MicroSystems Web site.)
The Package Thermal Resistance, RJA, is a gure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity,
K, of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case, RJC, is
relatively small component of RJA. Ambient air temperature,
TA, and air motion are signi cant external factors, damped by
overmolding.
The effect of varying power levels (Power Dissipation, PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
PD = VIN × IIN (1)
T = PD × RJA (2)
TJ = TA + ΔT (3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 6 mA, and RJA = 170 °C/W, then:
P
D = VCC × ICC = 12 V × 6 mA = 72 mW
T = PD × RJA = 72 mW × 170 °C/W = 12.2°C
T
J = TA + T = 25°C + 12.2°C = 37.2°C
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding
TJ(max), at a selected RJA and TA.
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
13
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Package KN, 4-Pin SIP
2431
1.27 NOM
3.19 NOM
8.12 REF
0.38
REF
2.16
MAX
6.00
REF
45°
45°
A
0.84 REF
B
B
C
C
Gate and tie bar burr area
Dambar removal protrusion (8X)
A
For Reference Only; not for tooling use (reference DWG-9015)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
Standard Branding Reference View
N = Device part number
Y = Last two digits of year of manufacture
W = Week of manufacture
Mold Ejector
Pin Indent
Branded
Face
YYWW
NNNN
1
5.21 +0.08
–0.05
0.38 +0.06
–0.03
3.43 +0.08
–0.05
1.03 +0.08
–0.05
0.41 +0.07
–0.05
14.74 ±0.51
1.55 ±0.05
Branding scale and appearance at supplier discretion
E1 E2
1.85
1.32
1.50
D
D
Active Area Depth 0.43 mm REF
Hall elements (E1,E2), not to scale
E
E
E E
Two-Wire True Zero-Speed Miniature Dif ferential
Peak-Detecting Sensor IC with Continuous Calibration
A1642
14
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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Allegro MicroSystems, LLC reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to
permit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, LLC assumes no re spon si bil i ty for its
use; nor for any in fringe ment of patents or other rights of third parties which may result from its use.
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Revision History
Revision Revision Date Description of Revision
Rev. 4 January 16, 2012 Update product variants offered