UC3843BP-D08-T - Unisonic Technologies Co., Ltd.

UNISONIC TECHNOLOGIES CO., LTD

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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HIGH PERFORMANCE

CURRENT MODE

CONTROLLERS

 DESCRIPTION

The UTC UC3842B/3843B are specifically designed for off-line

and dc-to-dc converter applications offering the designer a

cost-effective solution with minimal external components.

The UC3842B has UVLO thresholds 16V (on) and 10V(off),

ideally suited for off-line converters. The UC3843B is tailored for

lower voltage applications having UVLO thresholds of 8.4V(on)

and 7.6V(off).

 FEATURES

* Trimmed oscillator for precise frequency control

* Oscillator frequency guaranteed at 250kHz

* Current mode operation to 500kHz

* Automatic feed forward compensation

* Latching PWM for cycle-by-cycle current limiting

* Internally trimmed reference with undervoltage lockout

* High current totem pole output

* Undervoltage lockout with hysteresis

* Low startup and operating current

 ORDERING INFORMATION

Ordering Number Package Packing

Lead Free Halogen Free

UC3842BL-D08-T UC3842BP-D08-T DIP-8 Tube

UC3842BL-S08-R UC3842BP-S08-R SOP-8 Tape Reel

UC3842BL-S08-T UC3842BP-S08-T SOP-8 Tube

UC3843BL-D08-T UC3843BP-D08-T DIP-8 Tube

UC3843BL-S08-R UC3843BP-S08-R SOP-8 Tape Reel

UC3843BL-S08-T UC3843BP-S08-T SOP-8 Tube

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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 PIN CONFIGURATION

1

2

3

4

8

7

6

5

VCC

OUTPUTCS

RTCT

VREF

COMP

VFB

GND

 PIN DESCRI PTIONS

PIN NO. PIN NAME I/O DESCRIPTION

1 COMP O Error amp output to provide loop compensation maintaing VFB at 2.5V

2 VFB I

Error amp inverting input, The non-inverting input of error amp is 2.5V band

gap reference

3 CS I Current sense input to PWM control gate drive of output

4 RTCT I To set oscillator frequency and maximum output duty cycle

5 GND Power ground

6 OUTPUT O To direct drive power MOSFET

7 VCC Power supply

8 VREF O 5V regulated output provides charging current for CT through RT

 BLOCK DIAGRAM

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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 ABSOLUTE MAXIMUM RATINGS(TA=25℃, unless otherwise specified)

PARAMETER SYMBOL RATINGS UNIT

Total Power Supply and Zener Current (ICC + IZ) 30 mA

Output Current, Source or Sink (Note 2) IO 1.0 A

Output Energy (capacitive load per cycle) W 5.0 μJ

Current Sense and Voltage Feedback Inputs VIN -0.3 ~ +5.5 V

Error Amp. Output Sink Current IO

(

SINK

)

10 mA

Power Dissipation DIP-8 PD 1250 mW

SOP-8 800 mW

Operating Junction Temperature TJ +150

℃

Operating Temperature TOPR 0 ~ +70 ℃

Storage Temperature TSTG -65 ~ +150 ℃

Note: 1.

2.

Absolute maximum ratings are those values beyond which the device could be permanently damaged.

Absolute maximum ratings are stress ratings only and functional device operation is not implied.

Maximum Package power dissipation limits must be observed.

 THERMAL DATA

PARAMETER SYMBOL RATINGS UNIT

Junction to Ambient DIP-8 θJA 100 °C/W

SOP-8 156 °C/W

 ELECTRICAL CHARACTERISTICS

(0℃ ≤TA≤70℃, VCC=15V (Note 1), RT=10k, CT=3.3nF, unless otherwise specified)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT

REFERENCE SECTION

Output Voltage VREF IO=1.0mA, TJ =25℃ 4.9 5.0 5.1 V

Line Regulation ΔVLINE V

CC=12V ~ 25V 2.0 20 mV

Load Regulation ΔVLOAD I

O=1.0mA ~ 20mA 3.0 25 mV

Temperature Stability TS 0.2

mV/℃

Total Output Variation VREF Line, Load, Temperature 4.82 5.18 V

Output Noise Voltage eN F=10kHz ~ 10Hz, TJ =25℃ 50 uV

Long Term Stability S TA=125℃,1000Hrs 5 mV

Output Short Circuit Current ISC -30 -85 -180 mA

OSCILLATOR SECTION

Frequency F

TJ =25℃ 49 52 55

kHz

TA=0℃ ~ 70℃ 48 56

TJ =25℃ (RT=6.2k,CT=1.0nF) 225 250 275

Frequency Change with Voltage ΔfOSC/ΔV 12 ≤ VCC ≤25V 0.2 1.0 %

Frequency Change with

Temperature ΔfOSC/ΔT 0℃ ≤TA ≤70℃ 0.5 %

Oscillator Voltage Swing

(Peak to Peak) VOSC 1.6 V

Discharge Current IDISCHG TJ =25℃ 7.8 8.3 8.8 mA

0℃ ≤TA ≤70℃ 7.6 8.3 8.8

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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 ELECTRICAL CHARACTERISTICS (Cont.)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT

ERROR AMPLIFIER SECTION

Voltage Feedback Input VFB Vo=2.5V 2.42 2.50 2.58 V

Input Bias Current II

(

BIAS

)

V

FB=5.0V -0.1 -2.0 μA

Open Loop Voltage Gain GVO 2 ≤VO≤4V 65 90 dB

Unity Gain Bandwidth GBW TJ =25℃ 0.7 1.0 MHz

Power Supply Rejection Ratio PSRR I2V≤VCC≤25V 60 70 dB

Output Sink Current ISINK V

O=1.1V,VFB =2.7V 2.0 12 mA

Output Source Current ISOURCE V

O=5.0V,VFB=2.3V -0.5 -1.0 mA

Output Voltage Swing High State VOH V

FB=2.3V, RL=15k to GND 5.0 6.2 V

Output Voltage Swing Low State VOL V

FB=2.7V, RL=15k to VREF 0.8 1.1 V

CURRENT SENSE SECTION

Current Sense Input Voltage Gain GV (Note 2, 3) 2.85 3.0 3.15 V/V

Maximum Current Sense Input

Threshold VI(THR) (Note 2) 0.9 1.0 1.1 V

Power Supply Rejection Ratio PSRR 12≤Vcc≤25V (Note 2) 70 dB

Input Bias Current II

(

BIAS

)

-2 -10 μA

Propagation Delay tD

(

IN/OUT

)

Current Sense Input to Output 150 300 ns

OUTPUT SECTION

Output Low Voltage VOL ISINK=20mA 0.1 0.4 V

ISINK=200mA 1.6 2.2 V

Output High Voltage VOH ISOURCE=20mA 13 13.5 V

ISOURCE=200mA 12 13.4 V

Output Voltage with UVLO

Activated VOL (UVLO) VCC=6.0V,ISINK=1.0mA 0.1 1.1 V

Output Voltage Rise Time tR TJ =25℃,CL=1nF 50 150 ns

Output Voltage Fall Time tF TJ =25℃,CL=1nF 50 150 ns

UNDER-VOLTAGE LOCKOUT SECTION

Startup Threshold VTHR UC3842B 14.5 16 17.5 V

UC3843B 7.8 8.4 9 V

Min. Operating Voltage After

Turn-on(VCC) VCC(MIN) UC3842B 8.5 10 11.5 V

UC3843B 7.0 7.6 8.2 V

PWM SECTION

Duty Cycle MAX DC 94 96 %

MIN 0 %

Total DEVICE

Power Startup Supply Current ICC+IC VCC=6.5V for UC3843B

VCC=14V for UC3842B 0.3 0.5 mA

Power Operating Supply Current ICC+IC Note 1 12 17 mA

Power Supply Zener Voltage VZ I

CC=25mA 30 36 V

Note: 1.

2.

Adject VCC above the Startup threshold before setting to 15V.

This parameter is measured at the latch trip point with VFB=0V.

3. Comparator gain is defined as : GV ΔV Output Compensation

Δ

V Current Sense Input

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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 TYPICAL APPLICATION CIRCUIT

Open Loop Test Circuit

All of the parameters are not all tested in production, although been guaranteed. The timing and bypass capacitors

must be connected to Pin 5 in a single point ground very closely. To sample the oscillator waveform, the transistor

and 5kΩ potentiometer are used, and also can apply an adjustable ramp to ISENSE Pin.

1

2

3

4

8

7

6

5

UTC

UC3842B/3843B

COMP

VFB

ISENSE

RT/CTGND

OUTPUT

VC

VREF

A

E/A

ADJUST

1K

4.7K

ISENSE

ADJUST

5K

4.7K

2N

2222 RT

100K

CT0.1

0.1

OUTPUT

1K/1W

V1

VREF

Under Voltage Lockout

Under-Voltage Lock-Out: the output driver is biased to a high impedance state. To prevent activating the power

switch with output leakage current, Pin 6 should be shunted to ground with a bleeder resistor.

Error Amp Configuration

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 APPLICATION INFORMATION(Cont.)

Current Sense Circuit

Peak current (IS) is equaled:

IS(MAX)=1.0V/RS

There should be a small RC filter to suppress switch transients.

Oscillator Waveforms and Maximum Duty Cycle

8

5

4

VREF

RT/RC

GND

CT

RT

INTERINAL CLOCK

V4

LARGE RT

SMALL CT

LARGE RT

CT (Oscillator timing capacitor) can be charged by VREF through RT and discharged by an internal current source.

At discharge time, the internal clock signal blanks the output to the low. Both oscillator frequency and maximum duty

cycle can be determined by Selection of RT and CT. All charge and discharge times can be calculated by the next

formulas:

tC=0.55 RT CT

tD=RTCTIN⎟

⎟

⎠

⎞

⎜

⎝

⎛

−

40.0063R

2.70.0063R

T

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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 APPLICATION INFORMATION(Cont.)

Shutdown Techniques

8

3

(Deadtime vs CT RT> 5kΩ)

SHUTDOWN

330Ω

500Ω

TO CURRENT

SENSE-RESISTOR

1KΩ

VREF

ISENSE

SHUTDOWN

1COMP

The UTC UC3842B’s shutdown can be accomplished by two ways: raise Pin 3 above 1V; or pull Pin 1 below a

voltage two diode drops above ground. Either method can cause the PWM comparator’s output to be high. Because

the PWM latch is reset dominant, the output will remain low until the next clock cycle after the shutdown condition at

Pins 1 and/or 3 is removed.

Slope Compensation

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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 TYPICAL CHARACTERISTICS

Discharge Current, Idischg (mA) Timing Resistor, RT(KΩ)

CT=200pF

CT=1.0nF

CT=5.0nF

CT=10nF

Percent Output Deadtime, %DT.

Maximum Output Duty Cycle, Dmax (%)

20mV/DIV

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 TYPICAL CHARACTERISTICS(Cont.)

UC3842B/3843B LINEAR INTEGRATED CIRCUIT

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 TYPICAL CHARACTERISTICS(Cont.)

25

20

15

10

5

0010203040

Supply Current, ICC (mA)

Fig. 16 Supply Current vs. Supply Voltage

Supply Voltage, VCC (V)

RT=10k

CT=3.3nF

VFB=0V

ISENSE=0V

TA=25°C

UC3842B

UC3843B

VCC=15V

CL=1.0nF

TA=25°C

10

%

90

%

50ns/DIV

Fig. 14 Output Waveform

100mA/DIV 20V/DIV

VCC=30V

CL=15pF

TA=25°C

Supply Current, ICC Output Voltage, VO

Fig. 15 Output Cross Conduction

0 200 400 600 800

0

10

20

30

-20

-10

0

Output Saturation Voltage, VSAT (V)

Output Load Current, IOUT (mA)

Fig. 13 Output Saturation Voltage Versus Load Current

VCC

TA=-55°C

VCC=15V

80µs Pulsed Load

120Hz Rate

TA=25°

C

GND

Sink Saturation

(Load to VCC)

TA=-

55°C

Source Saturation

(Load to Ground)

TA=25°C

UTC assumes no responsibility for equipment failures that result from using products at values that

exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or

other parameters) listed in products specifications of any and all UTC products described or contained

herein. UTC products are not designed for use in life support appliances, devices or systems where

malfunction of these products can be reasonably expected to result in personal injury. Reproduction in

whole or in part is prohibited without the prior written consent of the copyright owner. The information

presented in this document does not form part of any quotation or contract, is believed to be accurate

and reliable and may be changed without notice.