Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3Vdc – 14Vdc input; 0.75Vdc to 5.5Vdc Output; 16A Output Current
* UL is a registered trademark of Underwriters Laboratories, Inc.
† CSA is a registered trademark of Canadian Standards Association.
‡ VDE is a trademark of Verband Deutscher Elektrotechniker e.V.
** ISO is a registered trademark of the International Organization of Standards
Document No: DS04-022 ver. 1.22
PDF name: superlynx_II_sip_12v_ds.pdf
Applications
Distributed power architectures
Intermediate bus voltage applications
Telecommunications equipment
Servers and storage applications
Networking equipment
Enterprise Networks
Latest generation IC’s (DSP, FPGA, ASIC) and
Microprocessor powered applications
Features
Compliant to RoHS EU Directive 2002/95/EC (-Z
versions)
Compliant to ROHS EU Directive 2002/95/EC with
lead solder exemption (non-Z versions)
Flexible output voltage sequencing EZ-
SEQUENCETM
Delivers up to 16A output current
High efficiency – 92% at 3.3V full load (VIN = 12.0V)
Small size and low profile:
50.8 mm x 12.7 mm x 8.1 mm
(2.00 in x 0.5 in x 0.32 in)
Low output ripple and noise
Constant switching frequency (300KHz)
High Reliability:
Calculated MTBF = 9.2M hours at 25oC Full-load
Programmable Output voltage
Line Regulation: 0.3% (typical)
Load Regulation: 0.4% (typical)
Temperature Regulation: 0.4 % (typical)
Remote On/Off
Remote Sense
Output overcurrent protection (non-latching)
Wide operating temperature range (-40°C to 85°C)
UL* 60950-1Recognized, CSA† C22.2 No.
60950-1-03 Certified, and VDE‡ 0805:2001-12
(EN60950-1) Licensed
ISO** 9001 and ISO 14001 certified manufacturing
facilities
Description
Austin SuperLynxTM II 12V SIP (single in-line package) power modules are non-isolated dc-dc converters that can
deliver up to 16A of output current with full load efficiency of 92% at 3.3V output. These modules provide a precisely
regulated output voltage programmable via an external resistor from 0.75Vdc to 5.0Vdc over a wide range of input
voltage (VIN = 8.3 – 14Vdc). Austin SuperLynxTM II has a sequencing feature, EZ-SEQUENCETM that enable
designers to implement various types of output voltage sequencing when powering multiple modules on board. Their
open-frame construction and small footprint enable designers to develop cost- and space-efficient solutions.
RoHS Compliant
EZ-SEQUENCETM
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 2
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are
absolute stress ratings only, functional operation of the device is not implied at these or any other conditions in
excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for
extended periods can adversely affect the device reliability.
Parameter Device Symbol Min Max Unit
Input Voltage All VIN -0.3 15 Vdc
Continuous
Sequencing voltage All Vseq -0.3 VIN,max Vdc
Operating Ambient Temperature All TA -40 85 °C
(see Thermal Considerations section)
Storage Temperature All Tstg -55 125 °C
Electrical Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature
conditions.
Parameter Device Symbol Min Typ Max Unit
Operating Input Voltage Vo,set ≤ 3.63 VIN 8.3 12.0 14.0 Vdc
Vo,set > 3.63 VIN 8.3 12.0 13.2 Vdc
Maximum Input Current All IIN,max 10 Adc
(VIN= VIN, min to VIN, max, IO=IO, max )
Input No Load Current Vo = 0.75Vdc IIN,No load 40 mA
(VIN = VIN, nom, Io = 0, module enabled) Vo = 5.0Vdc IIN,No load 100 mA
Input Stand-by Current All IIN,stand-by 2 mA
(VIN = VIN, nom, module disabled)
Inrush Transient All I2t 0.4 A2s
Input Reflected Ripple Current, peak-to-peak
(5Hz to 20MHz, 1μH source impedance; VIN=10V
to 14V, IO= IOmax ; See Test configuration section)
All 30 mAp-p
Input Ripple Rejection (120Hz) All 30 dB
CAUTION: This power module is not internally fused. An input line fuse must always be used.
This power module can be used in a wide variety of applications, ranging from simple standalone operation to being
part of a complex power architecture. To preserve maximum flexibility, internal fusing is not included, however, to
achieve maximum safety and system protection, always use an input line fuse. The safety agencies require a fast-
acting fuse with a maximum rating of 15 A (see Safety Considerations section). Based on the information provided in
this data sheet on inrush energy and maximum dc input current, the same type of fuse with a lower rating can be
used. Refer to the fuse manufacturer’s data sheet for further information.
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 3
Electrical Specifications (continued)
Parameter Device Symbol Min Typ Max Unit
Output Voltage Set-point All VO, set -2.0 VO, set +2.0 % VO, set
(VIN=IN, min, IO=IO, max, TA=25°C)
Output Voltage All VO, set -2.5% ⎯ +3.5% % VO, set
(Over all operating input voltage, resistive load,
and temperature conditions until end of life)
Adjustment Range All VO 0.7525 5.5 Vdc
Selected by an external resistor
Output Regulation
Line (VIN=VIN, min to VIN, max) All
⎯ 0.3 ⎯ % VO, set
Load (IO=IO, min to IO, max) All
⎯ 0.4 ⎯ % VO, set
Temperature (Tref=TA, min to TA, max) All
⎯ 0.4 ⎯ % VO, set
Output Ripple and Noise on nominal output
(VIN=VIN, nom and IO=IO, min to IO, max
Cout = 1μF ceramic//10μFtantalum capacitors)
RMS (5Hz to 20MHz bandwidth) Vo ≤ 3.63 ⎯ 12 30 mVrms
Peak-to-Peak (5Hz to 20MHz bandwidth) Vo ≤ 3.63 ⎯ 30 75 mVpk-pk
RMS (5Hz to 20MHz bandwidth) Vo = 5.0V ⎯ 25 40 mVrms
Peak-to-Peak (5Hz to 20MHz bandwidth) Vo = 5.0V ⎯ 70 100 mVpk-pk
External Capacitance
ESR ≥ 1 mΩ All CO, max ⎯ ⎯ 1000 μF
ESR ≥ 10 mΩ All CO, max ⎯ ⎯ 5000 μF
Output Current All Io 0 16 Adc
Output Current Limit Inception (Hiccup Mode ) All IO, lim ⎯ 180 ⎯ % Io
(VO= 90% of VO, set)
Output Short-Circuit Current All IO, s/c ⎯ 3 ⎯ Adc
(VO≤250mV) ( Hiccup Mode )
Efficiency VO, set = 0.75Vdc η 79.0 %
VIN= VIN, nom, TA=25°C VO, set = 1.2Vdc η 85.0 %
IO=IO, max , VO= VO,set V
O,set = 1.5Vdc η 87.0 %
V
O,set = 1.8Vdc η 88.0 %
V
O,set = 2.5Vdc η 90.5 %
V
O,set = 3.3Vdc η 92.0 %
V
O,set = 5.0Vdc η 94.0 %
Switching Frequency All fsw ⎯ 300 ⎯ kHz
Dynamic Load Response
(dIo/dt=2.5A/μs; VIN = VIN, nom; TA=25°C) All Vpk ⎯ 200 ⎯ mV
Load Change from Io= 50% to 100% of
Io,max; 1μF ceramic// 10 μF tantalum
Peak Deviation
Settling Time (Vo<10% peak deviation) All ts ⎯ 25 ⎯ μs
(dIo/dt=2.5A/μs; VIN = VIN, nom; TA=25°C) All Vpk ⎯ 200 ⎯ mV
Load Change from Io= 100% to 50%of Io,max:
1μF ceramic// 10 μF tantalum
Peak Deviation
Settling Time (Vo<10% peak deviation) All ts ⎯ 25 ⎯ μs
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 4
Electrical Specifications (continued)
Parameter Device Symbol Min Typ Max Unit
Dynamic Load Response
(dIo/dt=2.5A/μs; V VIN = VIN, nom; TA=25°C) All Vpk ⎯ 100 ⎯ mV
Load Change from Io= 50% to 100% of Io,max;
Co = 2x150 μF polymer capacitors
Peak Deviation
Settling Time (Vo<10% peak deviation) All ts ⎯ 50 ⎯ μs
(dIo/dt=2.5A/μs; VIN = VIN, nom; TA=25°C) All Vpk ⎯ 100 ⎯ mV
Load Change from Io= 100% to 50%of Io,max:
Co = 2x150 μF polymer capacitors
Peak Deviation
Settling Time (Vo<10% peak deviation) All ts ⎯ 50 ⎯ μs
General Specifications
Parameter Min Typ Max Unit
Calculated MTBF (IO=IO, max, TA=25°C) 9,230,550 Hours
Telecordia SR-332 Issue 1: Method 1 Case 3
Weight ⎯ 5.6 (0.2) ⎯ g (oz.)
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 5
Feature Specifications
Unless otherwise indicated, specifications apply over all operating input voltage, resistive load, and temperature
conditions. See Feature Descriptions for additional information.
Parameter Device Symbol Min Typ Max Unit
On/Off Signal interface
Device code with Suffix “4” – Positive logic
(On/Off is open collector/drain logic input;
Signal referenced to GND - See feature description
section)
Input High Voltage (Module ON) All VIH ― ― V
IN, max V
Input High Current All IIH ― ― 10 μA
Input Low Voltage (Module OFF) All VIL -0.2 ― 0.3 V
Input Low Current All IIL ― 0.2 1 mA
Device Code with no suffix – Negative Logic
(On/OFF pin is open collector/drain logic input with
external pull-up resistor; signal referenced to GND)
Input High Voltage (Module OFF) All VIH 2.5 ― V
IN,max Vdc
Input High Current All IIH 0.2 1 mA
Input Low Voltage (Module ON) All VIL -0.2 ― 0.3 Vdc
Input low Current All IIL ― 10 μA
Turn-On Delay and Rise Times
(IO=IO, max , VIN = VIN, nom, TA = 25 oC, )
Case 1: On/Off input is set to Logic Low (Module
ON) and then input power is applied (delay from
instant at which VIN =VIN, min until Vo=10% of Vo,set)
All Tdelay ― 3 ― msec
Case 2: Input power is applied for at least one second
and then the On/Off input is set to logic Low (delay from
instant at which Von/Off=0.3V until Vo=10% of Vo, set)
All Tdelay ― 3 ― msec
Output voltage Rise time (time for Vo to rise from 10%
of Vo,set to 90% of Vo, set)
All Trise ― 4 6 msec
Output voltage overshoot – Startup ― 1 % VO, set
IO= IO, max; VIN = 8.3 to 14Vdc, TA = 25 oC
Sequencing Delay time
Delay from VIN, min to application of voltage on SEQ pin All TsEQ-delay 10 msec
Tracking Accuracy (Power-Up: 2V/ms) All |VSEQ –Vo | 100 200 mV
(Power-Down: 1V/ms) All |VSEQ –Vo | 300 500 mV
(VIN, min to VIN, max; IO, min to IO, max VSEQ < Vo)
Overtemperature Protection All Tref ⎯ 125 ⎯ °C
(See Thermal Consideration section)
Input Undervoltage Lockout
Turn-on Threshold All 7.9 V
Turn-off Threshold All 7.8 V
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 6
Characteristic Curves
The following figures provide typical characteristics for the Austin SuperLynxTM II 12V SIP modules at 25ºC.
70
72
74
76
78
80
82
84
86
88
90
0 4 8 12 16
Vin=14V
Vin=10V
Vin=12V
74
76
78
80
82
84
86
88
90
92
94
0 4 81216
Vin=14V
Vin=10V
Vin=12V
EFFICIENCY, (η)
OUTPUT CURRENT, IO (A)
EFFICIENCY, (η)
OUTPUT CURRENT, IO (A)
Figure 1. Converter Efficiency versus Output Current
(Vout = 1.2Vdc).
Figure 4. Converter Efficiency versus Output Current
(Vout = 2.5Vdc).
70
72
74
76
78
80
82
84
86
88
90
04 81216
Vin=14V
Vin=10V
Vin=12V
74
76
78
80
82
84
86
88
90
92
94
04 81216
Vin=14V
Vin=10V
Vin=12V
EFFICIENCY, (η)
OUTPUT CURRENT
,
I
O
(
A
)
EFFICIENCY, (η)
OUTPUT CURRENT
,
I
O
(
A
)
Figure 2. Converter Efficiency versus Output Current
(Vout = 1.5Vdc).
Figure 5. Converter Efficiency versus Output Current
(Vout = 3.3Vdc).
72
74
76
78
80
82
84
86
88
90
92
0481216
Vin=14V
Vin=10V
Vin=12V
74
76
78
80
82
84
86
88
90
92
94
96
0481216
Vin=14V
Vin=10V
Vin=12V
EFFICIENCY, (η)
OUTPUT CURRENT, IO (A)
EFFICIENCY, (η)
OUTPUT CURRENT, IO (A)
Figure 3. Converter Efficiency versus Output Current
(Vout = 1.8Vdc).
Figure 6. Converter Efficiency versus Output Current
(Vout =5.0Vdc).
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 7
Characteristic Curves (continued)
The following figures provide typical characteristics for the SuperLynxTM II 12V SIP modules at 25ºC.
0
1
2
3
4
5
6
7
8
9
7 8 9 1011121314
Io = 16A
Io=8A
Io=0 A
INPUT CURRENT, IIN (A)
INPUT VOLTAGE, VIN (V)
OUTPUT CURRENT, OUTPUT VOLTAGE
IO (A) (2A/div) VO (V) (200mV/div)
TIME, t (5μs/div)
Figure 7. Input Voltage vs. Input Current
(Vo = 3.3 Vdc).
Figure 10. Transient Response to Dynamic Load
Change from 50% to 100% of full load (Vo = 3.3Vdc).
OUTPUT VOLTAGE
VO (V) (20mV/div)
TIME, t (2μs/div)
OUTPUT CURRENT, OUTPUT VOLTAGE
IO (A) (2A/div) VO (V) (200mV/div)
TIME, t (5μs/div)
Figure 8. Typical Output Ripple and Noise
(Vin = 12V dc, Vo = 2.5 Vdc, Io=16A).
Figure 11. Transient Response to Dynamic Load
Change from 100% to 50% of full load (Vo = 3.3Vdc).
OUTPUT VOLTAGE
VO (V) (20mV/div)
TIME, t (2μs/div)
OUTPUT CURRENT, OUTPUT VOLTAGE
IO (A) (2A/div) VO (V) (200mV/div)
TIME, t (10μs/div)
Figure 9. Typical Output Ripple and Noise
(Vin = 12V dc, Vo = 3.3Vdc, Io=16A).
Figure 12. Transient Response to Dynamic Load
Change from 50% to 100% of full load (Vo =3.3Vdc,
Cext = 2x150 μF Polymer Capacitors).
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 8
Characteristic Curves (continued)
The following figures provide typical characteristics for the Austin SuperLynxTM II 12V SIP modules at 25ºC.
OUTPUT CURRENT, OUTPUT VOLTAGE
IO (A) (2A/div) VO (V) (200mV/div)
TIME, t (10μs/div)
OUTPUT VOLTAGE, INPUT VOLTAGE
Vo (V) (2V/div) VIN (V) (5V/div)
TIME, t (2 ms/div)
Figure 13. Transient Response to Dynamic Load
Change from 100% of 50% full load (Vo = 3.3Vdc, Cext
= 2x150 μF Polymer Capacitors)
Figure 16. Typical Start-Up with application of Vin
with low-ESR polymer capacitors at the output
(7x150 μF) (Vin = 12Vdc, Vo = 5.0Vdc, Io = 16A, Co =
1050
μ
F
)
.
OUTPUT VOLTAGE On/Off VOLTAGE
VOV) (2V/div) VOn/off (V) (5V/div)
TIME, t 2ms/div)
OUTPUT VOLTAGE
VOV) (1V/div)
TIME, t (2ms/div)
Figure 14. Typical Start-Up Using Remote On/Off
(Vin = 12Vdc, Vo = 5.0Vdc, Io =16A).
Figure 17. Typical Start-Up with Prebias (Vin =
12Vdc, Vo = 2.5Vdc, Io = 1A, Vbias =1.2 Vdc).
OUTPUT VOLTAGE On/Off VOLTAGE
VOV) (2V/div) VOn/off (V) (5V/div)
TIME, t (2ms/div)
OUTPUT CURRENT,
IO (A) (10A/div)
TIME, t (10ms/div)
Figure 15. Typical Start-Up Using Remote On/Off with
Low-ESR external capacitors (7x150uF Polymer)
(
Vin = 12Vdc
,
Vo = 5.0Vdc
,
Io = 16A
,
Co = 1050
F
)
.
Figure 18. Output short circuit Current
(Vin = 12Vdc, Vo = 0.75Vdc).
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 9
Characteristic Curves (continued)
The following figures provide thermal derating curves for the Austin SuperLynxTM II 12V SIP modules.
0
2
4
6
8
10
12
14
16
18
20 30 40 50 60 70 80 90
100 LFM
200 LFM
NC
300 LFM
400 LFM
0
2
4
6
8
10
12
14
16
18
20 30 40 50 60 70 80 90
100 LFM
200 LFM
NC
300 LFM
400 LFM
OUTPUT CURRENT, Io (A)
AMBIENT TEMPERATURE, T
A
O
C
OUTPUT CURRENT, Io (A)
AMBIENT TEMPERATURE, T
A
O
C
Figure 19. Derating Output Current versus Local
Ambient Temperature and Airflow (Vin = 12Vdc,
Vo=0.75Vdc).
Figure 22. Derating Output Current versus Local
Ambient Temperature and Airflow (Vin = 12dc, Vo=5.0
Vdc).
0
2
4
6
8
10
12
14
16
18
20 30 40 50 60 70 80 90
100 LFM
200 LFM
NC
300 LFM
400 LFM
OUTPUT CURRENT, Io (A)
AMBIENT TEMPERATURE, T
A
O
C
Figure 20. Derating Output Current versus Local
Ambient Temperature and Airflow (Vin = 12Vdc, Vo=1.8
Vdc).
0
2
4
6
8
10
12
14
16
18
20 30 40 50 60 70 80 90
100 LFM
200 LFM
NC
300 LFM
400 LFM
OUTPUT CURRENT, Io (A)
AMBIENT TEMPERATURE, TA OC
Figure 21. Derating Output Current versus Local
Ambient Temperature and Airflow (Vin = 12Vdc, Vo=3.3
Vdc).
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 10
Test Configurations
TO OSCILLOSCOPE CURRENT PROBE
LTEST
1μH
BATTERY
CS 1000μF
Electrolytic
E.S.R.<0.1Ω
@ 20°C 100kHz
2x100μF
Tantalum
VIN(+)
COM
NOTE: Measure input reflected ripple current with a simulated
source inductance (LTEST) of 1μH. Capacitor CS offsets
possible battery impedance. Measure current as shown
above.
CIN
Figure 23. Input Reflected Ripple Current Test
Setup.
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
V
O
(+)
COM
1uF .
RESISTIVE
LOAD
SCOPE
COPPER STRIP
GROUND PLANE
10uF
Figure 24. Output Ripple and Noise Test Setup.
VO
COM
VIN(+)
COM
RLOAD
Rcontact Rdistribution
Rcontact Rdistribution
Rcontact
Rcontact
Rdistribution
Rdistribution
VIN VO
NOTE: All voltage measurements to be taken at the module
terminals, as shown above. If sockets are used then
Kelvin connections are required at the module terminals
to avoid measurement errors due to socket contact
resistance.
Figure 25. Output Voltage and Efficiency Test
Setup.
η =
VO. IO
VIN. IIN
x 100 %
Efficiency
Design Considerations
Input Filtering
The Austin SuperLynxTM II 12V SIP module should
be connected to a low-impedance source. A
highly inductive source can affect the stability of
the module. An input capacitance must be placed
directly adjacent to the input pin of the module, to
minimize input ripple voltage and ensure module
stability.
In a typical application, 6x47 µF low-ESR tantalum
capacitors (AVX part #: TPSE476M025R0100,
47µF 25V 100 mΩ ESR tantalum capacitor) will be
sufficient to provide adequate ripple voltage at the
input of the module. To further minimize ripple
voltage at the input, very low ESR ceramic
capacitors are recommended at the input of the
module. Figure 26 shows input ripple voltage
(mVp-p) for various outputs with 6x47 µF tantalum
capacitors and with 6x22 µF ceramic capacitor
(TDK part #: C4532X5R1C226M) at full load.
Input Ripple Voltage (mVp-p)
0
50
10 0
15 0
200
250
300
350
0 12 3456
Tantalum
Cer amic
Output Voltage (Vdc)
Figure 26. Input ripple voltage for various output
with 6x47 µF tantalum capacitors and with 6x22
µF ceramic capacitors at the input (full load).
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 11
Design Considerations (continued)
Output Filtering
The Austin SuperLynxTM II 12V SIPmodule is
designed for low output ripple voltage and will meet
the maximum output ripple specification with 1 µF
ceramic and 10 µF tantalum capacitors at the output
of the module. However, additional output filtering
may be required by the system designer for a number
of reasons. First, there may be a need to further
reduce the output ripple and noise of the module.
Second, the dynamic response characteristics may
need to be customized to a particular load step
change.
To reduce the output ripple and improve the dynamic
response to a step load change, additional
capacitance at the output can be used. Low ESR
polymer and ceramic capacitors are recommended to
improve the dynamic response of the module. For
stable operation of the module, limit the capacitance
to less than the maximum output capacitance as
specified in the electrical specification table.
Safety Considerations
For safety agency approval the power module must
be installed in compliance with the spacing and
separation requirements of the end-use safety
agency standards, i.e., UL 60950-1, CSA C22.2 No.
60950-1-03, and VDE 0850:2001-12 (EN60950-1)
Licensed.
For the converter output to be considered meeting
the requirements of safety extra-low voltage (SELV),
the input must meet SELV requirements. The power
module has extra-low voltage (ELV) outputs when all
inputs are ELV.
The input to these units is to be provided with a fast-
acting fuse with a maximum rating of 6A in the
positive input lead.
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 12
Feature Descriptions
Remote On/Off
Austin SuperLynxTM II 12V SIP power modules
feature an On/Off pin for remote On/Off operation.
Two On/Off logic options are available in the Austin
SuperLynxTM II series modules. Positive Logic On/Off
signal, device code suffix “4”, turns the module ON
during a logic High on the On/Off pin and turns the
module OFF during a logic Low. Negative logic
On/Off signal, no device code suffix, turns the module
OFF during logic High and turns the module ON
during logic Low.
For positive logic modules, the circuit configuration for
using the On/Off pin is shown in Figure 27. The
On/Off pin is an open collector/drain logic input signal
(Von/Off) that is referenced to ground. During a logic-
high (On/Off pin is pulled high internal to the module)
when the transistor Q1 is in the Off state, the power
module is ON. Maximum allowable leakage current of
the transistor when Von/off = VIN,max is 10µA.
Applying a logic-low when the transistor Q1 is turned-
On, the power module is OFF. During this state
VOn/Off must be less than 0.3V. When not using
positive logic On/off pin, leave the pin unconnected or
tie to VIN.
Q1
R2
R1
Q2
R3
R4
Q3 CSS
GND
VIN+
ON/OFF
PWM Enable
+
_
ON/OFF
V
ION/OFF
MODULE
Figure 27. Circuit configuration for using positive
logic On/OFF.
For negative logic On/Off devices, the circuit
configuration is shown is Figure 28. The On/Off pin is
pulled high with an external pull-up resistor (typical
Rpull-up = 68k, +/- 5%). When transistor Q1 is in the
Off state, logic High is applied to the On/Off pin and
the power module is Off. The minimum On/off voltage
for logic High on the On/Off pin is 2.5 Vdc. To turn
the module ON, logic Low is applied to the On/Off pin
by turning ON Q1. When not using the negative logic
On/Off, leave the pin unconnected or tie to GND.
Q1
R1
R2
Q2 CSS
GND
PWM Enable
ON/OFF
VIN+
ON/OFF
_
+
V
I
MODULE
pull-up
R
ON/OFF
Figure 28. Circuit configuration for using
negative logic On/OFF.
Overcurrent Protection
To provide protection in a fault (output overload)
condition, the unit is equipped with internal
current-limiting circuitry and can endure current
limiting continuously. At the point of current-limit
inception, the unit enters hiccup mode. The unit
operates normally once the output current is
brought back into its specified range. The typical
average output current during hiccup is 3A.
Input Undervoltage Lockout
At input voltages below the input undervoltage lockout
limit, module operation is disabled. The module will
begin to operate at an input voltage above the
undervoltage lockout turn-on threshold.
Overtemperature Protection
To provide protection in a fault condition, the unit is
equipped with a thermal shutdown circuit. The unit
will shutdown if the thermal reference point Tref,
exceeds 125oC (typical), but the thermal shutdown
is not intended as a guarantee that the unit will
survive temperatures beyond its rating. The
module will automatically restarts after it cools
down.
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 13
Feature Descriptions (continued)
Output Voltage Programming
The output voltage of the Austin SuperLynxTM II 12V
can be programmed to any voltage from 0.75Vdc to
5.5Vdc by connecting a resistor (shown as Rtrim in
Figure 29) between the Trim and GND pins of the
module. Without an external resistor between the
Trim and GND pins, the output of the module will be
0.7525Vdc. To calculate the value of the trim resistor,
Rtrim for a desired output voltage, use the following
equation:
Ω
⎥
⎦
⎤
⎢
⎣
⎡−
−
=1000
7525.0
10500
Vo
Rtrim
Rtrim is the external resistor in Ω
Vo is the desired output voltage
For example, to program the output voltage of the
Austin SuperLynxTM II module to 1.8V, Rtrim is
calculated as follows:
⎥
⎦
⎤
⎢
⎣
⎡−
−
=1000
75.08.1
10500
Rtrim
Ω= kRtrim 024.9
V
O
(+)
TRIM
GND
Rtrim
LOAD
V
IN
(+)
ON/OFF
Figure 29. Circuit configuration to program
output voltage using an external resistor
Table 1 provides Rtrim values for most common
output voltages.
Table 1
VO, set (V) Rtrim (KΩ)
0.7525 Open
1.2 22.46
1.5 13.05
1.8 9.024
2.5 5.009
3.3 3.122
5.0 1.472
By using 1% tolerance trim resistor, set point
tolerance of ±2% is achieved as specified in the
electrical specification. The POL Programming Tool,
available at www.lineagepower.com under the Design
Tools section, helps determine the required external
trim resistor needed for a specific output voltage.
The amount of power delivered by the module is
defined as the voltage at the output terminals
multiplied by the output current. When using the
trim feature, the output voltage of the module can
be increased, which at the same output current
would increase the power output of the module.
Care should be taken to ensure that the maximum
output power of the module remains at or below the
maximum rated power (Pmax = Vo,set x Io,max).
Voltage Margining
Output voltage margining can be implemented in the
Austin SuperLynxTM II modules by connecting a
resistor, Rmargin-up, from the Trim pin to the ground pin
for margining-up the output voltage and by connecting
a resistor, Rmargin-down, from the Trim pin to the Output
pin for margining-down. Figure 30 shows the circuit
configuration for output voltage margining. The POL
Programming Tool, available at
www.lineagepower.com under the Design Tools
section, also calculates the values of Rmargin-up and
Rmargin-down for a specific output voltage and % margin.
Please consult your local Lineage Power technical
representative for additional details.
Vo
Austin Lynx or
Lynx II Series
GND
Trim
Q1
Rtrim
Rmargin-up
Q2
Rmargin-down
Figure 30. Circuit Configuration for margining
Output voltage.
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 14
Feature Descriptions (continued)
Voltage Sequencing
Austin SuperLynxTM II 12V series of modules include
a sequencing feature, EZ-SEQUENCETM that enables
users to implement various types of output voltage
sequencing in their applications. This is
accomplished via an additional sequencing pin.
When not using the sequencing feature, either tie the
SEQ pin to VIN or leave it unconnected.
When an analog voltage is applied to the SEQ pin,
the output voltage tracks this voltage until the output
reaches the set-point voltage. The SEQ voltage must
be set higher than the set-point voltage of the module.
The output voltage follows the voltage on the SEQ pin
on a one-to-one volt basis. By connecting multiple
modules together, customers can get multiple
modules to track their output voltages to the voltage
applied on the SEQ pin.
For proper voltage sequencing, first, input voltage is
applied to the module. The On/Off pin of the module
is left unconnected (or tied to GND for negative logic
modules or tied to VIN for positive logic modules) so
that the module is ON by default. After applying input
voltage to the module, a minimum of 10msec delay is
required before applying voltage on the SEQ pin.
During this time, potential of 50mV (± 10 mV) is
maintained on the SEQ pin. After 10msec delay, an
analog voltage is applied to the SEQ pin and the
output voltage of the module will track this voltage on
a one-to-one volt bases until output reaches the set-
point voltage. To initiate simultaneous shutdown of
the modules, the SEQ pin voltage is lowered in a
controlled manner. Output voltage of the modules
tracks the voltages below their set-point voltages on a
one-to-one basis. A valid input voltage must be
maintained until the tracking and output voltages
reach ground potential to ensure a controlled
shutdown of the modules.
When using the EZ-SEQUENCETM feature to control
start-up of the module, pre-bias immunity feature
during start-up is disabled. The pre-bias immunity
feature of the module relies on the module being in
the diode-mode during start-up. When using the EZ-
SEQUENCETM feature, modules goes through an
internal set-up time of 10msec, and will be in
synchronous rectification mode when voltage at the
SEQ pin is applied. This will result in sinking current
in the module if pre-bias voltage is present at the
output of the module. When pre-bias immunity during
start-up is required, the EZ-SEQUENCETM feature
must be disabled. For additional guidelines on using
EZ-SEQUENCETM feature of Austin SuperLynxTM II
12V, contact Lineage Power technical representative
for preliminary application note on output voltage
sequencing using Austin Lynx II series.
Remote Sense
The Austin SuperLynxTM II 12V SIP power modules
have a Remote Sense feature to minimize the effects
of distribution losses by regulating the voltage at the
Remote Sense pin (See Figure 31). The voltage
between the Sense pin and Vo pin must not exceed
0.5V.
The amount of power delivered by the module is
defined as the output voltage multiplied by the output
current (Vo x Io). When using Remote Sense, the
output voltage of the module can increase, which if
the same output is maintained, increases the power
output by the module. Make sure that the maximum
output power of the module remains at or below the
maximum rated power. When the Remote Sense
feature is not being used, connect the Remote Sense
pin to output pin of the module.
VO
COM
VIN(+)
COM
RLOAD
Rcontact Rdistribution
Rcontact Rdistribution
Rcontact
Rcontact
Rdistribution
Rdistribution
Sense
Figure 31. Remote sense circuit configuration.
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 15
Thermal Considerations
Power modules operate in a variety of thermal
environments; however, sufficient cooling should be
provided to help ensure reliable operation.
Considerations include ambient temperature, airflow,
module power dissipation, and the need for increased
reliability. A reduction in the operating temperature of
the module will result in an increase in reliability. The
thermal data presented here is based on physical
measurements taken in a wind tunnel. The test set-
up is shown in Figure 33. Note that the airflow is
parallel to the long axis of the module as shown in
figure 32. The derating data applies to airflow in
either direction of the module’s long axis.
Air Flow Tref
Top View
Figure 32. Tref Temperature measurement
location.
The thermal reference point, Tref 1 used in the
specifications of thermal derating curves is shown in
Figure 32. For reliable operation this temperature
should not exceed 125oC.
The output power of the module should not exceed
the rated power of the module (Vo,set x Io,max).
Please refer to the Application Note “Thermal
Characterization Process For Open-Frame Board-
Mounted Power Modules” for a detailed discussion of
thermal aspects including maximum device
temperatures.
Figure 33. Thermal Test Set-up.
Heat Transfer via Convection
Increased airflow over the module enhances the heat
transfer via convection. Thermal derating curves
showing the maximum output current that can be
delivered by various module versus local ambient
temperature (TA) for natural convection and up to
1m/s (200 ft./min) are shown in the Characteristics
Curves section.
A
ir
flow
x
Power Module
W
ind Tunnel
PWBs
7.24_
(0.285)
76.2_
(3.0)
Probe Location
for measuring
airflow and
ambient
temperature
25.4_
(1.0)
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 16
Post solder Cleaning and Drying
Considerations
Post solder cleaning is usually the final circuit-board
assembly process prior to electrical board testing. The
result of inadequate cleaning and drying can affect
both the reliability of a power module and the
testability of the finished circuit-board assembly. For
guidance on appropriate soldering, cleaning and
drying procedures, refer to Board Mounted Power
Modules: Soldering and Cleaning Application Note.
Through-Hole Lead-Free Soldering
Information
The RoHS-compliant through-hole products use the
SAC (Sn/Ag/Cu) Pb-free solder and RoHS-compliant
components. They are designed to be processed
through single or dual wave soldering machines. The
pins have an RoHS-compliant finish that is compatible
with both Pb and Pb-free wave soldering processes.
A maximum preheat rate of 3°C/s is suggested. The
wave preheat process should be such that the
temperature of the power module board is kept below
210°C. For Pb solder, the recommended pot
temperature is 260°C, while the Pb-free solder pot is
270°C max. Not all RoHS-compliant through-hole
products can be processed with paste-through-hole
Pb or Pb-free reflow process. If additional information
is needed, please consult with your Lineage Power
technical representative for more details.
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 17
Mechanical Outline
Dimensions are in millimeters and (inches).
Tolerances: x.x mm ± 0.5 mm (x.xx in. ± 0.02 in.) [unless otherwise indicated]
x.xx mm ± 0.25 mm (x.xxx in ± 0.010 in.)
Top View
Side View
Bottom View
PIN FUNCTION
1 Vo
2 Vo
3 Sense+
4 Vo
5 GND
6 GND
7 VIN
8 VIN
B SEQ
9 Trim
10 On/Off
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 18
Recommended Pad Layout
Dimensions are in millimeters and (inches).
Tolerances: x.x mm ± 0.5 mm (x.xx in. ± 0.02 in.) [unless otherwise indicated]
x.xx mm ± 0.25 mm (x.xxx in ± 0.010 in.)
PIN FUNCTION
1 Vo
2 Vo
3 Sense+
4 Vo
5 GND
6 GND
7 VIN
8 VIN
B SEQ
9 Trim
10 On/Off
Through- Hole Pad Layout – Back view
Data Sheet
October 1, 2009
Austin SuperLynxTM II 12V SIP Non-isolated Power Modules:
8.3 – 14Vdc input; 0.75Vdc to 5.5Vdc Output;16A output current
LINEAGE POWER 19
Document No: DS04-022 ver. 1.22
PDF name: superlynx_II_sip_12v_ds.pdf
Ordering Information
Please contact your Lineage Power Sales Representative for pricing, availability and optional features.
Table 2. Device Codes
Device Code Input Voltage Output
Voltage
Output
Current
Efficiency
3.3V@ 16A
Connector
Type Comcodes
ATA016A0X3 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP 108989091
ATA016A0X3Z 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP CC109104691
ATA016A0X43 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP 108989100
ATA016A0X43Z 8.3 – 14Vdc 0.75 – 5.5Vdc 16 A 92.0% SIP CC109104700
-Z refers to RoHS-compliant versions.
Table 3. Device Option
Option* Suffix**
Long Pins 5.08 mm ± 0.25mm (0.200 in. ± 0.010 in.) 5
* Contact Lineage Power Sales Representative for availability of these options, samples, minimum order quantity and
lead times
** When adding multiple options to the product code, add suffix numbers in the descending order
World Wide Headquarters
Lineage Power Corporation
601 Shiloh Road, Plano, TX 75074, USA
+1-800-526-7819
(Outside U.S.A.: +1-972-244-9428)
www.lineagepower.com
e-mail: techsupport1@lineagepower.com
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Tel: +65 6593 7211
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Lineage Powe r reserves the right to make change s to the product(s) or informat ion contained herein without not ice. No liability is assumed as a result of their use or
a
pplication. No rights under any patent accompany the sale of any such product(s) or information.
Lineage Power DC-DC products are protected under various patents. Information on these patents is available at www.lineagepower.com/paten ts.
©
2009 Linea
g
e Power Cor
p
oration
,
(
Plano
,
Texas
)
All Inte rnational Ri
g
hts Reserved.