AO3434A
30V N-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 4A
R
DS(ON)
(at V
GS
=10V) < 52mΩ
R
DS(ON)
(at V
GS
=4.5V) < 60mΩ
R
DS(ON)
(at V
GS
=2.5V) < 78mΩ
Typical ESD protection
HBM Class 3A
Symbol
The AO3434A combines advanced trench MOSFET
technology with a low resistance package to provide
extremely low R
DS(ON)
. This device is ideal for load switch
and battery protection applications.
Maximum
Units
Parameter
Absolute Maximum Ratings T
A
30V
SOT23
Top View Bottom View
D
G
S
G
S
D
G
D
S
Symbol
V
DS
V
GS
I
DM
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
Power Dissipation
B
P
D
Maximum Junction-to-Ambient
A
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
63 125
80
°C/W
R
θJA
70
100 90
T
A
=25°C W
1.4
0.9
T
A
=70°C
V±12Gate-Source Voltage T
A
=25°C
T
A
=70°C A
I
D
4
3
20Pulsed Drain Current
C
Continuous Drain
Current
V
Maximum
Units
Parameter
Drain-Source Voltage 30
°C
Thermal Characteristics UnitsParameter Typ Max
Junction and Storage Temperature Range -55 to 150
Rev 1: Sep. 2012
www.aosmd.com Page 1 of 5
AO3434A
Symbol Min Typ Max Units
BV
DSS
30 V
V
DS
=30V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
±10 µA
V
GS(th)
Gate Threshold Voltage 0.7 1.05 1.5 V
I
D(ON)
20 A
42 52
T
J
=125°C 66 82
47 60 mΩ
59 78 mΩ
g
FS
15 S
V
SD
0.75 1 V
I
S
1.5 A
C
iss
245 pF
C
oss
35 pF
C
rss
20 pF
R
g
5Ω
Q
g
(10V) 5.7 10 nC
Q
g
(4.5V) 2.6 5 nC
Q
gs
0.5 nC
Q
gd
1.0 nC
t
2
ns
Drain-Source Breakdown Voltage
On state drain current
I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=4A
Reverse Transfer Capacitance V
GS
=0V, V
DS
=15V, f=1MHz
SWITCHING PARAMETERS
V
DS
=V
GS
I
D
=250µA
V
DS
=0V, V
GS
=±10V
Gate-Body leakage current
Forward Transconductance
Gate Drain Charge
Total Gate Charge
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS
Parameter Conditions
I
DSS
µA
Zero Gate Voltage Drain Current
R
DS(ON)
Static Drain-Source On-Resistance mΩ
I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=4A
V
GS
=2.5V, I
D
=2A
V
GS
=4.5V, I
D
=3A
Diode Forward Voltage
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge
V
GS
=10V, V
DS
=15V, I
D
=4A
Gate Source Charge
t
D(on)
2
ns
t
r
3.5 ns
t
D(off)
22 ns
t
f
3.5 ns
t
rr
6.5 ns
Q
rr
7.5 nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time I
F
=4A, dI/dt=500A/µs
Body Diode Reverse Recovery Charge I
F
=4A, dI/dt=500A/µs
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime V
GS
=10V, V
DS
=15V, R
L
=3.75Ω,
R
GEN
=3Ω
Turn-Off Fall Time
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using ≤10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
Rev 1: Sep. 2012 www.aosmd.com Page 2 of 5
AO3434A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
5
10
15
20
01234
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
20
40
60
80
100
0 2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=10V
ID=4A
VGS=4.5V
ID=3A
VGS=2.5V
ID=2A
25°C
125°C
VDS=5V
VGS=4.5V
VGS=10V
0
5
10
15
20
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
2.5V
10V 4.5V
VGS=2.0V
VGS=2.5V
40
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
20
40
60
80
100
120
0 2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=4A
25°C
125°C
Rev 1: Sep. 2012 www.aosmd.com Page 3 of 5
AO3434A
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0 1 2 3 4 5 6
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
50
100
150
200
250
300
350
400
0 5 10 15 20 25 30
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
Coss
C
rss
VDS=15V
ID=4A
1
10
100
1000
10000
1E-05 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
TA=25°C
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
ID(Amps)
VDS (Volts)
Figure 9: Maximum Forward Biased Safe
10
µ
s
10s
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
T
A
=25°C
100µs
10ms
Ambient (Note F)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
0.001
0.01
0.1
1
10
1E-05 0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=125°C/W
Rev 1: Sep. 2012 www.aosmd.com Page 4 of 5
AO3434A
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
DUT Vgs
Diode Recovery Test Circuit & Waveforms
Vds +
rr
Q = - Idt
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Ig
Vgs
-
+
VDC
L
Vds
Isd
Isd
Vds - I
F
dI/dt
I
RM
Vdd
Vdd
t
rr
Rev 1: Sep. 2012 www.aosmd.com Page 5 of 5