MMA1254KEG - Freescale Semiconductor

MMA1254

Rev 1, 06/2012

Freescale Semiconductor

Data Sheet: Technical Data

Low-g

Micromachined Accelerometer

The MMA series of silicon capacitive, micromachined accelerometers feature

signal conditioning, a 2-pole low pass filter and temperature compensation.

Zero-g offset full scale span and filter cut-off are factory set and require no

external devices. A full system self-test capability verifies system functionality.

Features

• Integral Signal Conditioning

• Linear Output

• 2nd Order Bessel Filter

• Calibrated Self-test

• EPROM Parity Check Status

• Transducer Hermetically Sealed at Wafer Level for Superior Reliabi lity

• Robust Design, High Shock Survivability

• Qualified AECQ100, Rev. F Grade 2 (-40C/ +105C)

Typical Applications

• Vibration Monitoring and Recording

• Appliance Control

• Mechanical Bearing Monitoring

• Computer Hard Drive Protection

• Computer Mouse and Joysticks

• Virtual Reality Input Devices

• Sports Diagnostic Devices and Systems

ORDERING INFORMATION

Device Name Temperature Range Case No. Package

MMA1254EG –40to 105C475-01 SOIC-16

MMA1254EGR2 –40to 105C475-01 SOIC-16, Tape & Reel

MMA1254KEG* –40to 105C475-01 SOIC-16

MMA1254KEGR2* –40to 105C475-01 SOIC-16, Tape & Reel

*Part number sourced from a different facility.

MMA1254

MMA1254: Z-AXIS SENSITIVITY

MICROMACHINED

ACCELEROMETER

±5g

16-LEAD SOIC

Pb-FREE

CASE 475-01

Figure 1. Simplified Accelerometer Functional Block Diagram Figure 2. Pin Connections

G-Cell

Sensor Integrator Gain Filter Temp Comp

and Gain

Self-test Control Logic &

EPROM Trim Circuits Clock

Generator

Oscillator

VDD

VOUT

VSS

STATUS

VSS

VOUT

STATUS

VDD

VSS

N/C

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ELECTRO STATIC DISCHARGE (ESD)

WARNING: This device is sensitive to electrostatic

discharge.

Although the Freescale accelerometers contain internal

2 kV ESD protection circuitry , extra precaution must be taken

by the user to protect the chip from ESD. A charge of over

2000 volts can accumulate on the human body or associated

test equipment. A charge of this magnitude can alter the

performance or cause failure of the chip. When handling the

accelerometer, proper ESD precautions should be followed

to avoid exposing the device to discharges which may be

detrimental to its performance.

Table 1. Maximum Ratings

(Maximum ratings are the limits to which the device can be exposed without causing perma nent damage.)

Rating Symbol Value Unit

Powered Acceleration (all axes) Gpd 1500 g

Unpowered Acceleration (all axes) Gupd 2000 g

Supply Voltage VDD –0.3 to +7.0 V

Drop Test (1)

1. Dropped onto concrete surface from any axis.

Ddrop 1.2 m

Storage Temperature Range Tstg –40 to +125 °C

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Table 2. Operating Characteristics

(Unless otherwise noted: –40°C TA +105 °C, 4.75 VDD 5.25, Acceleration = 0g, Loaded output.(1))

1. For a loaded output the measurements are observed after an RC filter consisting of a 1 k resistor and a 0.1 F capacitor to ground.

Characteristic Symbol Min Typ Max Unit

Operating Range(2)

Supply Voltage(3)

Supply Current

Operating Temperature Range

Acceleration Range

2. These limits define the range of operation for which the part will meet specification.

3. Within the supply range of 4.75 and 5.25 volts, the device operates as a fully calibrated linear accelerometer. Beyond these supply limits the

device may operate as a linear device but is not guar anteed to be in calibration.

VDD

IDD

gFS

4.75

1.1

–40

—

5.00

2.1

—

5.25

3.0

+105

—

°C

Output Signal

+1g (TA = 25°C, VDD = 5.0 V)(4)

+1g (VDD = 5.0 V)

Sensitivity (TA = 25°C, VDD = 5.0 V)(5)

Sensitivity

Bandwidth Response

Nonlinearity

4. The device can measure both + and – acceleration. With +1g acceleration the output is at midsupply. For positive acceleration the output

will increase above VDD/2 and for negative acceleration the output will decrease below VDD/2.

5. The device is calibrated at 3g. Sensitivity limits apply to 0Hz acceleration.

VOFF

f-3dB

NLOUT

2.25

2.2

380

42.5

–1.0

2.5

400

—

2.75

2.8

420

57.5

+1.0

mV/g

mV/g/V

% FSO

Noise

RMS (0.1 Hz – 1.0 kHz)

Spectral Density (RMS, 0.1 Hz – 1.0 KHz)(6)

6. At clock frequency 70 kHz.

nRMS

nSD

—

—2.0

700 4.0

—mVrms

g/

Self-Test

Output Response (VDD = 5.0 V)

Input Low

Input High

Input Loading(7)

Response Time(8)

7. The digital input pin has an internal pull-down current source to prevent inadvertent self test initiation due to external board level leakages.

8. Time for the output to reach 90% of its final value after a self-test is initiated.

VST

VIL

VIH

IIN

tST

0.2

VSS

0.7VDD

–300

—

0.25

—

–125

2.0

0.3

0.3 VDD

VDD

–50

V/V

A

Status(9), (10)

Output Low (Iload = 100 A)

Output High (Iload = 100 A)

9. The Status pin output is not valid following power-up until at least one rising edge has been applied to the self-test pin. The Status pin is high

whenever the self-test input is high, as a means to check the connectivity of the self-test and Status pins in the application.

10. The Status pin output latches high if a Low Voltage Detection or Clock Frequency failure occurs, or the EPROM parity changes to odd. The

Status pin can be reset low if the self-test pin is pulsed with a high input for at least 100 s, unless a fault condition continues to exist.

VOL

VOH

—

VDD – 0.8 —

—0.4

—V

Output Stage Performance

Electrical Saturation Recovery Time(11)

Full Scale Output Range (IOUT = 200 A)

Capacitive Load Drive(12)

Output Impedance

11. Time for amplifiers to recover after an acceleration signal causes them to saturate.

12. Preserves phase margin (60°) to guarantee output amplifier stability.

tDELAY

VFSO

—

VSS + 0.25

—

2.0

VDD – 0.25

100

—



Mechanical Characteristics

Transverse Sensitivity(13)

13. A measure of the device's ability to reject an acceleration applied 90° from the true axis of sensitivity.

VXZ,YZ — — 5.0 % FSO

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PRINCIPLE OF OPERATION

The Freescal e accelerometer is a s urface-micromachined

integrated-circuit accelerometer.

The device consists of a surface micromachined

capacitive sensing cell (g-cell) and a CMOS signal

conditioning ASIC contained in a single integrated circuit

package. The sensing element is sealed hermetically at the

wafer level using a bulk micromachined “cap'' wafer.

The g-cell is a mechanical structure formed from

semiconductor materials (polysilicon) using semiconducto r

processes (masking and etching). It can be modeled as two

stationary plates with a moveable plate in-between. The

center plate can be deflected from its rest position by

subjecting the system to an acceleration (Figure 3).

When the center plate deflects, the distance from it to one

fixed plate will increase by the same amount that the distance

to the other plate decreases. The change in distance is a

measure of acceleration.

The g-cell plates form two back-to-back capacitors

(Figure 4). As the center plate moves with acceleration, the

distance between the plates changes and each capacitor's

value will change, (C = A/D). Where A is the area of the

plate,  is the dielectric constant, and D is the distance

between the plates.

The CMOS ASIC uses switched capacitor techniques to

measure the g-cell capacitors and extract the acceleration

data from the difference between the two capacitors. The

ASIC also signal conditions and filters (switched capacitor)

the signal, providing a high level output voltage that is

ratiometric and proportional to acceleration.

SPECIAL FEATURES

Filtering

The Freescale accelerometers contain an onboard 2-pole

switched capacitor filter. A Bessel implementation is used

because it provides a maximally flat delay response (linear

phase) thus preserving pulse shap e integrity. Because the

filter is realized using switched capacitor techniques, there is

no requirement for external passive components (resistors

and capacitors) to set the cut-off frequency.

Self-Test

The sensor provides a self-test feature that al lows the

verification of the mechanical and electrical integrity of the

accelerometer at any time before or after installation. This

feature is critical in applications such as automotive airbag

systems where system integrity must be ensured over the life

of the vehicle. A fourth “plate'' is used in the g-cell as a self-

test plate. When the user applies a logic high input to the self-

test pin, a calibrated potential is applied across the self-test

plate and the moveable plate. Th e resulting electrostatic

force (Fe = 1/2AV2/d2) causes the center plate to deflect. The

resultant deflection is measured by the accelerometer's

control ASIC and a proportional output voltage results. This

procedure assures that both the mechanical (g-cell) and

electronic sections of the accelerometer are fu nctioning.

Status

Freescale accelerometers include fault detection circuitry

and a fault latch. The Status pin is an output from the fault

latch, OR'd with self-test, and is set high whenever the

following event occurs:

• Parity of the EPROM bits becomes odd in number.

The fault latch can be reset by a rising edge on the self-test

input pin, unless one (or more) of the fault conditions

continues to exist.

Acceleration

Figure 3. Transducer

Physical Model Figure 4. Equivalent

Circuit Model

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BASIC CONNECTIONS

Pinout Description

Figure 5. SOIC Accelerometer with Recommended

Connection Diagram

PCB Layout

Figure 6. Recommended PCB La yout for Interfacing

Accelerometer to Microcontroller

NOTES:

1. Use a 0.1 F capacitor on VDD to decouple th e power

source.

2. Physical coupling distance of the accelerometer to the

microcontro l l er should be minimal.

3. Place a ground plane ben eath the accelerometer to

reduce noise, the ground plane should be attached to

all of the open ended terminals shown in Figure 6.

4. Use an RC filter of 1 k and 0.1 F on the output of the

accelerometer to minimize clock noise (from the

switched capacitor filter circuit).

5. PCB layout of power and ground should not couple

power supply noise.

6. Accelerometer and microcontroller should not be a

high current path.

7. A/D sampling rate and any external power supply

switching frequency should be selected such that they

do not interfere with the internal accelerometer

sampling frequency. This will prevent aliasing errors.

Table 3. Pin Descriptions

Pin No. Pin Name Description

1 thru 3 VSS Redundant connections to the internal

VSS and may be left unconnected.

4 VOUT Output voltage of the accelerometer.

5STATUS Logic output pin to indicate fault.

6 VDD The power supply input.

7 VSS The power supply ground.

8ST Logic input pin used to initiate self-test.

9 thru 13 Trim pins Used for factory trim. Leave

unconnected.

14 thru 16 —No internal connection. Leave

unconnected.

VSS

VOUT

STATUS

VDD

VSS

N/C

8MMA1254

VDD

VSS

VOUT OUTPUT

SIGNAL

1 k

0.1 F

LOGIC

INPUT

VDD

0.1 F

STATUS

VSS

A/D In

VRH

VSS

VDD

VOUT

VSS

VDD

0.1 F1 k

0.1 F

Power Supply

0.1 F

P1STATUS

Microcontroller

Accelerometer

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1. When positioned as shown, the Earth's gravity will result in a positive 1g output

ACCELERATION SENSING DIRECTIONS

VSS

VOUT

STATUS

VDD

VSS

N/C

16-Pin SOIC Package

N/C pins are recommended to be left FLOATING

–g

Direction of Earth's gravity field(1)

DYNAMIC ACCELERATION

STATIC ACCELERATION

-1g

+1g

0g 0g

VOUT = 2.1 V VOUT = 2.1 V

VOUT = 2.5 V

VOUT = 1.7 V

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MMA1254

CASE 475-01

ISSUE C

16 LEAD SOIC

PAGE 1 OF 2

PACKAGE DIMENSIONS

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MMA1254

CASE 475-01

ISSUE C

16 LEAD SOIC

PACKAGE DIMENSIONS

PAGE 2 OF 2

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Revision History

Revision

number Revision

date Descriptio n of changes

0 01/2012 • Initial Release

1 06/2012 • Remov ed KEG suffix from Device Number , in Tab le 2. Operating Characteristics changed Output

Signal +1g VOF: VDD = 0.40, 0.50 and 0.60 to +1g (VDD =5.0 V)(4) VOFF VDD = 2.2, 2.5 and

2.8.

MMA1254

Rev. 1

06/2012

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