
Parameters and connectors
108 SPA440 angular synchronous control - SIMADYN D - Manual
6DD1903-0BB0 Edition 05.01
TC Chart Path Name Significance
0636 52,8 T400_EA.Klemme65inv.Q Coarse pulse 2 (terminal 65) inverse
0650 530,3 MUX_CU.Mux_STW1_B0.Q Output multiplexer, control word1 bit 0
0651 530,3 MUX_CU.Mux_STW1_B1.Q Output multiplexer, control word1 bit1
0652 530,3 MUX_CU.Mux_STW1_B2.Q Output multiplexer, control word1 bit2
0653 530,3 MUX_CU.Mux_STW1_B3.Q Output multiplexer, control word1 bit3
0654 530,7 MUX_CU.Mux_STW1_B4.Q Output multiplexer, control word1 bit4
0655 530,7 MUX_CU.Mux_STW1_B5.Q Output multiplexer, control word1 bit5
0656 530,7 MUX_CU.Mux_STW1_B6.Q Output multiplexer, control word1 bit6
0657 530,7 MUX_CU.Mux_STW1_B7.Q Output multiplexer, control word1 bit7
0658 540,3 MUX_CU.Mux_STW1_B8.Q Output multiplexer, control word1 bit8
0659 540,3 MUX_CU.Mux_STW1_B9.Q Output multiplexer, control word1 bit9
0660 540,3 MUX_CU.Mux_STW1_B10.Q Output multiplexer, control word1 bit10
0661 540,3 MUX_CU.Mux_STW1_B11.Q Output multiplexer, control word1 bit11
0662 540,7 MUX_CU.Mux_STW1_B12.Q Output multiplexer, control word1 bit12
0663 540,7 MUX_CU.Mux_STW1_B13.Q Output multiplexer ,control word1 bit13
0664 540,7 MUX_CU.Mux_STW1_B14.Q Output multiplexer, control word1 bit14
0665 540,7 MUX_CU.Mux_STW1_B15.Q Output multiplexer, control word1 bit15
0698 460,2 Free_FBs.RS_FF2.Q RSFF1_Q (output, free RS flipflop)
0699 460,2 Free_FBs.RS_FF2.QN RSFF1_QN (inv. output free RS flipflop)
0700 460,2 Free_FBs.AND1.Q AND1_Q (output, free AND logic gate)
0703 460,5 Free_FBs.AND2.Q AND2_Q (output, free AND logic gate)
0708 490,8 Free_FBs.Edge1.QN Edge detector: falling edge identified
0709 490,8 Free_FBs.Edge1.QP Edge detector: rising edge identified
0710 460,2 Free_FBs.OR1.Q Q_OR1 (output, free OR logic gate)
0713 460,5 Free_FBs.OR2.Q Q_OR2 (output, free OR logic gate)
0728 490,8 Free_FBs.OnDelay1.Q Output, power-on delay
0730 490,8 Free_FBs.OffDelay1.Q Output, power-off delay
0732 460,8 Free_FBs.Not1.Q Not1_Q (output, free inverter)
0733 460,8 Free_FBs.Not2.Q Not2_Q (output, free inverter)
0734 460,5 Free_FBs.RS_FF1.Q RSFF2_Q (output, free RS flipflop)
0735 460,5 Free_FBs.RS_FF1.QN RSFF2_QN (inv. output free RS flipflop)
0743 480,8 Free_FBs.Compare.QE Output, free comparator: X = Y
0744 480,8 Free_FBs.Compare.QU Output, free comparator: X > Y
0745 480,8 Free_FBs.Compare.QL Output, free comparator: X < Y
0746 480,8 Free_FBs.Begrenzer.QU Output, free limiter: upper limit reached
0748 480,8 Free_FBs.Begrenzer.QL Output, free limiter: lower limit reached
0749 480,3 Free_FBs.Comp2.QU Output, free comparator: input quantity > range
0750 480,3 Free_FBs.Comp2.QM Output, free comparator: input quantity in range
0751 480,3 Free_FBs.Comp2.QL Output, free comparator: input quantity < range
0760 490,2 Free_FBs.Free_W_B_1.Q1 FreeWord_0
0761 490,2 Free_FBs.Free_W_B_1.Q2 FreeWord_1
0762 490,2 Free_FBs.Free_W_B_1.Q3 FreeWord_2
0763 490,2 Free_FBs.Free_W_B_1.Q4 FreeWord_3
0764 490,2 Free_FBs.Free_W_B_1.Q5 FreeWord_4
0765 490,2 Free_FBs.Free_W_B_1.Q6 FreeWord_5
0766 490,2 Free_FBs.Free_W_B_1.Q7 FreeWord_6
0767 490,2 Free_FBs.Free_W_B_1.Q8 FreeWord_7
0768 490,2 Free_FBs.Free_W_B_1.Q9 FreeWord_8
0769 490,2 Free_FBs.Free_W_B_1.Q10 FreeWord_9
0770 490,2 Free_FBs.Free_W_B_1.Q11 FreeWord_10
0771 490,2 Free_FBs.Free_W_B_1.Q12 FreeWord_11
0772 490,2 Free_FBs.Free_W_B_1.Q13 FreeWord_12
0773 490,2 Free_FBs.Free_W_B_1.Q14 FreeWord_13
0774 490,2 Free_FBs.Free_W_B_1.Q15 FreeWord_14
0775 490,2 Free_FBs.Free_W_B_1.Q16 FreeWord_15