The Smart Timing Choice
The Smart Timing Choice
SiTime Corporation 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com
Rev. 1.0 Revised May 14, 2015
SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Features Applications
Frequencies between 1 MHz and 110 MHz accurate to 6 decimal
places
Industrial, medical, automotive, avionics and other high temper-
ature applications
Operating temperature from -40°C to 125°C. For -55°C option, refer
to SiT2020 and SiT2021
Industrial sensors, PLC, motor servo, outdoor networking
equipment, medical video cam, asset tracking systems, etc.
Supply voltage of 1.8V or 2.5V to 3.3V
Excellent total frequency stability as low as ±20 ppm
Low power consumption of 3.5 mA typical at 1.8V
LVCMOS/LVTTL compatible output
5-pin SOT23-5 package: 2.9mm x 2.8mm
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
For AEC-Q100 clock generators, refer to SiT2024 and SiT2025
Electrical Specifications
Table 1. Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise stated. Typical values
are at 25°C and nominal supply voltage.
Parameters Symbol Min. Typ. Max. Unit Condition
Frequency Range
Output Frequency Range f 1 110 MHz Refer to Table 14 for the exact list of supported frequencies
list of supported frequencies
Frequency Stability and Aging
Frequency Stability F_stab -20 +20 ppm Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C, and
variations over operating temperature, rated power supply
voltage and load (15 pF ± 10%).
-25 +25 ppm
-30 +30 ppm
-50 +50 ppm
Operating Temperature Range
Operating Temperature Range
(ambient)
T_use -40 +105 °C Extended Industrial
-40 +125 °C Automotive
Supply Voltage and Current Consumption
Supply Voltage Vdd 1.62 1.8 1.98 V
2.25 2.5 2.75 V
2.52 2.8 3.08 V
2.7 3.0 3.3 V
2.97 3.3 3.63 V
2.25 3.63 V
Current Consumption Idd 3.8 4.7 mA No load condition, f = 20 MHz, Vdd = 2.8V, 3.0V or 3.3V
3.6 4.5 mA No load condition, f = 20 MHz, Vdd = 2.5V
3.5 4.5 mA No load condition, f = 20 MHz, Vdd = 1.8V
OE Disable Current I_od 4.5 mA Vdd = 2.5V to 3.3V, OE = Low, Output in high Z state.
4.3 mA Vdd = 1.8V, OE = Low, Output in high Z state.
Standby Current I_std 2.6 8.5 A Vdd = 2.8V to 3.3V, ST = Low, Output is weakly pulled down
–1.45.5A Vdd = 2.5V, ST = Low, Output is weakly pulled down
–0.64.0A Vdd = 1.8V, ST = Low, Output is weakly pulled down
LVCMOS Output Characteristics
Duty Cycle DC 45 55 % All Vdds
Rise/Fall Time Tr, Tf 1.0 2.0 ns Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80%
1.3 2.5 ns Vdd =1.8V, 20% - 80%
1.0 3 ns Vdd = 2.25V - 3.63V, 20% - 80%
Output High Voltage VOH 90% Vdd IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V or 2.5V)
IOH = -2 mA (Vdd = 1.8V)
Output Low Voltage VOL 10% Vdd IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V or 2.5V)
IOL = 2 mA (Vdd = 1.8V)
The Smart Timing Choice
The Smart Timing Choice
SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 2 of 12 www.sitime.com
Notes:
1. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 3 is not externally driven.
If pin 3 needs to be left floating, use the NC option.
2. A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Table 1. Electrical Characteristics (continued)
Parameters Symbol Min. Typ. Max. Unit Condition
Input Characteristics
Input High Voltage VIH 70% Vdd Pin 3, OE or ST
Input Low Voltage VIL 30% Vdd Pin 3, OE or ST
Input Pull-up Impedence Z_in 50 87 150 kPin 3, OE logic high or logic low, or ST logic high
2––MPin 3, ST logic low
Startup and Resume Timing
Startup Time T_start 5 ms Measured from the time Vdd reaches its rated minimum value
Enable/Disable Time T_oe 130 ns f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * clock
periods
Resume Time T_resume 5 ms Measured from the time ST pin crosses 50% threshold
Jitter
RMS Period Jitter T_jitt 1.6 2.5 ps f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V
1.9 3 ps f = 75 MHz, Vdd = 1.8V
Peak-to-peak Period Jitter T_pk 12 20 ps f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V
14 25 ps f = 75 MHz, Vdd = 1.8V
RMS Phase Jitter (random) T_phj 0.5 0.8 ps f = 75 MHz,
Integration bandwidth = 900 kHz to 7.5 MHz
1.3 2 ps f = 75 MHz,
Integration bandwidth = 12 kHz to 20 MHz
Table 2. Pin Description
Pin Symbol Functionality
1 GND Power Electrical ground
2 NC No Connect No connect
3OE/ ST/
NC
Output
Enable
H[1]: specified frequency output
L: output is high impedance. Only output driver is disabled.
Standby
H or Open[1]: specified frequency output
L: output is low (weak pull down). Device goes to sleep mode. Supply
current reduces to I_std.
No Connect Any voltage between 0 and Vdd or Open[1]: Specified frequency
output. Pin 3 has no function.
4 VDD Power Power supply voltage[2]
5 OUT Output Oscillator output
GND
1
NC
2
OE/ST/NC
3
VDD
4
OUT
5
Top View
Figure 1. Pin Assignments
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The Smart Timing Choice
SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 3 of 12 www.sitime.com
N
Note:
4. Refer to JESD51 for JA and JC definitions, and reference layout used to determine the JA and JC values in the above table.
Note:
5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual perfor-
mance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter Min. Max. Unit
Storage Temperature -65 150 °C
Vdd -0.5 4 V
Electrostatic Discharge –2000V
Soldering Temperature (follow standard Pb free soldering guidelines) 260 °C
Junction Temperature[3] 150 °C
Note:
3. Exceeding this temperature for extended period of time may damage the device.
Table 4. Thermal Consideration[4]
Package
JA, 4 Layer Board
(°C/W)
JC, Bottom
(°C/W)
SOT23-5 421 175
Table 5. Maximum Operating Junction Temperature[5]
Max Operating Temperature (ambient) Maximum Operating Junction Temperature
105°C 115°C
125°C 135°C
Table 6. Environmental Compliance
Parameter Condition/Test Method
Mechanical Shock MIL-STD-883F, Method 2002
Mechanical Vibration MIL-STD-883F, Method 2007
Temperature Cycle JESD22, Method A104
Solderability MIL-STD-883F, Method 2003
Moisture Sensitivity Level MSL1 @ 260°C
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 4 of 12 www.sitime.com
Note:
7. SiT2018 has “no runt” pulses and “no glitch” output during startup or resume.
Test Circuit and Waveform[6]
Figure 2. Test Circuit
Note:
6. Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 3. Output Waveform
Timing Diagrams
Figure 4. Startup Timing (OE/ST Mode) Figure 5. Standby Resume Timing (ST Mode Only)
u
Figure 6. OE Enable Timing (OE Mode Only) Figure 7. OE Disable Timing (OE Mode Only)
5
1
4
30.1µF
Power
Supply
OE/ST Function
Test
Point
15 pF
(including probe
and fixture
capacitance)
Vdd
2
Vout
Vdd
1k
80% Vdd
High Pulse
(TH)
50%
20% Vdd
Period
TfTr
Low Pulse
(TL)
90% Vdd Vdd
Pin 4 Voltage
CLK Output
T_start
T_start: Time to start from power-off
No Glitch
during start up
[7]
HZ
50% Vdd
Vdd
ST Voltage
CLK Output
T_resume
T_resume: Time to resume from ST
HZ
50% Vdd
Vdd
OE Voltage
CLK Output
T_oe
T_oe: Time to re-enable the clock output
HZ
50% Vdd
Vdd
OE Voltage
CLK Output
T_oe: Time to put the output in High Z mode
HZ
T_oe
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 5 of 12 www.sitime.com
Performance Plots[8]
Figure 8. Idd vs Frequency Figure 9. Frequency vs Temperature
Figure 10. RMS Period Jitter vs Frequency Figure 11. Duty Cycle vs Frequency
Figure 12. 20%-80% Rise Time vs Temperature Figure 13. 20%-80% Fall Time vs Temperature
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 6 of 12 www.sitime.com
Performance Plots[8]
Figure 14. RMS Integrated Phase Jitter Random
(12k to 20 MHz) vs Frequency[9] Figure 15. RMS Integrated Phase Jitter Random
(900 kHz to 20 MHz) vs Frequency[9]
Notes:
8. All plots are measured with 15 pF load at room temperature, unless otherwise stated.
9. Phase noise plots are measured with Agilent E5052B signal source analyzer. Integration range is up to 5 MHz for carrier frequencies up to 40 MHz.
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 7 of 12 www.sitime.com
Programmable Drive Strength
The SiT2018 includes a programmable drive strength feature
to provide a simple, flexible tool to optimize the clock rise/fall
time for specific applications. Benefits from the programmable
drive strength feature are:
Improves system radiated electromagnetic interference
(EMI) by slowing down the clock rise/fall time
Improves the downstream clock receiver’s (RX) jitter by de-
creasing (speeding up) the clock rise/fall time.
Ability to drive large capacitive loads while maintaining full
swing with sharp edge rates.
For more detailed information about rise/fall time control and
drive strength selection, see the SiTime Application Notes
section: http://www.sitime.com/support/application-notes.
EMI Reduction by Slowing Rise/Fall Time
Figure 16 shows the harmonic power reduction as the rise/fall
times are increased (slowed down). The rise/fall times are
expressed as a ratio of the clock period. For the ratio of 0.05,
the signal is very close to a square wave. For the ratio of 0.45,
the rise/fall times are very close to near-triangular waveform.
These results, for example, show that the 11th clock harmonic
can be reduced by 35 dB if the rise/fall edge is increased from
5% of the period to 45% of the period.
Figure 16. Harmonic EMI reduction as a Function of
Slower Rise/Fall Time
Jitter Reduction with Faster Rise/Fall Time
Power supply noise can be a source of jitter for the
downstream chipset. One way to reduce this jitter is to speed
up the rise/fall time of the input clock. Some chipsets may also
require faster rise/fall time in order to reduce their sensitivity to
this type of jitter. Refer to the Rise/Fall Time Tables (Table 7 to
Table 11) to determine the proper drive strength.
High Output Load Capability
The rise/fall time of the input clock varies as a function of the
actual capacitive load the clock drives. At any given drive
strength, the rise/fall time becomes slower as the output load
increases. As an example, for a 3.3V SiT2018 device with
default drive strength setting, the typical rise/fall time is 1ns for
15 pF output load. The typical rise/fall time slows down to
2.6 ns when the output load increases to 45 pF. One can
choose to speed up the rise/fall time to 1.83 ns by then
increasing the drive strength setting on the SiT2018.
The SiT2018 can support up to 60 pF in maximum capacitive
loads with drive strength settings. Refer to the Rise/Tall Time
Tables (Table 7 to 11) to determine the proper drive strength
for the desired combination of output load vs. rise/fall time
SiT2018 Drive Strength Selection
Tables 7 through 11 define the rise/fall time for a given capac-
itive load and supply voltage.
1. Select the table that matches the SiT2018 nominal supply
voltage (1.8V, 2.5V, 2.8V, 3.0V, 3.3V).
2. Select the capacitive load column that matches the appli-
cation requirement (5 pF to 60 pF)
3. Under the capacitive load column, select the desired
rise/fall times.
4. The left-most column represents the part number code for
the corresponding drive strength.
5. Add the drive strength code to the part number for ordering
purposes.
Calculating Maximum Frequency
Based on the rise and fall time data given in Tables 7 through
11, the maximum frequency the oscillator can operate with
guaranteed full swing of the output voltage over temperature
can be calculated as the following:
where Trf_20/80 is the typical value for 20%-80% rise/fall
time.
Example 1
Calculate fMAX for the following condition:
Vdd = 1.8V (Table 7)
Capacitive Load: 30 pF
Desired Tr/f time = 3 ns (rise/fall time part number code = E)
Part number for the above example:
SiT2018BIES2-18E-66.666660
Drive strength code is inserted here. Default setting is “-”
1357911
-80
-70
-60
-50
-40
-30
-20
-10
0
10
Harmonic number
Harmonic amplitude (dB)
trise=0.05
trise=0.1
trise=0.15
trise=0.2
trise=0.25
trise=0.3
trise=0.35
trise=0.4
trise=0.45
=1
5 x Trf_20/80
Max Frequency
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 8 of 12 www.sitime.com
Rise/Fall Time (20% to 80%) vs CLOAD Tables
Table 7. Vdd = 1.8V Rise/Fall Times for Specific CLOAD Table 8. Vdd = 2.5V Rise/Fall Times for Specific CLOAD
Table 9. Vdd = 2.8V Rise/Fall Times for Specific CLOAD Table 10. Vdd = 3.0V Rise/Fall Times for Specific CLOAD
Table 11. Vdd = 3.3V Rise/Fall Times for Specific CLOAD
DriveStrength\CLOAD 5pF 15pF 30pF 45pF 60pF
L6.16 11. 61 22.00 31.27 39.91
A3.19 6.35 11.00 16.01 21.52
R2. 11 4.31 7.65 10.77 14.47
B1.65 3.23 5.79 8.18 11.08
T0.93 1.91 3.32 4.66 6.48
E0.78 1.66 2.94 4.09 5.74
U0.70 1.48 2.64 3.68 5.09
For"":default 0.65 1.30 2.40 3.35 4.56
Rise/FallTimeTyp(ns)
DriveStrength\CLOAD 5pF 15pF 30pF 45pF 60pF
L4.13 8.25 12.82 21.45 27.79
A2.11 4.27 7.64 11.20 14.49
R1.45 2.81 5.16 7.65 9.88
B1.09 2.20 3.88 5.86 7.57
T0.62 1.28 2.27 3.51 4.45
Eor"":default 0.54 1.00 2.01 3.10 4.01
U0.43 0.96 1.81 2.79 3.65
F0.34 0.88 1.64 2.54 3.32
Rise/FallTimeTyp(ns)
DriveStrength\CLOAD 5pF 15pF 30pF 45pF 60pF
L3.77 7.54 12.28 19.57 25.27
A1.94 3.90 7.03 10.24 13.34
R1.29 2.57 4.72 7.01 9.06
B0.97 2.00 3.54 5.43 6.93
T0.55 1.12 2.08 3.22 4.08
Eor"":default 0. 44 1.00 1.83 2.82 3.67
U0.34 0.88 1.64 2.52 3.30
F0.29 0.81 1.48 2.29 2.99
Rise/FallTimeTyp(ns)
DriveStrength\CLOAD 5pF 15pF 30pF 45pF 60pF
L3.60 7. 21 11.97 18.74 24.30
A1.84 3.71 6.72 9.86 12.68
R1.22 2. 46 4.54 6.76 8. 62
B0.89 1.92 3.39 5.20 6.64
Tor"":default 0. 51 1.00 1.97 3.07 3.90
E0.38 0.92 1.72 2.71 3.51
U0.30 0.83 1.55 2.40 3.13
F0.27 0.76 1.39 2.16 2.85
Rise/FallTimeTyp(ns)
DriveStrength\CLOAD 5pF 15pF 30pF 45pF 60pF
L3.39 6.88 11.63 17.56 23.59
A1.74 3.50 6.38 8.98 12.19
R1.16 2.33 4.29 6.04 8.34
B0.81 1.82 3.22 4.52 6.33
Tor"":default 0.46 1.00 1.86 2.60 3.84
E0.33 0.87 1.64 2.30 3.35
U0.28 0.79 1.46 2.05 2.93
F0.25 0.72 1.31 1.83 2.61
Rise/FallTimeTyp(ns)
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 9 of 12 www.sitime.com
Pin 3 Configuration Options (OE, ST, or NC)
Pin 3 of the SiT2018 can be factory-programmed to support
three modes: Output Enable (OE), standby (ST) or No
Connect (NC).
Output Enable (OE) Mode
In the OE mode, applying logic Low to the OE pin only disables
the output driver and puts it in Hi-Z mode. The core of the
device continues to operate normally. Power consumption is
reduced due to the inactivity of the output. When the OE pin is
pulled High, the output is typically enabled in <1µs.
Standby (ST) Mode
In the ST mode, a device enters into the standby mode when
Pin 3 pulled Low. All internal circuits of the device are turned
off. The current is reduced to a standby current, typically in the
range of a few µA. When ST is pulled High, the device goes
through the “resume” process, which can take up to 5 ms.
No Connect (NC) Mode
In the NC mode, the device always operates in its normal
mode and outputs the specified frequency regardless of the
logic level on pin 3.
Table 12 below summarizes the key relevant parameters in the
operation of the device in OE, ST, or NC mode.
Output on Startup and Resume
The SiT2018 comes with gated output. Its clock output is
accurate to the rated frequency stability within the first pulse
from initial device startup or resume from the standby mode.
In addition, the SiT2018 supports “no runt” pulses, and no
glitch” output during startup or resume as shown in the
waveform captures in Figure 17 and Figure 18.
Figure 17. Startup Waveform vs. Vdd
Figure 18. Startup Waveform vs. Vdd
(Zoomed-in View of Figure 17)
Table 12. OE vs. ST vs. NC
OE ST NC
Active current 20 MHz (max, 1.8V) 4.5 mA 4.5 mA 4.5 mA
OE disable current (max. 1.8V) 4.3 mA N/A N/A
Standby current (typical 1.8V) N/A 0.6 uA N/A
OE enable time at 110 MHz (max) 130 ns N/A N/A
Resume time from standby
(max, all frequency)
N/A 5 ms N/A
Output driver in OE disable/standby mode High Z weak
pull-down
N/A
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 10 of 12 www.sitime.com
Notes:
10.Top marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device.
11. A capacitor value of 0.1 µF between Vdd and GND is required
Dimensions and Patterns
Package Size – Dimensions (Unit: mm)[10] Recommended Land Pattern (Unit: mm)[11]
2.90 x 2.80 mm SOT23-5
Table 13. Dimension Table
Symbol Min. Nom. Max.
A 0.90 1.25 1.45
A1 0.00 0.05 0.15
A2 0.90 1.10 1.30
b 0.35 0.40 0.50
c 0.08 0.15 0.20
D 2.80 2.90 3.00
E 2.60 2.80 3.00
E1 1.50 1.625 1.75
L 0.35 0.45 0.60
L1 0.60 REF
e 0.95 BSC.
e1 1.90 BSC.
2.5°
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Rev. 1.0 Page 11 of 12 www.sitime.com
Ordering Information
The Part No. Guide is for reference only. To customize and build an exact part number, use the SiTime Part Number
Generator.
Notes:
12. Any frequency within the min and max values in the above table are supported with 6 decimal places of accuracy.
13. Please contact SiTime for frequencies that are not listed in the tables above.
Table 14. List of Supported Frequencies[12, 13]
Frequency Range
(-40 to +105°C or -40 to +125°C)
Min. Max.
1.000000 MHz 61.222999 MHz
61.674001 MHz 69.795999 MHz
70.485001 MHz 79.062999 MHz
79.162001 MHz 81.427999 MHz
82.232001 MHz 91.833999 MHz
92.155001 MHz 94.248999 MHz
94.430001 MHz 94.874999 MHz
94.994001 MHz 97.713999 MHz
98.679001 MHz 110.000000 MHz
Frequency
Refer to the Supported
Frequencies Table below
Part Family
“SiT2018”
Revision Letter
“B” is the revision
Temperature Range
Supply Voltage
“18” for 1.8V ±10%
“25” for 2.5V ±10%
“28” for 2.8V ±10%
“33” for 3.3V ±10%
Feature Pin
“E” for Output Enable
“S” for Standby
Frequency Stability
“1” for ±20 ppm
“2” for ±25 ppm
Package Size
SiT2018BA -S2-18E -25.000025D
“3” for ±50 ppm
“30” for 3.0V ±10%
Packing Method
“D”: 8 mm Tape & Reel, 3ku reel
“E”: 8 mm Tape & Reel, 1ku reel
Blank for Bulk
“E” Ext. Industrial -40ºC to 105ºC
“A” Automotive -40ºC to 125ºC
“XX” for 2.5V -10% to 3.3V +10%
Output Drive Strength
“–” Default (datasheet limits)
See Tables 7 to 11 for rise/fall
times
“L”
“A”
“R”
“B”
“T”
“E”
“U”
“F”
“8” for ±30 ppm
“N” for No Connect
“S” SOT23-5 (2.9 x 2.8 mm)
Rev. 1.0 Page 12 of 12 www.sitime.com
© SiTime Corporation 2015. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a
Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or accident, (iii)
unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv) improper
installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
Disclaimer: SiTime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all express or implied warranties, either in fact or by
operation of law, statutory or otherwise, including the implied warranties of merchantability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing or
usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any SiTime product and any product documentation. Products sold by
SiTime are not suitable or intended to be used in a life support application or component, to operate nuclear facilities, or in other mission critical applications where human life may be involved
or at stake. All sales are made conditioned upon compliance with the critical uses policy set forth below.
CRITICAL USE EXCLUSION POLICY
BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS USED IN LIFE SUPPORT DEVICES OR TO OPERATE NUCLEAR FACILITIES
OR FOR USE IN OTHER MISSION-CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPERTY MAY BE AT STAKE.
SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products
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prohibited.
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SiT2018B
High Temp, Single-Chip, One-Output Clock Generator
Table 15. Additional Information
Document Description Download Link
Time Machine II MEMS oscillator programmer http://www.sitime.com/support/time-machine-oscillator-programmer
Field
Programmable
Oscillators
Devices that can be
programmable in the field by
Time Machine II
http://www.sitime.com/products/field-programmable-oscillators
Manufacturing
Notes
Tape & Reel dimension, reflow
profile and other
manufacturing related info
http://www.sitime.com/component/docman/doc_download/243-manufacturing-notes-for-sitime-oscillators
Qualification
Reports
RoHS report, reliability
reports, composition reports
http://www.sitime.com/support/quality-and-reliability
Performance
Reports
Additional performance data
such as phase noise, current
consumption and jitter for
selected frequencies
http://www.sitime.com/support/performance-measurement-report
Termination
Techniques
Termination design
recommendations
http://www.sitime.com/support/application-notes
Layout Techniques Layout recommendations http://www.sitime.com/support/application-notes
Revision History
Table 16. Datasheet Version and Change Log
Version Release Date Change Summary
1.0 5/14/15 Final Production Release.
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Supplemental Information
The Supplemental Information section is not part of the datasheet and is for informational purposes only.
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Silicon MEMS Outperforms Quartz Rev. 1.1 Revised October 5, 2013
Silicon MEMS Outperforms Quartz
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Silicon MEMS Outperforms Quartz Rev. 1.1 www.sitime.com
Best Reliability
Silicon is inherently more reliable than quartz. Unlike quartz
suppliers, SiTime has in-house MEMS and analog CMOS
expertise, which allows SiTime to develop the most reliable
products. Figure 1 shows a comparison with quartz
technology.
Why is SiTime Best in Class:
SiTime’s MEMS resonators are vacuum sealed using an
advanced EpiSeal™ process, which eliminates foreign par-
ticles and improves long term aging and reliability
World-class MEMS and CMOS design expertise
Figure 1. Reliability Comparison[1]
Best Aging
Unlike quartz, MEMS oscillators have excellent long term
aging performance which is why every new SiTime product
specifies 10-year aging. A comparison is shown in Figure 2.
Why is SiTime Best in Class:
SiTime’s MEMS resonators are vacuum sealed using an
advanced EpiSeal process, which eliminates foreign parti-
cles and improves long term aging and reliability
Inherently better immunity of electrostatically driven
MEMS resonator
Figure 2. Aging Comparison[2]
Best Electro Magnetic Susceptibility (EMS)
SiTime’s oscillators in plastic packages are up to 54 times
more immune to external electromagnetic fields than quartz
oscillators as shown in Figure 3.
Why is SiTime Best in Class:
Internal differential architecture for best common mode
noise rejection
Electrostatically driven MEMS resonator is more immune
to EMS
Figure 3. Electro Magnetic Susceptibility (EMS)[3]
Best Power Supply Noise Rejection
SiTime’s MEMS oscillators are more resilient against noise on
the power supply. A comparison is shown in Figure 4.
Why is SiTime Best in Class:
On-chip regulators and internal differential architecture for
common mode noise rejection
Best analog CMOS design expertise
Figure 4. Power Supply Noise Rejection[4]
Mean Time Between Failure (Million Hours)
14
16
28
38
500
0200 400 600
Pericom
TXC
Epson
IDT (Fox)
SiTime
SiTime
20X Better
1.5
3.5
3.0
8.0
0
2
4
6
8
10
1-Year 10-Year
SiTime MEMS vs. Quartz Aging
SiTime MEMS Oscillator Quartz Oscillator
Aging (±PPM)
SiTime
2X Better
- 39 - 40 - 42 - 43 - 45
- 73
- 90
- 80
- 70
- 60
- 50
- 40
- 30
Kyocera Epson TXC CW SiLabs SiTime
SiTime vs Quartz
Electro Magnetic Susceptibility (EMS)
Average Spurs (dB)
SiTime
54X Better
0.0
1.0
2.0
3.0
4.0
5.0
10 100 1,000 10,000
Additive Integrated Phase Jitter per mVp-p
Injected Noise (ps/mv)
Power Supply Noise Frequency (kHz)
Power Supply Noise Rejection
SiTIme NDK Epson Kyocera
SiTime
SiTime
3X Better
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Silicon MEMS Outperforms Quartz
Silicon MEMS Outperforms Quartz Rev. 1.1 www.sitime.com
Best Vibration Robustness
High-vibration environments are all around us. All electronics,
from handheld devices to enterprise servers and storage
systems are subject to vibration. Figure 5 shows a comparison
of vibration robustness.
Why is SiTime Best in Class:
The moving mass of SiTime’s MEMS resonators is up to
3000 times smaller than quartz
Center-anchored MEMS resonator is the most robust
design
Figure 5. Vibration Robustness[5]
Best Shock Robustness
SiTime’s oscillators can withstand at least 50,000 g shock.
They all maintain their electrical performance in operation
during shock events. A comparison with quartz devices is
shown in Figure 6.
Why is SiTime Best in Class:
The moving mass of SiTime’s MEMS resonators is up to
3000 times smaller than quartz
Center-anchored MEMS resonator is the most robust
design
Figure 6. Shock Robustness[6]
Vibration Sensitivity (ppb/g)
0.10
1.00
10.00
100.00
10 100 1000
Vibration Frequency (Hz)
Vibration Sensitivity vs. Frequency
SiTime TXC Epson Connor Winfield Kyocera SiLabs
SiTime
Up to 30x
Better
14.3
12.6
3.9
2.9 2.5
0.6
0
2
4
6
8
10
12
14
16
K
y
ocer
a
E
p
son TXC CW SiLab
s
SiTime
Differential XO Shock Robustness - 500 g
SiTime
Up to 25x
Better
Peak Frequency Deviation (PPM)
Notes:
1. Data Source: Reliability documents of named companies.
2. Data source: SiTime and quartz oscillator devices datasheets.
3. Test conditions for Electro Magnetic Susceptibility (EMS):
• According to IEC EN61000-4.3 (Electromagnetic compatibility standard)
• Field strength: 3V/m
• Radiated signal modulation: AM 1 kHz at 80% depth
• Carrier frequency scan: 80 MHz – 1 GHz in 1% steps
• Antenna polarization: Vertical
• DUT position: Center aligned to antenna
Devices used in this test:
SiTime, SiT9120AC-1D2-33E156.250000 - MEMS based - 156.25 MHz
Epson, EG-2102CA 156.2500M-PHPAL3 - SAW based - 156.25 MHz
TXC, BB-156.250MBE-T - 3rd Overtone quartz based - 156.25 MHz
Kyocera, KC7050T156.250P30E00 - SAW based - 156.25 MHz
Connor Winfield (CW), P123-156.25M - 3rd overtone quartz based - 156.25 MHz
SiLabs, Si590AB-BDG - 3rd overtone quartz based - 156.25 MHz
4. 50 mV pk-pk Sinusoidal voltage.
Devices used in this test:
SiTime, SiT8208AI-33-33E-25.000000, MEMS based - 25 MHz
NDK, NZ2523SB-25.6M - quartz based - 25.6 MHz
Kyocera, KC2016B25M0C1GE00 - quartz based - 25 MHz
Epson, SG-310SCF-25M0-MB3 - quartz based - 25 MHz
5. Devices used in this test: same as EMS test stated in Note 3.
6. Test conditions for shock test:
• MIL-STD-883F Method 2002
• Condition A: half sine wave shock pulse, 500-g, 1ms
• Continuous frequency measurement in 100 μs gate time for 10 seconds
Devices used in this test: same as EMS test stated in Note 3
7. Additional data, including setup and detailed results, is available upon request to qualified customers. Please contact productsupport@sitime.com.
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Document Feedback Form
Feedback Form Rev. 1.0 www.sitime.com
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