© Semiconductor Components Industries, LLC, 2015
April, 2017 − Rev. 0 1Publication Order Number:
NCV47722/D
NCV47722
High Side Switch with
Adjustable Current Limit and
Diagnostic Features
The NCV47722 High Side Switch (HSS) with 250 mA is designed
for use in harsh automotive environments. The device has a high peak
input voltage tolerance and reverse input voltage, reverse bias,
overcurrent and overtemperature protections. The integrated current
sense feature (adjustable by resistor connected to CSO pin) provides
diagnosis and system protection functionality. The CSO pin output
current creates voltage drop across CSO resistor which is proportional
to output current. Extended diagnostic features in OFF state are also
available and controlled by dedicated input and output pins.
Features
•Output Current: up to 250 mA
•Enable Input (3.3 V Logic Compatible)
•Adjustable Current Limit: up to 350 mA
•Protection Features:
♦Current Limitation
♦Thermal Shutdown
♦Reverse Input Voltage and Reverse Bias Voltage
•Diagnostic Features:
♦Short To Battery (STB) and Open Load (OL) in OFF State
♦Internal Components for OFF State Diagnostics
♦Open Collector Flag Output
♦Output Voltage Monitoring Output (analog)
•AEC−Q100 Grade 1 Qualified and PPAP Capable
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
•Audio and Infotainment System
•Active Safety System
Figure 1. Application Schematic
Vout
GND
Vin
CSO
EN
Cin
Cout
RCSO
CCSO
1µF
1µF
NCV47722
1µF
DE
EF
Diagnostic Enable Input
Error Flag Output (Open Collector)
Vout_FB
To A/D
*Vout_FB is sensed Vout output voltage via internal resistor divider
This document contains information on some products that are still under development.
ON Semiconductor reserves the right to change or discontinue these products without
notice.
www.onsemi.com
MARKING
DIAGRAM
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
TSSOP−14
Exposed Pad
CASE 948AW
NCV4
7722
ALYWG
G
1
14
1
14
1
8
SO−8
Exposed Pad
PD SUFFIX
CASE 751AC
(In Development) 1
8
47722
ALYWG
G
47722 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G= Pb−Free Package
47722
ALYWG
G
1
(Note: Microdot may be in either location)
1
DFN8
MNW SUFFIX
CASE 506BY
(In Development)
1
8
SO−8
D SUFFIX
CASE 751
(In Development)
47722
ALYWG
G
1
8
NCV47722
www.onsemi.com
2
Figure 2. Simplified Block Diagram
2.55 V
VOLTAGE
REFERENCE
THERMAL
SHUTDOWN
SATURATION
PROTECTION
EN CSO
PASS DEVICE
AND
CURRENT MIRROR
DE
IPU_ON
EF
STB_OL_OFF
GND
+
−
+
−0.95x
STB_OL_OFF
OC_ON
+
−
DIAGNOSTIC
CONTROL
LOGIC
OC_ON
PD_ON
EN
ENENABLE
PD_ON
500k
100k
1.05 V
780k
780k
10 mA
IPU_ON
*) for current value of RATIO see into Electrical Characteristic Table
VREF
VREF_OFF
Vin
IPU
RPD_ON
RPD_DE
Vout
VREF
ICSO = Iout / RATIO*
VREF
RPD1
RPD2
VREF_OFF
Vout_FB
NCV47722
www.onsemi.com
3
EPAD
NC
NC
NC
GND
EN
CSO
411
NC
NC
EF
DE
Figure 3. Pin Connections (Top Views)
NC
DFN8
EF
DE
GND
EN
CSO
EF
DE
GND
EN
CSO
SO−8, SO−8 EPAD
TSSOP−14 EPAD
18 18
Vout
Vout_FB
Vin
Vout
Vout_FB
Vin
Vout
Vout_FB
Vin
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
TSSOP−14
EPAD Pin No.
SO−8
Pin No.
SO−8 EPAD,
DFN8 Pin Name Description
1 − − NC Not Connected, not internally bonded.
2 − − NC Not Connected, not internally bonded.
3 − − NC Not Connected, not internally bonded.
4 2 2 GND Power Supply Ground.
5 3 3 EN Enable Input; low level disables regulator. (Used also for OFF state diagnos-
tics control.
6 4 4 CSO Current Sense Output, Current Limit setting and Output Current value informa-
tion. See Application Section for more details.
7 5 5 Vin Power Supply Input.
8 8 8 Vout Regulated Output Voltage.
9 1 1 Vout_FB Output Voltage Analog Monitoring. See Application Section for more details.
10 6 6 DE Diagnostic Enable Input.
11 7 7 EF Error Flag (Open Collector) Output. Active Low.
12 − − NC Not Connected, not internally bonded.
13 − − NC Not Connected, not internally bonded.
14 − − NC Not Connected, not internally bonded.
EPAD − EPAD EPAD Exposed Pad is connected to Ground. Connect to GND plane on PCB.
NCV47722
www.onsemi.com
4
Table 2. MAXIMUM RATINGS
Rating Symbol Min Max Unit
Input Voltage DC Vin −42 45 V
Input Voltage (Note 1)
Load Dump − Suppressed Us* − 60 V
Enable Input Voltage VEN −42 45 V
Output Voltage Monitoring Vout_FB −0.3 10 V
CSO Voltage VCSO −0.3 7 V
DE, CS and EF Voltages VDE, VCS, VEF −0.3 7 V
Output Voltage Vout −1 40 V
Junction Temperature TJ−40 150 °C
Storage Temperature TSTG −55 150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be af fected.
1. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in
production. Passed Class A according to ISO16750−1.
Table 3. ESD CAPABILITY (Note 2)
Rating Symbol Min Max Unit
ESD Capability, Human Body Model ESDHBM −2 2 kV
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes < 50 mm2 due
to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current waveform
characteristic defined in JEDEC JS−002−2014.
Table 4. LEAD SOLDERING TEMPERATURE AND MSL (Note 3)
Rating Symbol Min Max Unit
Moisture Sensitivity Level MSL 1 −
3. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
THERMAL CHARACTERISTICS (Note 4)
Rating Symbol Value Unit
Thermal Characteristics (single layer PCB)
Thermal Resistance, Junction−to−Air (Note 5)
Thermal Reference, Junction−to−Lead (Note 5) RθJA
RψJL 62.6
23.7
°C/W
Thermal Characteristics (4 layers PCB)
Thermal Resistance, Junction−to−Air (Note 5)
Thermal Reference, Junction−to−Lead (Note 5) RθJA
RψJL 44.1
16.8
°C/W
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
5. Values based on copper area of 645 mm2 (or 1 in 2) of 1 oz copper thickness and FR4 PCB substrate. Single layer − according to JEDEC51.3,
4 layers − according to JEDEC51.7
Table 5. RECOMMENDED OPERATING RANGES
Rating Symbol Min Max Unit
Input Voltage (Note 6) Vin 4.4 40 V
Output Current Limit (Note 7) ILIM 10 350 mA
Junction Temperature TJ−40 150 °C
Current Sense Output (CSO) Capacitor CCSO 1 4.7 mF
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
6. Minimum Vin = 4.4 V or (Vout + 0.5 V), whichever is higher.
7. Corresponding RCSO is in range from 76.5 kW down to 2185 W.
NCV47722
www.onsemi.com
5
Table 6. ELECTRICAL CHARACTERISTICS Vin = 13.5 V, VEN = 3.3 V, RCSO = 0 W, CCSO = 1 mF, Cin = 1 mF, Cout = 1 mF, Min and
Max values are valid for temperature range −40°C v TJ v +150°C unless noted otherwise and are guaranteed by test, design or
statistical correlation. Typical values are referenced to TJ = 25°C (Note 8)
Parameter Test Conditions Symbol Min Typ Max Unit
OUTPUTS
Input to Output Differential Voltage Vin = 8 V to 18 V
Iout = 200 mA
Iout = 250 mA
Vin−out −
−200
225 350
400
mV
CURRENT LIMIT PROTECTION
Current Limit Vout = Vin – 1 V ILIM 350 − − mA
DISABLE AND QUIESCENT CURRENTS
Disable Current VEN = 0 V IDIS − 0.002 10 mA
Quiescent Current, Iq = Iin − Iout Iout = 500 mA, Vin = 8 V to 18 V Iq− 0.5 1.3 mA
Quiescent Current, Iq = Iin – Iout Iout = 200 mA, Vin = 8 V to 18 V Iq− 8 19 mA
Quiescent Current, Iq = Iin – Iout Iout = 250 mA, Vin = 8 V to 18 V Iq−11 25 mA
ENABLE
Enable Input Threshold Voltage
Logic Low (OFF)
Logic High (ON) Vout v 0.1 V
Vout w Vin – 1 V
Vth(EN) 0.99
−1.8
1.9 −
2.31
V
Enable Input Current VEN = 3.3 V IEN 2 9 20 mA
Turn On Time
from Enable ON to Vout = Vin – 1 V Iout = 100 mA ton − 25 − ms
OUTPUT CURRENT SENSE
CSO Voltage Level at Current Limit Vout = Vin – 1 V
RCSO = 3.3 kΩ VCSO_Ilim 2.448
(−4%) 2.55 2.652
(+4%) V
CSO Transient Voltage Level CCSO = 4.7 mF, RCSO = 3.3 kΩ
Iout pulse from 10 mA to 350 mA, tr = 1 msVCSO − − 3.3 V
Output Current to CSO Current Ratio VCSO = 2 V, Iout = 10 mA to 50 mA
Vin = 8 V to 18 V, −40℃ v TJ v +150℃Iout/ICSO −
(−15%) 265 −
(+15%) −
Output Current to CSO Current Ratio VCSO = 2 V, Iout = 50 mA to 350 mA
Vin = 8 V to 18 V, −40℃ v TJ v +150℃Iout/ICSO −
(−5%) 285 −
(+5%) −
CSO Current at no Load Current VCSO = 0 V, Iout = 0 mA ICSO_off − − 15 mA
DIAGNOSTICS
Overcurrent Voltage Level Threshold Vout = Vin – 1 V
RCSO = 3.3 kΩVOC 92 95 98 % of
VCSO_
Ilim
Short To Battery (STB) Voltage
Threshold in OFF state Vin = 4.4 V to 18 V, Iout = 0 mA VSTB 2 3 4 V
Open Load (OL) Current Threshold in
OFF state Vin = 4.4 V to 18 V IOL 5 10 25 mA
Output Voltage to Output Feedback
Voltage Ratio Vin = 4.4 V to 18 V Vout/VoutFB 5.7 6 6.3 −
Diagnostics Enable Threshold Voltage
Logic Low (OFF)
Logic High (ON)
Vth(DE) 0.99
−1.8
1.9 −
2.31
V
Error Flag Low Voltage IEF = −1 mA VEF_Low − 0.04 0.4 V
THERMAL SHUTDOWN
Thermal Shutdown Temperature (Note 9) Iout = 90 mA TSD 150 175 195 °C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [ TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Values based on design and/or characterization.
NCV47722
www.onsemi.com
6
TYPICAL CHARACTERISTICS
Figure 4. Input to Output Differential Voltage
vs. Temperature Figure 5. Input to Output Differential Voltage
vs. Output Current
TJ, JUNCTION TEMPERATURE (°C) Iout, OUTPUT CURRENT (mA)
1401008060400−20−40
0350300250200150100500
0
50
100
150
200
300
350
400
Figure 6. Output Current Limit vs. Input
Voltage Figure 7. Input Current vs. Input Voltage
(Reverse Input Voltage)
Vin, INPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V)
40353020151050
500
550
600
650
700
800
850
900
−5−15−20−25−30−35−40−45
−3.5
−3.0
−2.5
−2.0
−1.5
−1.0
−0.5
0
Figure 8. Output Current Limit vs. RCSO Figure 9. CSO Voltage vs. Output Current
(% of ILIM)
RCSO (kW)Iout, OUTPUT CURRENT (% of ILIM)
706050403020100
0
50
100
150
200
300
350
400
908070503020100
0
0.5
1.0
1.5
2.0
2.5
3.0
Vin−out, INPUT TO OUTPUT
DIFFERENTIAL VOLTAGE (mV)
ILIM, OUTPUT CURRENT LIMIT (mA)
Iin, INPUT CURRENT (mA)
ILIM, OUTPUT CURRENT LIMIT (mA)
VCSO, CSO VOLTAGE (V)
Vout = (Vin − 1 V) V
TJ = 150°C
TJ = 25°C
TJ = −40°C
25 45
750
TJ = 25°C
Rout = 3.3 kW
−10 0
TJ = 150°C
TJ = 25°C
TJ = −40°C
Vin = 13.5 V
400
250
20 120 160
Vin−out, INPUT TO OUTPUT
DIFFERENTIAL VOLTAGE (mV)
50
100
150
200
300
350
400
250
Vin = 13.5 V Iout = 350 mA
Iout = 200 mA
Iout = 15 mA
80
250
40 60 100 110
TJ = −40°C to 150°C
ILIM = 10 mA to 350 mA
NCV47722
www.onsemi.com
7
TYPICAL CHARACTERISTICS
Figure 10. Quiescent Current vs. Output
Current (Low Load) Figure 11. Quiescent Current vs. Output
Current (High Load)
Iout, OUTPUT CURRENT (mA) Iout, OUTPUT CURRENT (mA)
20151050
0.4
0.5
0.6
0.7
0.8
0.9
1.0
300250200 350150100500
0
2
6
8
10
14
16
20
Figure 12. Output Current to CSO Current
Ratio vs. Output Current
Iout, OUTPUT CURRENT (mA)
100010010
250
260
270
275
290
295
300
310
Iq, QUIESCENT CURRENT (mA)
Iq, QUIESCENT CURRENT (mA)
Iout/ICSO, OUTPUT CURRENT TO
CSO CURRENT RATIO (−)
255
265
280
285
305
4
12
18
TJ = 25°C
Vin = 13.5 V
TJ = 25°C
Vin = 13.5 V TJ = 25°C
Vin = 13.5 V
DEFINITIONS
General
All measurements are performed using short pulse low
duty cycle techniques to maintain junction temperature as
close as possible to ambient temperature.
Input to Output Differential Voltage
The Input to Output Differential Voltage parameter is
defined for specific output current values and specified over
Temperature range.
Quiescent and Disable Currents
Quiescent Current (Iq) is the dif ference between the input
current (measured through the LDO input pin) and the
output load current. If Enable pin is set to LOW the regulator
reduces its internal bias and shuts off the output, this term is
called the disable current (IDIS).
Current Limit
Current Limit is value of output current by which output
voltage drops below 90% of its nominal value.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature i s exceeded. When activated at typically 175°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Maximum Package Power Dissipation
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
NCV47722
www.onsemi.com
8
APPLICATIONS INFORMATION
Circuit Description
The NCV47722 is an integrated High Side Switch (HSS)
with output current capability up to 250 mA to output. It is
enabled with an input to the enable pin. The integrated
current sense feature provides diagnosis and system
protection functionality. The current limit of the device is
adjustable by resistor connected to CSO pin. Voltage on
CSO pin is proportional to output current. The HSS is
protected by both current limit and thermal shutdown.
Thermal shutdown occurs above 150°C to protect the IC
during overloads and extreme ambient temperatures.
Enable Input
The enable pin is used to turn the regulator on or off. By
holding the pin down to a voltage less than 0.99 V, the output
of the regulator will be turned off. When the voltage on the
enable pin is greater than 2.31 V, the output of the regulator
will be enabled to power its output to the regulated output
voltage. The enable pin may be connected directly to the
input pin to give constant enable to the output regulator.
Setting the Output Current Limit
The output current limit can be set up to 350 mA by
external resistor RCSO (see Figure 1). Capacitor CCSO of
1mF in parallel with RCSO is required for stability of current
limit control circuitry (see Figure 1).
VCSO +Iout ǒRCSO 1
RATIOǓ(eq. 1)
ILIM +RATIO 2.55
RCSO (eq. 2)
RCSO +RATIO 2.55
ILIM (eq. 3)
where
RCSO − current limit setting resistor
VCSO voltage at CSO pin proportional to Iout
ILIM − current limit value
Iout − output current actual value
RATIO − typical value of Output Current to CSO
Current Ratio for particular output current
range
CSO pin provides information about output current actual
value. The CSO voltage is proportional to output current
according to Equation 1.
Once output current reaches its limit value (ILIM) set by
external resistor RCSO than voltage at CSO pin is typically
2.55 V. Calculations of ILIM or RCSO values can be done
using Equation 2 and Equation 3, respectively. Minimum
and maximum value of Output Current Limit can be
calculated according to Equations 4 and 5.
(eq. 4)
ILIM_min +RATIOmin VCSO_min
RCSO_max
(eq. 5)
ILIM_max +RATIOmax VCSO_max
RCSO_min
where
RATIOmin − minimum value of Output Current to
CSO Current Ratio from electrical
characteristics table and particular output
current range
RATIOmax − maximum value of Output Current to
CSO Current Ratio from electrical
characteristics table and particular output
current range
VCSO_min minimum value of CSO Voltage Level at
Current Limit from electrical characteristics
table
VCSO_max maximum value of CSO Voltage Level at
Current Limit from electrical characteristics
table
RCSO_min − minimum value of RCSO with respect its
accuracy
RCSO_max − maximum value of RCSO with respect its
accuracy
Designers should consider the tolerance of RCSO during
the design phase.
Diagnostic in OFF State
The NCV47722 contains also circuitry for OFF state
diagnostics for Short to Battery (STB) and Open Load (OL).
There are internal current source and Pull Down resistors
which provide additional cost savings for overall application
by excluding external components and their assembly cost
and saving PCB space and safe control IOs of a
Microcontroller Unit (MCU).
Simplified functional schematic and truth table is shown
in Figure 13 and related flowchart in Figure 14.
NCV47722
www.onsemi.com
9
Figure 13. Simplified Functional Diagram of OFF
State Diagnostics (STB and OL)
Vout
+
−VREF_OFF
EF
PASS DEVICE is OFF in Diagnostics
Mode in OFF state
Vin
Current source enabled via EN and DE pins
Comparator active only in Diagnostic
state (DE = H).
IPU
EN – Enable (Logic Input)
DE – Diagnostics Enable (Logic Input)
EF– Error Flag Output (Open Collector Output)
EN
DE
RPD1
RPD2
Digital Diagnostics:
to MCU’s digital input
with pull−up resistor
to MCU’s DIO supply rail
EN DE IPU EF Vout Diagnostic Status/Action
L L OFF HZ Unknown None (Diagnostics OFF)
L H OFF L Vout > Vout_OFF Short to Battery (STB)
L H OFF HZ Vout < Vout_OFF Check for Open Load (OL)
HHONLV
out > Vout_OFF Open Load (OL)
H H ON HZ Vout < Vout_OFF No Failure (V out close to 0 V)
For diagnostics in OFF state the input DE pin has to be put
logic high. Logic level on EN pin determines which failure
(STB or OL) is diagnosed. For detailed information see
Diagnostic Truth Table 7.
Diagnostic in ON State
Diagnostic in ON State provides information about
Overcurrent or Short to Ground failures, during which the
EF output is in logic low state. For detailed information see
Diagnostic Features Truth Table 7.
Start
Diag. OFF. Set
EN = L & DE = L
EF = ?
Diag. ON. Set
EN = L & DE = H
L
HZ
EF = ? L
HZ
No Failure Open Load Short to Battery
Figure 14. Flowchart for Diagnostics in OFF State
IPU ON. Set
EN = H & DE = H
Table 7. DIAGNOSTIC FEATURES TRUTH TABLE
Operational Status EN DE Output Voltage (Vout)Diagnostic Output (CSO) Error Flag (EF)
Disabled L L Low (~0 V) Low (~0 V) HZ
Short to Battery L H High (Vout ~ Vin)Low (~0 V) L (Note 10)
Open Load (OFF) H H High (V out ~ Vin)Low (~0 V) L (Note 11)
Normal (OFF) H H Low (~0 V) Low (~0 V) HZ (Note 11)
Open Load (ON) H L High (Vout ~ Vin)Low (~0 V) HZ
Normal (ON) H L High (Vout ~ Vin)Proportional to Iout (±5%) (Note 12) HZ
Over Current H L Vin − 1 V High (~2.55 V) L
Short to Ground H L Low (~0 V) High (~2.55 V) L
10.Internal current source disabled (between Vout and Vin).
11.Internal current source enabled (between Vout and Vin).
12.Valid for Iout = 50 mA to 350 mA. For Iout = 10 mA to 50 mA range proportional to Iout (±15%).
NCV47722
www.onsemi.com
10
Thermal Considerations
As power in the device increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the device has good thermal conductivity through the PCB,
the junction temperature will be relatively low with high
power applications. The maximum dissipation the device
can handle is given by:
PD(MAX) +ƪTJ(MAX) *TAƫ
RqJA (eq. 6)
Since TJ is not recommended to exceed 150°C, then the
device soldered on 645 mm2, 1 oz copper area, FR4 can
dissipate up to 2 W when the ambient temperature (TA) is
25°C. See Figure 15 for RqJA versus PCB area. The power
dissipated by the device can be calculated from the
following equations:
PD[VinǒIq@IoutǓ)Iout ǒVin *VoutǓ(eq. 7)
or
Vin(MAX) [PD(MAX) )ǒVout IoutǓ
Iout )Iq(eq. 8)
Figure 15. Thermal Resistance vs. PCB Copper Area
COPPER HEAT SPREADER AREA (mm2)
600 7005004003002001000
20
30
50
70
80
100
110
RqJA, THERMAL RESISTANCE (°C/W)
40
60
90
120
1 oz, Single Layer
2 oz, Single Layer
1 oz, 4 Layer
2 oz, 4 Layer
Hints
Vin and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the device and make
traces as short as possible.
ORDERING INFORMATION
Device Output Voltage Marking Package Shipping†
NCV47722PAAJR2G Adjustable Line1: NCV4
Line2: 7722 TSSOP−14 Exposed Pad
(Pb−Free) 2500 / Tape & Reel
NCV47722PDAJR2G
(In Development) Adjustable 47722 SOIC−8 EP
(Pb−Free) 2500 / Tape & Reel
NCV47722DAJR2G
(In Development) Adjustable 47722 SOIC−8
(Pb−Free) 2500 / Tape & Reel
NCV47722MNWTXG
(In Development) Adjustable 47722 DFN8 with wettable flanks
(Pb−Free) 3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
NCV47722
www.onsemi.com
11
PACKAGE DIMENSIONS
TSSOP−14 EP
CASE 948AW
ISSUE C NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL BE
0.07 mm MAX. AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER RADI-
US OF THE FOOT. MINIMUM SPACE BETWEEN PRO-
TRUSION AND ADJACENT LEAD IS 0.07.
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 mm PER SIDE. DIMENSION D IS DETERMINED AT
DATUM H.
5. DIMENSION E1 DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSIONS. INTERLEAD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.25 mm PER
SIDE. DIMENSION E1 IS DETERMINED AT DATUM H.
6. DATUMS A AND B ARE DETERMINED AT DATUM H.
7. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM
THE SEATING PLANE TO THE LOWEST POINT ON THE
PACKAGE BODY.
8. SECTION B−B TO BE DETERMINED AT 0.10 TO 0.25 mm
FROM THE LEAD TIP.
DIM MIN MAX
MILLIMETERS
A−−−− 1.20
b0.19 0.30
c0.09 0.20
A1 0.05 0.15
L0.45 0.75
M0 8 __
6.70
14X
0.42
14X
1.15
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
E6.40 BSC
L2 0.25 BSC
RECOMMENDED
3.06
3.40
ÇÇÇ
ÇÇÇ
ÇÇÇ
SECTION B−B
c
c1
b
b1
ÉÉÉ
ÉÉÉ
A2 0.80 1.05
b1 0.19 0.25
c1 0.09 0.16
D4.90 5.10
D2 3.09 3.62
E1 4.30 4.50
E2 2.69 3.22
0.65 BSCe
SEATING
PLANE
A2
M
L
DETAIL A
END VIEW
PIN 1 7
1
14 8
TOP VIEW
E1
SIDE VIEW
REFERENCE 0.20 C
NOTE 5
2X 14 TIPS
B
0.10 C
C
A
14X c
DET AIL A
A1
B
B
E2
BOTTOM VIEW
D2
b
0.10 C
NOTE 3
B A
14X
0.05 C
D
NOTE 4
GAUGE
PLANE
C
NOTE 7
HL2
E
eBA
NOTE 6
NOTE 8
A
NOTE 6
SS
NCV47722
www.onsemi.com
12
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
(In Development)
SEATING
PLANE
1
4
58
N
J
X 45_
K
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
BS
D
H
C
0.10 (0.004)
DIM
AMIN MAX MIN MAX
INCHES
4.80 5.00 0.189 0.197
MILLIMETERS
B3.80 4.00 0.150 0.157
C1.35 1.75 0.053 0.069
D0.33 0.51 0.013 0.020
G1.27 BSC 0.050 BSC
H0.10 0.25 0.004 0.010
J0.19 0.25 0.007 0.010
K0.40 1.27 0.016 0.050
M0 8 0 8
N0.25 0.50 0.010 0.020
S5.80 6.20 0.228 0.244
−X−
−Y−
G
M
Y
M
0.25 (0.010)
−Z−
Y
M
0.25 (0.010) ZSXS
M
____
1.52
0.060
7.0
0.275
0.6
0.024 1.270
0.050
4.0
0.155
ǒmm
inchesǓ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
NCV47722
www.onsemi.com
13
PACKAGE DIMENSIONS
ÉÉ
ÉÉ
ÉÉ
SOIC−8 EP
CASE 751AC
ISSUE B
(In Development)
ÉÉ
ÉÉ
ÉÉ
ÇÇ
ÇÇ
ÇÇ
H
C0.10
D
E1
A
D
PIN ONE
2 X
8 X
SEATING
PLANE
EXPOSED
GAUGE
PLANE
14
58
D
C0.10 A-B
2 X
E
B
e
C0.10
2 X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
DETAIL A
END VIEW
SECTION A−A
8 X b
A-B0.25 D
C
C
C0.10
C0.20
A
A2
G
F
14
58
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS (ANGLES
IN DEGREES).
3. DIMENSION b DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE
0.08 MM TOTAL IN EXCESS OF THE “b”
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
4. DATUMS A AND B TO BE DETERMINED
AT DATUM PLANE H.
DIM MIN MAX
MILLIMETERS
A1.35 1.75
A1 0.00 0.10
A2 1.35 1.65
b0.31 0.51
b1 0.28 0.48
c0.17 0.25
c1 0.17 0.23
D4.90 BSC
E6.00 BSC
e1.27 BSC
L0.40 1.27
L1 1.04 REF
F2.24 3.20
G1.55 2.51
h0.25 0.50
q0 8
h
AA
DETAIL A
(b)
b1
c
c1
0.25 L
(L1) q
PAD
E1 3.90 BSC
__
A1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
LOCATION
Exposed
Pad
1.52
0.060
2.03
0.08
0.6
0.024 1.270
0.050
4.0
0.155
ǒmm
inchesǓ
SCALE 6:1
7.0
0.275
2.72
0.107
NCV47722
www.onsemi.com
14
PACKAGE DIMENSIONS
DFN8, 3x3, 0.65P
CASE 506BY
ISSUE A
(In Development)
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. FOR DEVICE OPN CONTAINING W OPTION,
DETAIL B ALTERNATE CONSTRUCTION IS
NOT APPLICABLE.
ÉÉÉ
ÉÉÉ
ÉÉÉ
A
B
E
D
D2
E2
BOTTOM VIEW
b
e
8X
0.10 B
0.05
AC
C
K
8X
NOTE 3
2X
0.10 C
PIN ONE
REFERENCE
TOP VIEW
2X 0.10 C
A
A1
(A3)
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
L
8X
14
58
DIM MIN MAX
MILLIMETERS
A0.80 1.00
A1 0.00 0.05
A3 0.20 REF
b0.25 0.35
D3.00 BSC
D2 2.20 2.40
E3.00 BSC
E2 1.40 1.60
e0.65 BSC
K0.20 −−−
L0.20 0.40
Ç
Ç
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
Ç
Ç
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
8X
0.53
2.46
1.66
0.40
1
0.65
PITCH
3.30
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
RECOMMENDED
8X
DIMENSIONS: MILLIMETERS
L1
DETAIL A
L
ALTERNATE
CONSTRUCTIONS
L
DETAIL B
DET AIL A
L1 0.00 0.15
NOTE 4
e/2
SOLDERING FOOTPRINT*
ÉÉÉ
ÉÉÉ
ÇÇÇ
ÇÇÇ
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTIONS
ÉÉ
ÉÉ
ÇÇ
A1
A3
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer ’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body . Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
P
UBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
NCV47722/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
al
Sales Representative
◊
