TLE4953HALA1 - INFINEON TECHNOLOGIES AG

Data Sheet, V 4.0, 2010-04

TLE4953

TLE4953C

Differential Two-Wire Hall Effect Sensor IC

Sensors

Edition 2010-04

Published by Infineon Technologies AG,

81726 München, Germany

Attention please!

The information herein is given to describe certain components and shall not be considered as a guarantee of

characteristics.

Terms of delivery and rights to technical change reserved.

We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding

circuits, descriptions and charts stated herein.

Information

For further information on technology, delivery terms and conditions and prices please contact your nearest

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Due to technical requirements components may contain dangerous substances. For information on the types in

question please contact your nearest Infineon Technologies Office.

Infineon Technologies Components may only be used in life-support devices or systems with the express written

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of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support

devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain

and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may

be endangered.

TLE4953

TLE4953C

Revision History: 2010-04 V 4.0

Previous Version: V 3.0

Page Temperature profile adjustment

TLE4953C package change

Maximum value of the differential direction limit added

Storage temperature info provided by application notes: Storage of

products supply by Infineon Technologies

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Data Sheet 1 V 4.0, 2010-04

Data Sheet V4.0

Differential Two-Wire Hall Effect Sensor IC TLE4953

TLE4953C

Features

• Two-wire PWM current interface

• Detection of rotation direction

• Dynamic self-calibration principle & high sensitivity

• Adaptive hysteresis

• Single chip solution - no external components

• Vibration suppression in calibrated mode

• South and north pole pre-induction possible

• High resistance to piezo effects

• Large operating air-gaps

• Wide operating temperature range

• From zero speed up to 12 kHz

• 1.8 nF overmolded capacitor

• For coarse transmission target wheels

The differential Hall Effect sensor TLE4953 is designed to provide information about

rotational speed and direction of rotation to modern transmission and ABS systems. The

output has been designed as a two wire current interface based on a Pulse Width

Modulation principle. The sensor operates without external components and combines

a fast power-up time with a wide frequency range. Excellent accuracy and sensitivity is

specified for harsh automotive requirements as a wide temperature range, high ESD

robustness and high EMC resilience. State-of-the-art BiCMOS technology is used for

monolithic integration of the active sensor areas and the signal conditioning.

Finally, the optimized piezo compensation and the integrated dynamic offset

compensation enable easy manufacturing and elimination of magnetic offsets. Adaptive

hysteresis concept increases the noise immunity. The TLE4953C is additionally

provided with an overmolded 1.8 nF capacitor for improved EMI performance.

Type Marking Order Code Package

TLE4953C 53C1R SP000710696 PG-SSO-2-4

TLE4953 53 SP000278512 PG-SSO-2-1

TLE4952 Series

TLE4953

TLE4953C

Data Sheet 2 V 4.0, 2010-04

Pin Configuration (top view)

Figure 1

Figure 2 Block Diagram

AEP03191-53

Dat e Code

Mar k i ng

VCC GND

2.5

2.67

1.44

Center of

Sensitive

Area

± 0.15

GyywwS

53C1R

VCC GND

eft

ight

Centr

PGA A/D slope/peak

detection

offset

calc.

(R+L)/2-C

output

protocol

system control

& watchdog

D/A

supply

generator

clock

gen.

Hall probes:

LP comp

D/A

Tracking

algor.

+ noise

shaper

Dig.

Filter

Direction

algorithm

TLE4953

TLE4953C

Data Sheet 3 V 4.0, 2010-04

Functional Description

The differential Hall Effect IC detects the motion of ferromagnetic or permanent magnet

structures by measuring the differential flux density of the magnetic field. To detect the

motion of ferromagnetic objects the magnetic field must be provided by a backbiasing

permanent magnet. Either the South or North pole of the magnet can be attached to the

rear, unmarked side (remark: rear side may contain data matrix code) of the IC package.

Magnetic offsets of up to ± 20 mT and mechanical offsets are cancelled out through a

self-calibration algorithm. Only 2 transitions are necessary for the self-calibration

procedure. After the initial self-calibration sequence switching occurs when the input

signal crosses the adaptive threshold on the rising magnetic edge.

The ON and OFF state of the IC are indicated by High and Low current consumption.

Each rising magnetic edge of the magnetic input signal triggers an output pulse.

Figure 3 Output Pulses on magnetic rising edge

In addition to the speed signal, the following information is provided by varying the length

of the output pulses (PWM modulation):

Speed signal = S

The speed signal is issued at the first output pulse after start up and when the magnetic

frequency is above 1kHz.

Direction of rotation left = DR-L

DR-L information is issued in the output pulse length when the active target wheel in front

of the Hall Effect IC moves from the pin VCC to the pin GND.

Direction of rotation right = DR-R

DR-R information is issued in the output pulse length when the active target wheel in

front of the Hall Effect IC moves from the pin GND to the pin VCC.

AED03189

Pulse

Length

Magnetic Signal

Output Signal

TLE4953

TLE4953C

Data Sheet 4 V 4.0, 2010-04

Figure 4 Definition of Rotation Direction

Circuit Description

The circuit internally is supplied by a voltage regulator. A 2 MHz on-chip oscillator serves

as a clock generator for the DSP and the output encoder.

Speed signal circuitry

TLE4953 speed signal path comprises a pair of Hall Effect probes, separated from each

other by 2.5 mm, a differential amplifier including noise limiting low-pass filter, and a

comparator triggering a switched current output stage. An offset cancellation feedback

loop is provided through a signal-tracking A/D converter, a digital signal processor

(DSP), and an offset cancellation D/A converter.

Uncalibrated Mode

Occasionally a short initial offset settling time td,input might delay the detection of the input

signal. (The sensor is "blind"). During the startup phase (un-calibrated mode) the output

is disabled (I = ILow). The magnetic input signal is tracked by the speed ADC and

monitored within the digital circuit. For detection the signal needs to exceed a threshold

(digital noise constant d1). When the signal slope is identified as a rising edge, a trigger

pulse is issued to a comparator. A second trigger pulse is issued as soon as the next

rising edge is detected.

Between the start-up of the magnetic input signal and the time when its second extreme

is reached, the PGA (programmable gain amplifier) will switch to its appropriate position.

This value is determined by the signal amplitude and initial offset value. The digital noise

constant value is changing accordingly (d1 → d2, related to the corresponding PGA

AEA03193

DR-L DR-R

G 0415 S

53C1R

TLE4953

TLE4953C

Data Sheet 5 V 4.0, 2010-04

states), leading to a change in phase shift between magnetic input signal and output

signal. After that consecutive output edges should have a nominal delay of about 360°.

During the uncalibrated mode the offset value is calculated by the peak detection

algorithm as described below.

The differential input signal is digitized in the speed A/D converter and fed into the DSP

part of the circuit. The minimum and maximum values of the input signal are extracted

and their corresponding arithmetic mean value is calculated. The offset of this mean

value is determined and fed into the offset cancellation DAC.

The offset update takes place when two valid extremes are found and the direction of the

update has the same orientation as the magnetic slope (valid for calibrated mode). For

example an positive offset update is only possible on a rising magnetic edge. The offset

update is done independant from the output switching.

After successful correction of the offset, the output switching is in calibrated mode.

Switching occurs at adaptive threshold-crossover. It is only affected by the propagation

delay time of the signal path, which is mainly determined by the noise limiting filter.

Signals which are below a predefined threshold ∆BLimit are not detected. This prevents

unwanted switching.

The adaptive hysteresis is linked to the PGA state. Therefore the system is able to

suppress switching if vibration or noise signals are smaller than the adaptive hysteresis.

The switching and direction information is fed into the DSP and the output encoder. The

pulse length of the High output current is generated according to the rotational speed

and the direction of rotation.

Direction signal circuitry

The differential signal between a third Hall probe and the mean value of the differential

Hall probe pair is obtained from the direction input amplifier. This signal is digitized by

the direction ADC and fed into the digital circuitry. There, the phase of the signal referring

to the speed signal is analyzed and the direction information is forwarded to the output

encoder. The phase is identified by calculating the size of the direction signal at two

consecutive zero crossings of the speed signal. This is done by subtracting the current

direction signal from the internal stored value which has been taken from the previous

magnetic edge.

Depending on the phase shift between the direction signal and the speed signal a

positive or a negative value occur. The information if the new direction calculation takes

place at a rising or a falling magnetic edge allows together with the algebraic sign of the

calculated direction signal a reliable direction detection.

The first pulse after power is always a speed pulse as there is no stored direction

information available.

TLE4953

TLE4953C

Data Sheet 6 V 4.0, 2010-04

Vibration suppression algorithm:

The magnetic signal amplitude and the direction information is used for detection of

parasitic magnetic signals. Unwanted magnetic signals can be caused by angular or

airgap vibrations for instance. If an input signal is clearly detected as a vibration signal,

the output of pulses will be suppressed.

A magnetic input signal is classified as parasitic vibration signal if

a. the speed signal amplitude is smaller than the internal hysteresis or

b. the direction signal amplitude is smaller than the internal limit or

c. the direction signal consists of alternating left/right information

The quality of vibration suppression (according a & b) depends on the hysteresis limits

and on the magnitude of the magnetic signal. The bigger the hysteresis the better the

suppression of parasitc signals.

For parasitic signals where items above (a. to c.) are not clearly applicable or at other

more rare cases (e.g. IC startup) vibration suppression is not guaranteed. The

performance of the direction detection and vibration suppression algorithm depends on

the used magnetic circuit and as well on the used target wheel and need to be evaluated.

Please ask for application support if you have questions on the vibration suppresion algorithm.

Package information:

Pure tin covering (green lead plating) is used. Lead frame material is Wieland K62 (UNS:

C18090) and contains CuSn1CrNiTi. Product is RoHS (Restriction of Hazardous

Substances) compliant and marked with letter G in front of the data code marking and

may contain a data matrix code on the rear side of the package (see also information

note 136/03). Please refer to your key account team or regional sales if you need further

information.

TLE4953

TLE4953C

Data Sheet 7 V 4.0, 2010-04

Note: Stress in excess of those listed here may cause permanent damage to the device.

Exposure to absolute maximum rating conditions for extended periods may affect

device reliability.

Absolute Maximum Ratings

Tj = -40 to 150 °C, 4.0V ≤ VCC ≤ 16.5 V

Parameter

Symbol

Limit Values Unit Remarks

min. max.

Supply voltage VCC – 0.3 – V Tj ≤ 80 °C

–16.5 Tj = 170 °C

–20 Tj = 150 °C

–22 t = 10 × 5 min

–24 t = 10 × 5 min,

RM ≥ 75 Ω included in

VCC

–27 t = 400 ms, RM ≥ 75 Ω

included in VCC

Reverse polarity current Irev – 200 mA External current

limitation required,

t ≤4 h1)

1) This allows together with an external serial resistor (75 or 100 Ohm) reverse polarity voltage for a short duration. This

resistor is usually present in the ECU of the application circuit.

Junction temperature Tj– 150 °C 5000 h, VCC ≤16.5 V

– 160 2500 h, VCC ≤ 16.5 V

(not additive)

– 170 500 h, VCC ≤ 16.5 V

(not additive)

– 190 4 × 1 h, VCC ≤ 16.5 V

Active lifetime2)

2) Life time shall be considered as anticipation and will not extend the agreed warranty period

tB,active – 10000 h -40°C to 125°C

Thermal resistance

PG-SSO-2-4,

PG-SSO-2-1

RthJA – 190 K/W 3)

3) Can be improved significantly by further processing like overmolding

TLE4953

TLE4953C

Data Sheet 8 V 4.0, 2010-04

ESD Protection

Characterized according to Human Body Model (HBM) tests in compliance with

Standard EIA/JESD22-A114-B HBM (covers MIL STD 883D) )

Note: Within the operating range the functions given in the circuit description are fulfilled.

Parameter Symbol Limit Values Unit Notes

min. max.

ESD-Protection

TLE4953C

TLE4953

VESD

± 12

kV R = 1.5 kΩ,

C = 100 pF

Operating Range

Parameter

Symbol

Limit Values Unit Remarks

min. max.

Supply voltage VCC 4.5 20 VDirectly on IC leads

excludes the RM voltage

drop

Supply voltage VCC 4.0 4.5 VDirectly on IC leads

excludes the RM voltage

drop 1)

1) Reduced performance possible for jitter/phase accuracy and power supply rejection ratio (EMC). Current levels will

typically decrease but will be within specification limits. This voltage range is not recommended for continuos operation

and should cover the function during short voltage drops which may occur at cranking of engine / test pulse 4.

Supply voltage ripple VAC –6Vpp VCC = 13 V

0 ≤ f ≤ 50 kHz

Junction temperature Tj

– 40 150 °C

170 500h VCC ≤ 16.5 V 2)

2) increased jitter and reduced phase accuracy permissible between 150 and 170°C junction temperature.

Pre-induction B0– 500 + 500 mT

Pre-induction offset

between outer probes

∆Bstat., l/r – 20 + 20 mT L-R

Pre-induction offset

between mean of outer

probes and center probe

∆

stat.,

m/o

– 20 + 20 mT (L+R)/2-C

Differential Induction ∆B– 120 + 120 mT

TLE4953

TLE4953C

Data Sheet 9 V 4.0, 2010-04

AC/DC Characteristics

All values specified at constant amplitude and offset of input signal, over operating range, unless

otherwise specified. Typical values correspond to VCC=12V and TA=25°C

Parameter Symbol Limit Values Unit Remarks

min. typ. max.

Supply current ILow 5.9 78.4 mA

Supply current IHigh 11.8 14 16.8 mA

Supply current ratio IHigh/ILow 1.9 – –

Output rise/fall slew rate

TLE4953

tr, tf12 –26 mA/µs RM = 75 Ω

Tj ≤ 170 °C

See Figure 5

Output rise/fall slew rate

TLE4953C

tr, tf8–26 mA/µs RM = 75 Ω

Tj ≤ 170 °C

See Figure 5

Current ripple dIX/dVCC IX––90 µA/V Only valid for

TLE4953

Limit threshold speed

0Hz ≤ f ≤ 2500 Hz

2500 Hz ≤ f ≤ 12000 Hz

∆BLimit

0.35 0.8 1.5

1.75

mT 1)

Limit differential direction

signal

0Hz ≤ f ≤ 1100 Hz

∆BDir

0.35 0.73

mT Calculated at two

consecutive

threshold

crossings2)

Initial calibration delay

time

td,input –300 345 µs Additional to nstart

Magnetic edges required

for first output pulse

(no previous vibration

detected)

nstart ––2magn.

edges

pulse occurs only

on rising

magnetic edge

Number of pulses in

uncalibrated mode

nDZ-Startup 2

pulses

3rd pulse

calibrated

Number of emitted pulses

with invalid direction

information3)

nDR-Start ––24)

pulses

3rd pulse correct

Frequency f0 – 12000 Hz 4)

TLE4953

TLE4953C

Data Sheet 10 V 4.0, 2010-04

Systematic phase error of

output edges during

start-up and uncalibrated

mode

– 88 + 88 °Systematical

phase error of

"uncal" pulse; nth

vs. n+1th pulse

(does not include

jitter)

Phase shift during

transition from

uncalibrated to calibrated

mode

∆Φswitch – 90 + 90 °

Phase shift change

during PGA switching in

calibrated mode

080 °Due to adaptive

hysteresis.

Depending on

signal shape.

Magnetic differential field

change required for

startup with 1st rising

edge

∆ˆ

BLimit,

early startup

peak to peak

value

∆ˆ

BLimit, early startup 3.5 mT

Jitter, Tj ≤ 150 °C

Tj ≤170 °C

f ≤ 2500 Hz

SJit-far –

–

± 2

± 3

%5) 1 σ value

VCC = 12 V

∆B ≥ 2 mT

Jitter, Tj ≤ 150 °C

Tj ≤170 °C

2500 Hz < f ≤12000 Hz

SJit-far –

–

± 3

± 4.5

%5) 1 σ value

VCC = 12 V

∆B ≥ 2 mT

Jitter at board net ripple SJit-AC – – ± 2 %5)

= 13 V ± 6

Vpp

≤

50 kHz

∆

= 15 mT

1) magnetic amplitude values, sine magnetic field, Limits refer to the 50% criteria. 50% of pulses are missing.Only valid at

lowest PGA stage/highest amplification because of adaptive hysteresis.

2) Magnetic peak to peak value. Limits refer to the 99% criteria, just 1 pulse missing out of 100.

3) The first 2 pulses may contain only direction information if the direction signal is above ∆BDir.The first pulse after starting

will be the speed pulse.

4) High frequency behaviour not subject to production test - verified by design/characterization.

AC/DC Characteristics (cont’d)

All values specified at constant amplitude and offset of input signal, over operating range, unless

otherwise specified. Typical values correspond to VCC=12V and TA=25°C

Parameter Symbol Limit Values Unit Remarks

min. typ. max.

TLE4953

TLE4953C

Data Sheet 11 V 4.0, 2010-04

Figure 5 Definition of Rise and Fall Time

PWM Current Interface

Between each magnetic transition and the rising edge of the corresponding output pulse

the output current is Low for tpre-low in order to allow reliable internal conveyance.

Following the signal pulse (current is High) is output.

5) not subject to production test- verified by design/characterization, magnetic values are amplitude values

Timing Characteristics

Parameter Symbol Limit Values Unit Remarks

min. typ. max.

Pre-low length tpre-low 24 30 36 µs

Speed signal tS24 30 36 µs

Length of DR-L pulse tDR-L 50 60 70 µs

Length of DR-R pulse tDR-R 102 120 138 µs

Output of DR-L/R pulse,

maximum frequency

From low - high frequency

From high - low frequency

fDR, max

935

850

1100

1000

1265

1150

Hz Internal

hysteresis of

direction signal1)

1) Not possible overlap, 10% difference verified by design/characterization. Frequencies not subject to production test

verified by design/characterization

AET03194

10%

90%

50%

trtf

IHigh

ILow t1

TLE4953

TLE4953C

Data Sheet 12 V 4.0, 2010-04

If the magnetic direction field exceeds ∆BDir, the output pulse lengths are 60 µs or 120 µs

respectively, depending on the direction of rotation.

If the magnitude of the magnetic direction field is below ∆Bdir, the output pulses are

suppressed when the frequency is below fDR,max (see section vibration suppression). For

magnitudes of the magnetic differential field below ∆BLimit the signal is lost.

Speed pulse occur only at the first pulse after start up or above fDR, max.

If no magnetic differential signal change is detected the IC will remain in calibrated mode.

No internal reset are generated - therefore a zero speed operation is possible.

Figure 6 Definition of PWM Current Interface

AET03196

pre-low

= 30 µs

Xn Xn+1 Xn+

= 30 µs

DR-L

2 x t

DR-R

4 x t

ransferred

ignal:

R-R

ransferred

ignal:

R-L

ransferred

ignal:

nternal

ensor

peed Signal

TLE4953

TLE4953C

Data Sheet 13 V 4.0, 2010-04

Electro Magnetic Compatibility (values depend on RM!)

Characterization of Electro Magnetic Compatibility are carried out on sample base of one

qualification lot. Not all specification parameters have been monitored during EMC

exposure. Only key parameters as e.g. switching current have been monitored

Parameter Symbol Level/Typ Status

Ref. ISO 7637-1; test circuit 1;

∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25 °C; RM ≥ 75 Ω

Testpulse 1

Testpulse 2

Testpulse 3a

Testpulse 3b

Testpulse 4

Testpulse 5

VEMC IV / – 100 V

IV / 100 V

IV / – 150 V

IV / 100 V

IV / – 7 V

IV / 86.53) V

C1)

B2)

1) According to 7637-1 the supply switched "OFF" for t = 200 ms.

2) According to 7637-1 for test pulse 4 the test voltage shall be 12 V ± 0.2 V. Measured with RM =75Ω only.

Mainly the current consumption will decrease. Status C with test circuit 1.

3) Applying in the board net a suppressor diode with sufficient energy absorption capability.

Ref. ISO 7637-3; test circuit 1;

∆B = 2 mT (amplitude of sinus signal); VCC = 13.5 V, fB = 100 Hz; T = 25 °C; RM ≥ 75 Ω

Testpulse 1

Testpulse 2

Testpulse 3a

Testpulse 3b

VEMC IV / – 30 V

IV / 30 V

IV / – 60 V

IV / 40 V

Ref. ISO 11452-3; test circuit 1; measured in TEM-cell

∆B = 2 mT; VCC = 13.5 V, fB = 100 Hz; T= 25 °C

EMC field strength

(TLE4953)

ETEM-Cell IV / 200 V/m AM = 80%,

f = 1 kHz

EMC field strength

(TLE4953C)

ETEM-Cell IV / 250 V/m AM = 80%,

f = 1 kHz

TLE4953

TLE4953C

Data Sheet 14 V 4.0, 2010-04

Figure 7 Test Circuit 1

Figure 8 Package Outlines

AES03199

GND

VCC Sensor

RMC2

VEMC

EMC-Generator Mainframe

Components: D1: 1N4007

D2: T 5Z27 1J

C1: 10 µF/35 V

C2: 1 nF/1000 V

RM:75 Ω/5 W

P-SSO-2-1/2 : 0.3

d : Distance chip to branded side of I

±0.08

AEA0296

Hall-Probe

Branded Side

TLE4953

TLE4953C

Data Sheet 15 V 4.0, 2010-04

0.1

6.35

±0.4

12.7

±0.3

CODE

45˚

12.7

±1

CODE CODE

-0.1

0.25

±0.05

7˚

0.2

+0.1

Adhesiv

±0.5

-1

±0.5

Tape

0.39

±0.1

-0.15

0.25

±0.5

23.8

+0.75

-0.5

38 MAX.

3.38

3.71

(0.25)

±0.08

±0.06

1.9 MAX.

5.16

±0.08

5.34

±0.05

0.1 MAX.

1.9 MAX.

1.2

±0.1

±0.05

0.87

±0.05

1.67

(14.8)

2.54

2 A

) No solder function area

Total tolerance at 10 pitches ±1

(Useable Length)

Tape

±1˚

0.2

0.5

1 MAX.

PG-SSO-2-1 (Plastic Single Small Outline Package)

Dimensions in m

TLE4953

TLE4953C

Data Sheet 16 V 4.0, 2010-04

6.35

±0.4

12.7

±0.3

CODE

45˚

12.7

±1

CODE CODE

-0.1

0.25

±0.05

7˚

0.2

+0.1

Adhesiv

±0.5

61-1

±0.5

Tape

0.39

±0.1

-0.15

0.25

±0.5

23.8

+0.75

-0.5

38 MAX.

0.65

3.38

3.71

(0.25)

±0.1

±0.08

±0.06

1.9 MAX.

5.16

±0.08

5.34

±0.05

0.1 MAX.

1.9 MAX.

1.2±0.1

±0.05

0.87

±0.05

1.67

(14.8)

3.01

2.54

2 A

1) No solder function area

Total tolerance at 10 pitches ±1

(Useable Length)

±0.5

2.2

1.5

±0.05

(2.4)

(2.7)

(1.3)

5.34

±0.05

Tape

1.81

±0.05

0.2 2x

0.5

1.2

±0.05

5.16

±0.08

A - A

Capacitor

(8.17)

±0.1

7.07

10.2±0.1

(2.2)

±0.05

0.25

0.2

±1˚

0.2

0.1

PG-SSO-2-4 (Plastic Single Small Outline Package)

Dimensions in mm

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