16K x 4 Static RAM
CY7C164
CY7C166
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Januar
y
1988 - Revised Decem ber 1994
Features
•High speed
—15 ns
•Output enable (OE) feature (7C166)
•CMOS for optimum speed/power
•Low active po wer
—633 mW
•Low standby power
—220 mW
•TTL-compati ble inputs and outp uts
•A utomatic power-d ow n w hen deselected
Functional Description
The CY7C164 and CY7C166 are high-performance CMOS
static RAMs organized as 16,384 by 4 bits. Easy memory ex-
pansion is provided by an active LOW chip enable (CE) and
three-state drivers. The CY7C166 has an active low output
enable (OE) feature. Both devices have an automatic pow-
er-down feature, reducing the power consumption by 65%
when deselected.
Writing to the device is accomplished when the chip enable
(CE) and write enable (WE) inputs are both LOW (and the
output enable (OE) is LOW for the 7C166). Data on the four
input /output pins ( I/O0 thr ough I/O3) is written into t he memory
location speci fi ed on the addr ess pins (A0 through A13).
Reading the device is accomplished by taking chip enable
(CE) LO W (and OE L OW for 7C166), whil e write enable (WE)
remains HIGH. Under these conditions the contents of the
memory locati on specified on the address pins wil l appear on
the four data I/O pins.
The I/O pins stay in a high-i mpedance sta te when chip enab l e
(CE) is HIGH ( or out put e nab le ( OE) is HIGH fo r 7C166). A die
coat is used to i nsure alp ha immunity.
]
OE
CE
GND
Logic Block Diagram Pin Configurations
256x 64 x 4
ARRAY
1
2
3
4
5
6
7
8
9
10
11 12
13
14
18
17
16
15
19
22
21
20
Top Vie w
DIP
7C164
A1
A2
A3
A4
A5
A6
A7
A8
A0
A9
A11
A10
A12
A13
COLUMN
DECODER
ROW DECODER
SENSE AMPS
INPUT BUFFER
POWER
DOWN
WE
(OE)
(7C166 ONLY)
I/O3
CE
I/O2
I/O1
I/O0
A5
A6
A7
A8
A9
A10
A11
A12
A13
CE
GND WE
VCC
A4
A3
A2
A1
I/O3
I/O2
I/O1
I/O0
A0
1
2
3
4
5
6
7
8
9
10
11 14
15
16
20
19
18
17
21
24
23
22
Top Vie w
SOJ
7C164
A5
A6
A7
A8
A9
A10
A11
A12
A13
WE
VCC
A4
A3
A2
A1
I/O3
I/O2
I/O1
I/O0
A0
GND
NC
NC
1
2
3
4
5
6
7
8
9
10
11 14
15
16
20
19
18
17
21
24
23
22
Top View
DIP/SOJ
7C166
A5
A6
A7
A8
A9
A10
A11
A12
A13
WE
VCC
A4
A3
A2
A1
I/O3
I/O2
I/O1
I/O0
A0
NC
CE
12 13
12 13
C164–4
C164–3 C164–2
C164–1
Selec tion Guide[1]
7C164-12
7C166-12 7C164-15
7C166-15 7C164-20
7C166-20 7C164-25
7C166-25 7C164-35
7C166-35
Maximum Access Time (ns) 12 15 20 25 35
Maximum Operatin g Current (mA) 160 115 80 70 70
Maxim um Standby Current (mA) 40/20 40/20 40/20 20/20 20/20
Shaded area contains advanced information.
Note:
1. For military specifications, see the CY6C164A/CY7C166A datasheet
CY7C164
CY7C166
2
Maximum Ratings
(Abo v e which the useful life ma y be impaire d. For user guide-
li nes, not tested .)
Sto ra g e Tem p e ra tu r e ......... ..... .... ........ ..... ..– 6 5°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Pot ential........ .......–0. 5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[2]............................................ –0.5V to +7.0V
DC Input Voltage[2]......................................... –0.5V to +7.0V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL- STD-883, Method 3015)
Latch-Up Current.......... ..... ..... .. ............ ..... ........ .. ... >200 mA
]
Operating Range
Range Ambient
Temperature VCC
Commercial 0°C to +70°C 5V ± 10%
Electrica l Characteris tics Over the Operating Range
7C164-12
7C166-12 7C164-15
7C166-15 7C164-20
7C166-20 7C164-25, 35
7C166-25, 35
Parameter Description Test Conditions Min. Max. Min. Max. Min. Max. Min. Max. Unit
VOH Output HIGH
Voltage VCC = Min.,
IOH = –4.0 mA 2.4 2.4 2.4 2.4 V
VOL Output LOW
Voltage VCC = Min.,
IOL = 8.0 mA 0.4 0.4 0.4 0.4 V
VIH Input HIGH Voltage 2.2 VCC 2.2 VCC 2.2 VCC 2.2 VCC V
VIL Input LOW
Voltage[2] –0.5 0.8 –0.5 0.8 –0.5 0.8 –0.5 0.8 V
IIX Input Load Current GND < VI < VCC –5 +5 –5 +5 –5 +5 –5 +5 µA
IOZ Output Leakage
Current GND < VO < VCC,
Output Disa bled –5 +5 –5 +5 –5 +5 –5 +5 µA
IOS Output Short
Circuit Current[3] VCC = Max.,
VOUT = GND –350 –350 –350 -350 mA
ICC VCC Operating
Supply Current VCC = M ax.,
IOUT = 0 mA 160 115 80 70 mA
ISB1 Auto ma tic CE
P ower-Down Current[4] Max. VCC, CE > VIH,
Min. Duty Cycle = 100% 40 40 40 20 mA
ISB2 Auto ma tic CE
Power-Down
Current[4]
Max. VCC,
CE > VCC – 0.3V,
VIN > VCC – 0.3V
or VIN < 0. 3V
20 20 20 20 mA
Shaded area contains advanced information.
Capacitance[5]
Parameter Description Test Conditions Max. Unit
CIN Input Capacitanc e TA = 25°C, f = 1 MHz,
VCC = 5.0V 10 pF
COUT Output Capacit ance 10 pF
Notes:
2. Minimum voltage is equal to –3.0V for pulse durations less than 30 ns.
3. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
4. A pull-up resistor to VCC on the C E input i s requi red to keep the de v ice des elected during VCC power -up , ot herwise ISB will e xceed v alues gi ven .
5. Tested initially and after any design or process changes that may affect these parameters.
CY7C164
CY7C166
3
AC Test Loads a nd Waveforms
3.0V
5V
OUTPUT
R1 481Ω
R2
255Ω
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10% 90%
10%
<5ns <5ns
5V
OUTPUT
R1 481Ω
R2
255Ω
5pF
INCLUDING
JIG AND
SCOPE
(a) (b)
OUTPUT 1.73V
Equivalent to: THÉ VENIN EQUIVALENT
ALL INPUT PULSES
C164–5 C164–6
167Ω
Swi tch i ng C h ara cter i sti cs Over the Operating Range[6]
7C164-12
7C166-12 7C164-15
7C166-15 7C164-20
7C166-20 7C164-25
7C166-25 7C164-35
7C166-35
Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
READ CYCLE
tRC Read Cycle Time 12 15 20 25 35 ns
tAA Addr e ss to Da t a Va li d 12 15 20 25 35 ns
tOHA Output Hold from Address
Change 33555ns
tACE CE LOW to Data Valid 12 15 20 25 35 ns
tDOE OE LOW to Data Valid 7C166 610 10 12 15 ns
tLZOE OE LOW to Low Z 7C166 03333ns
tHZOE OE HIGH to High Z 7C166 78810 12 ns
tLZCE CE LOW to Low Z[7] 33555ns
tHZCE CE HIGH to High Z[7, 8] 78810 15 ns
tPU CE LOW to Powe r- Up 00000ns
tPD CE HIGH to P ower-Down 12 15 20 20 20 ns
WRITE CYCLE[9]
tWC Write Cycle Time 12 15 20 20 25 ns
tSCE CE LOW to Write End 812 15 20 25 ns
tAW Address Set-Up to Write End 912 15 20 25 ns
tHA Add ress Hold from Write End 00000ns
tSA Address Set-Up to Write Start 00000ns
tPWE WE Pulse Width 812 15 15 20 ns
tSD Data Set-Up to Write End 610 10 10 15 ns
tHD Data Hold from Write End 00000ns
tLZWE WE HIGH to Low Z[7] 35555ns
tHZWE WE LOW to High Z[7,8] 6 7 7 7 10 ns
Shaded area contains advanced information.
Notes:
6. Test conditions assume signal tr ansition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30-pF load capac itance.
7. At any given temperature and voltage condition, tHZCE is less than tLZCE f or an y gi ven de vice . Thes e paramet ers are gu ar anteed by de sign and not 100% tested.
8. tHZCE and tHZWE are specified wi th CL = 5 pF as in pa rt (b) i n A C Test Loads. Transi tion is measured ±500 mV f rom steady -state v o ltage.
9. The internal write time of the memory is defined by the overlap of CE LO W and WE LOW . Bot h s ignals must b e LO W to i nitiate a writ e and e ither sign al c an terminate
a write b y goi ng HIGH. The d ata input s et-up and hold ti ming shou ld be r ef erenc ed to the r ising edge of the signal that terminates the write.
CY7C164
CY7C166
4
Swi tch i ng Waveform s
Notes:
10. WE is HIGH f or read c ycle .
11. Device is continuously selected, CE = VIL. (7C166: OE = VIL also).
12. Address valid prior to or coincident with CE tr ansition LOW .
13. 7C166 only: Data I/O will be high impedance if OE = VIH.
Read Cycle No.1
ADDRESS
DATA OUT PREVIOUS DATA VALID DATA VALID
tRC
tAA
tOHA
C164–7
[10,11]
Read CycleNo.2
50%
50%
DATA VALID
tRC
tACE
tDOE
tLZOE
tLZCE
tPU
DATA OUT HIGH IMPEDANCE IMPEDANCE
ICC
ISB
tHZOE
tHZCE
tPD
OE
7C166
CE
HIGH
VCC
SUPPLY
CURRENT
C164–8
[10,12]
WriteCycleNo.1(WE Controlled)
tWC
DATA UNDEFINED HIGH IMPEDANCE
tSCE
tAW
tSA tPWE tHA
tHD
tHZWE tLZWE
tSD
C164–9
DATA
INVALID
[9,13]
CE
WE
DA TA IN
DATA I/O
ADDRESS
CY7C164
CY7C166
5
Note:
14. If CE goes HIGH sim ultaneousl y with WE HIGH, the out put r emains i n a high-impe dance state .
Swi tch i ng Waveform s (continued)
WriteCycleNo ..2(CEControlled) tWC
HIGH IMPEDANCE
tSCE
tAW
tSA
tPWE tHA
tHD
tSD
C164–10
DATAIN VALID
[9,13,14]
ADDRESS
CE
DATA IN
DATA I/O
WE
Typical DC and AC Characteris ti cs
1.2
1.4
1.0
0.6
0.4
0.2
4.0 4.5 5.0 5.5 6.0 –55 25 125
1.2
1.0
0.8
120
100
80
60
40
20
0.0 1.0 2.0 3.0 4.0
OUTPUT SOURCE CURRENT (mA)
SUPPLY VOLTAGE (V)
NORMALIZED SUPPLY CURRENT
vs.SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT
vs.AMBIENT TEMPERATURE
AMBIENT TEMPERATURE (°C) OUTPUT VOLTAGE (V)
OUTPUT SOURCE CURRENT
vs. OUTPUT VOLTAGE
0.0
0.8 0.6
0.4
0.2
0.0
NORMALIZED I , I
CC SB
NORMALIZED I , I
CC SB
ISB
VCC=5.0V
VIN =5.0V
ICC
ICC
VCC=5.0V
TA=25°C
ISB 0
1.6
1.4
1.2
1.0
0.8
–55 25 125
NORMALIZED tAA
NORMALIZED ACCESS TIME
vs.AMBIENT TEMPERATURE
AMBIENT TEMPERATURE (°C)
1.4
1.3
1.2
1.1
1.0
0.9
4.04.55.05.56.0
NORMALIZED t AA
SUPPLY VOLTAGE (V)
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTA GE
120
140
100
60
40
20
0.0 1.0 2.0 3.0 4.0
OUTPUT SINK CURRENT (mA)
0
80
OUT PUT VOLT AGE (V)
OUTPUT SINK CURRENT
vs.OUTPUT VOLTAGE
VCC =5.0V
VCC =5.0V
TA=25°C
TA=25°C
0.6
0.8
CY7C164
CY7C166
6
Typical DC and AC Characteris ti cs (continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0 1.0 2.0 3.0 4.0
NORMALIZED IPO
SUPPLY VOLTAGE (V)
TYPICAL POWER-ON CURRENT
vs. SUPPLY VOLTAGE 30.0
25.0
20.0
15.0
10.0
5.0
0 200 400 600 800
DELTA t (ns)
AA
CAPACITANCE (pF)
TYPICAL ACCESS TIME CHANGE
vs. OUTPUT LOADING 1.25
1.00
0.75
10 20 30 40
NORMALIZED I CC
CYCLE FREQUENCY (MHz)
NORMALIZED ICC vs.CYCLETIME
0.0 5.0 0.0 1000 0.50
VCC =4.5V
TA=25°C
VCC =5.0V
TA=25°C
VIN =0.5V
CY7C164 Truth Table
CE WE Input/Output Mode
H X High Z Deselect/Power-Down
L H Data Out Read
L L Data In Write
Address De signators
Address
Name Address
Function CY 7C164 Pin
Number CY7C166 Pin
Number
A5 X3 1 1
A6 X4 2 2
A7 X5 3 3
A8 X6 4 4
A9 X7 5 5
A10 Y5 6 6
A11 Y4 7 7
A12 Y0 8 8
A13 Y1 9 9
A0 Y2 17 19
A1 Y3 18 20
A2 X0 19 21
A3 X1 20 22
A4 X2 21 23
CY7C166 Truth Table
CE WE OE Input/Output Mode
H X X High Z Deselect/Power-Down
L H L Data Out Read
L L H Da ta In Write
L H H High Z Write
CY7C164
CY7C166
7
Orde ring Information
Speed
(ns) Ordering Code Package
Name P ackage Type Operating
Range
12 CY7C164-12PC P9 22-Lead (300- Mil) Molded DIP Commercial
CY7C164-12VC V13 24-Lead Molded SOJ
15 CY7C164-15PC P9 22-Lead (300- Mil) Molded DIP Commercial
CY7C164-15VC V13 24-Lead Molded SOJ
20 CY7C164-20PC P9 22-Lead (300- Mil) Molded DIP Commercial
CY7C164-20VC V13 24-Lead Molded SOJ
25 CY7C164-25PC P9 22-Lead (300- Mil) Molded DIP Commercial
CY7C164-25VC V13 24-Lead Molded SOJ
35 CY7C164-35PC P9 22-Lead (300- Mil) Molded DIP Commercial
CY7C164-35VC V13 24-Lead Molded SOJ
Speed
(ns) Ordering Code Package
Name P ackage Type Operating
Range
12 CY7C166-12PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C166-12VC V13 24-Lead Molded SOJ
15 CY7C166-15PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C166-15VC V13 24-Lead Molded SOJ
20 CY7C166-20PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C166-20VC V13 24-Lead Molded SOJ
25 CY7C166-25PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C166-25VC V13 24-Lead Molded SOJ
35 CY7C166-35PC P13 24-Lead (300-Mil) Molded DIP Commercial
CY7C166-35VC V13 24-Lead Molded SOJ
Shaded areas contain advanced information.
Docume nt #: 38-00032-I
CY7C164
CY7C166
© Cypress Semiconductor Corporation, 1994. The information contained herein is subject to change wi thout notice. Cypress Semiconductor Corporation assumes no res p onsibility for the use
of any circui try other than circuitry embodied in a Cypress Semiconduc tor produc t. Nor does it conv ey or imply any license under patent or other rights. Cypress Semi conductor does not author ize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Package Di ag ra ms
22-Lead (300-Mil) MoldedDIPP9
24-Lead (300-Mil) Molded DIP P13/P13A
24-Lead Molded SOJ V13
