SG1524/SG2524/SG3524 REGULATING PULSE WIDTH MODULATOR DESCRIPTION FEATURES This monolithic integrated circuit contains all the control circuitry for a regulating power supply inverter or switching regulator. Included in a 16pin dual-in-line package is the voltage reference, error amplifier, oscillator, pulse width modulator, pulse steering flip-flop, dual alternating output switches and current limiting and shut-down circuitry. This device can be used for switching regulators of either polarity, transformer coupled DC to DC converters, transformerless voltage doublers and polarity converters, as well as other power applications. The SG1524 is specified for operation over the full military ambient temperature range of -55C to +125C, the SG2524 for -25C to +85C, and the SG3524 is designed for commercial applications of 0C to +70C. * * * * * * * * * * * 8V to 40V operation 5V reference Reference line and load regulation of 0.4% Reference temperature coefficient < 1% 100Hz to 300KHz oscillator range Excellent external sync capability Dual 50mA output transistors Current limit circuitry Complete PWM power control circuitry Single ended or push-pull outputs Total supply current less than 10mA HIGH RELIABILITY FEATURES - SG1524 Available to MIL-STD-883B and DESC SMD MIL-M-38510/12601BEA - JAN1524J Radiation data available LMI level "S" processing available BLOCK DIAGRAM Rev 1.1a 03/18/2005 Copyright 1994 Microsemi. Inc. 1 11861 Western Avenue Garden Grove, CA 92841 (714) 898-8121 FAX: (714) 893-2570 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Voltage (+VIN ) ............................................................. 42V Collector Voltage ................................................................ 40V Logic Inputs ........................................................... -0.3V to 5.5V Current Limit Sense Inputs ................................... -0.3V to 0.3V Output Current (each transistor) .................................... 100mA Reference Load Current .................................................. 50mA Oscillator Charging Current ................................................ 5mA Operating Junction Temperature Hermetic (J, L Packages) ............................................. 150C Plastic (N, D Packages) ............................................... 150C Storage Temperature Range ............................. -65C to 150C Pb-free / RoHS Peak Package Solder Reflow Temp (40 sec. max. exposure)... 260C (+0, -5) Lead Temperature (Soldering, 10 seconds).................................300C Note 1. Values beyond which damage may occur. THERMAL DATA J Package: Thermal Resistance-Junction to Case, JC .................. 30C/W Thermal Resistance-Junction to Ambient, JA .............. 80C/W N Package: Thermal Resistance-Junction to Case, JC .................. 40C/W Thermal Resistance-Junction to Ambient, JA ............. 65C/W D Package: Thermal Resistance-Junction to Case, JC ................... 50C/W Thermal Resistance-Junction to Ambient, JA ............ 120C/W L Package: Thermal Resistance-Junction to Case, JC .................. 35C/W Thermal Resistance-Junction to Ambient, JA ........... 120C/W RECOMMENDED OPERATING CONDITIONS (Note Note A. Junction Temperature Calculation: TJ = TA + (PD x JA). Note B. The above numbers for JC are maximums for the limiting thermal resistance of the package in a standard mounting configuration. The JA numbers are meant to be guidelines for the thermal performance of the device/pcboard system. All of the above assume no ambient airflow. 2) Oscillator Frequency Range ......................... 100Hz to 300KHz Oscillator Timing Resistor (RT) ........................ 1.8K to 100K Oscillator Timing Capacitor (CT) ............................ 1nF to 1.0F Operating Ambient Temperature Range SG1524 ......................................................... -55C to 125C SG2524 ........................................................... -25C to 85C SG3524 ............................................................... 0C to 70C Input Voltage (+VIN) ................................................... 8V to 40V Collector Voltage ....................................................... 0V to 40V Error Amp Common Mode Range ..........................1.8V to 3.4V Current Limit Sense Common Mode Range ........ -0.3V to 0.3V Output Current (each transistor) ............................... 0 to 50mA Reference Load Current ........................................... 0 to 20mA Oscillator Charging Current .................................. 30A to 2mA Note 2: Range over which the device is functional and parameter limits are guaranteed. ELECTRICAL CHARACTERISTICS (Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1524 with -55C TA 125C, SG2524 with -25C TA 85C, SG3524 with 0C TA 70C, and +V IN = 20V. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) Parameter Reference Section (Note 3) Output Voltage Line Regulation Load Regulation Temperature Stability (Note 7) Total Output Voltage Range (Note 7) Short Circuit Current Test Conditions TJ = 25C VIN = 8V to 40V IL = 0 to 20mA Over Operating Temperature Range Over Line, Load and Temperature VREF = 0V SG1524/2524 SG3524 Units Min. Typ. Max. Min. Typ. Max. 4.80 5.00 5.20 4.60 5.00 5.40 20 30 50 50 50 50 4.80 5.20 4.60 5.40 25 50 150 25 50 150 V mV mV mV V mA Note 3. IL = 0mA Rev 1.1a Copyright 1994 2 11861 Western Avenue Garden Grove, CA 92841 (714) 898-8121 FAX: (714) 893-2570 ELECTRICAL CHARACTERISTICS (continued) Parameter Oscillator Section (Note 4) Initial Accuracy Voltage Stability Maximum Frequency Sawtooth Peak Voltage Sawtooth Valley Voltage Clock Amplitude Clock Pulse Width Error Amplifier Section (Note 5) Input Offset Voltage Input Bias Current Input Offset Current DC Open Loop Gain Output Low Level Output High Level Common Mode Rejection Supply Voltage Rejection Gain-Bandwidth Product (Note 7) P.W.M. Comparator (Note 4) Minimum Duty Cycle Maximum Duty Cycle Test Conditions TJ = 25C MIN TJ MAX VIN = 8V to 40V RT = 2K, CT = 1nF VIN = 40V VIN = 8V 36 34 200 3 0.6 3.2 0.3 RS 2K 4. 5. 6. 7. 40 0.1 400 1 44 46 1 3.8 1.2 1.5 0.5 1 5 10 1 0.2 4.2 0.5 36 34 200 3 0.6 3.2 0.3 0.1 400 1 44 46 1 3.8 1.2 1.5 10 10 2 0.2 4.2 0.5 3.8 1 2 45 49 3.8 70 55 1 VCOMP = 0.5V VCOMP = 3.6V 45 49 190 200 210 200 180 0.5 0.2 0.8 1.2 1.8 0.5 0.2 72 40 2 1 RL 10M, TJ = 25C VPIN 1 - VPIN 2 150mV VPIN 2 - VPIN 1 150mV VCM = 1.8V to 3.4V VIN = 8V to 40V TJ = 25C 60 2 200 220 200 mV A 0.8 1.2 1.8 V V 50 2 0.4 0.2 A V V s s 10 mA 17 0.4 0.2 7 10 mV A A dB V V dB dB MHz % % 50 2 17 KHz KHz % KHz V V V s 0 0 Current Limit Amplifier Section (Note 6) TJ = 25C Sense Voltage Input Bias Current Shutdown Section Threshold Voltage TJ = 25C MIN TJ MAX Output Section (each transistor) Collector Leakage Current VCE = 40V Collector Saturation Voltage IC = 50mA Emitter Output Voltage IE = 50mA RC = 2K Collector Voltage Rise Time Collector Voltage Fall Time RC = 2K Power Consumption Standby Current VIN = 40V Note Note Note Note SG1524/2524 SG3524 Units Min. Typ. Max. Min. Typ. Max. 7 FOSC = 40KHz (R T = 2.9K, CT = .01F) VCM = 2.5V VCM = 0V These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production. Rev 1.1a Copyright 1994 3 11861 Western Avenue Garden Grove, CA 92841 (714) 898-8121 FAX: (714) 893-2570 APPLICATION NOTES OSCILLATOR The oscillator in the SG1524 uses an external resistor RT to establish a constant charging current into an external capacitor CT. While this uses more current than a series-connected RC, it provides a linear ramp voltage at CT which is used as a timedependent reference for the PWM comparator. The charging current is equal to 3.6V/RT, and should be restricted to between 30A and 2mA. The equivalent range for RT is 1.8K to 100K. Note that for buck regulator topologies, the two outputs can be wire-ORed for an effective 0-90% duty cycle range. With this connection, the output frequency is the same as the oscillator frequency. For push-pull applications, the outputs are used separately; the flip-flop limits the duty cycle range at each output to 0-45%, and the effective switching frequency at the transformer is 1/2 the oscillator frequency. If it is desired to synchronize the SG1524 to an external clock, a positive pulse may be applied to the clock pin. The oscillator should be programmed with RT and CT values that cause it to freerun at 90% of the external sync frequency. A sync pulse with a maximum logic 0 of +0.3 volts and a minimum logic 1 of +2.4 volts applied to Pin 3 will lock the oscillator to the external source. The minimum sync pulsewidth should be 200 nanoseconds, and the maximum is determined by the required deadtime. The clock pin should never be driven more negative than -0.3 volts, nor more positive than +5.0 volts. The nominal resistance to ground is 3.2K at the clock pin, 25% over temperature. The range of values for CT also has limits, as the discharge time of CT determines the pulse width of the oscillator output pulse. The pulse is used (among other things) as a blanking pulse to both outputs to insure that there is no possibility of having both outputs on simultaneously during transitions. This output deadtime relationship is shown in Figure 1. A pulse width below 0.35 microseconds may cause failure of the internal flip-flop to toggle. This restricts the minimum value of CT to 1000pF. (Note: Although the oscillator output is a convenient oscilloscope sync input, the probe capacitance will increase the pulse width and decrease the oscillator frequency slightly.) Obviously, the upper limit to the pulse width is determined by the modulation range required in the power supply at the chosen switching frequency. Practical values of CT fall between 1000pF and 0.1F, although successful 120 Hz oscillators have been implemented with values up to 5F and a series surge limit resistor of 100 ohms. If two or more SG1524s must be synchronized together, program one master unit with RT and CT for the desired frequency. Leave the RT pins on the slaves open, connect the C T pins to the CT of the master, and connect the clock pins to the clock pin of the master. Since CT is a high-impedance node, this sync technique works best when all devices are close together. The oscillator frequency is approximately 1/RT *CT; where R is in ohms, C is in microfarads, and the frequency is in Megahertz. For greater accuracy, the chart in Figure 2 may be used for a wide range of operating frequencies. FIGURE 1 - OUTPUT STAGE DEADTIME VS. CT FIGURE 2 - OSCILLATOR FREQUENCY VS. RT AND CT Rev 1.1a Copyright 1994 4 11861 Western Avenue Garden Grove, CA 92841 (714) 898-8121 FAX: (714) 893-2570 APPLICATION NOTES (continued) CURRENT LIMITING The current limiting circuitry of the SG1524 is shown in Figure 3. By matching the base-emitter voltages of Q1 and Q2, and assuming a negligible voltage drop across R1: A second factor to consider is that the response time is relatively slow. The current limit amplifier is internally compensated by R1 , C1 , and Q1, resulting in a roll-off pole at approximately 300 Hz. A third factor to consider is the bias current of the C.L. Sense pins. A constant current of approximately 150A flows out of Pin 4, and a variable current with a range of 0-150A flows out of Pin 5. As a result, the equivalent source impedance seen by the current sense pins should be less than 50 ohms to keep the threshold error less than 5%. C.L. Threshold = VBE(Q1) + I1* R2 - VBE(Q2) = I1* R 2 ~ 200 mV Although this circuit provides a relatively small threshold with a negligible temperature coefficient, there are some limitations to its use because of its simplicity. Since the gain of this circuit is relatively low (42 dB), there is a transition region as the current limit amplifier takes over pulse width control from the error amplifier. For testing purposes, threshold is defined as the input voltage required to get 25% duty cycle (+2 volts at the error amplifier output) with the error amplifier signaling maximum duty cycle. The most important of these is the limited common-mode voltage range: 0.3 volts around ground. This requires sensing in the ground or return line of the power supply. Also precautions should be taken to not turn on the parasitic substrate diode of the integrated circuit, even under transient conditions. A Schottky clamp diode at Pin 5 may be required in some configurations to achieve this. APPLICATION NOTE: If the current limit function is not used on the SG1524, the common-mode voltage range restriction requires both current sense pins to be grounded. FIGURE 3 - CURRENT LIMITING CIRCUITRY OF THE SG1524 Push-pull outputs are used in this transformer-coupled DC-DC regulating converter. Note that the oscillator must be set at twice the desired output frequency as the SG1524's internal flip-flop divides the frequency by 2 as it switches the P.W.M. signal from one output to the other. Current limiting is done here in the primary so that the pulse width will be reduced should transformer saturation occur. In this conventional single-ended regulator circuit, the two outputs of the SG1524 are connected in parallel for effective 0 - 90% duty-cycle modulation. The use of an output inductor requires and R-C phase compensation network for loop stability. Rev 1.1a Copyright 1994 5 11861 Western Avenue Garden Grove, CA 92841 (714) 898-8121 FAX: (714) 893-2570 CONNECTION DIAGRAMS & ORDERING INFORMATION Package 16-PIN CERAMIC DIP J - PACKAGE Part No. SG1524J/883B JAN1524J SG1524J/DESC SG1524J SG2524J SG3524J Ambient Temperature Range -55C to 125C -55C to 125C -55C to 125C -55C to 125C -25C to 85C 0C to 70C 16-PIN PLASTIC DIP N - PACKAGE SG2524N SG3524N -25C to 85C 0C to 70C 16-PIN NARROW BODY PLASTIC S.O.I.C. D - PACKAGE SG2524D SG3524D -25C to 85C 0C to 70C RoHS / Pb-free transition DC:0440 20-PIN CERAMIC LEADLESS CHIP CARRIER L- PACKAGE (See Notes Below) Pb-free / RoHS 100% Matte Tin Lead Finish* SG1524L/883B SG1524L -55C to 125C -55C to 125C Connection Diagram INV. INPUT N.I. INPUT OSC. OUTPUT +C.L. SENSE -C.L. SENSE RT CT GROUND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VREF +VIN EB CB CA EA SHUTDOWN COMPENSATION N Package: RoHS / Pb-free Transition DC: 0503*. 100% Matte Tin Lead Finish INV. INPUT N.I. INPUT OSC. OUTPUT +C.L. SENSE -C.L. SENSE RT 1 16 2 15 3 14 4 13 5 12 6 11 CT 7 10 GROUND 8 9 3 1. N.C. 2. VREF 3. INV. INPUT 4. N.I. INPUT 5. OSC. OUTPUT 6. + C.L. SENSE 7. - C.L. SENSE 8. RT 9. CT 10. GROUND 2 1 VREF +VIN EB CB CA EA SHUTDOWN COMPENSATION 20 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 11. COMP 12. SHUTDOWN 13. N.C. 14. EA 15. CA 16. N.C. 17. CB 18. EB 19. N.C. 20. +VIN *RoHS compliant Note 1. Contact factory for JAN and DESC product availablity. 2. All packages are viewed from the top. Rev 1.1a Copyright 1994 6 11861 Western Avenue Garden Grove, CA 92841 (714) 898-8121 FAX: (714) 893-2570