HY62256A Series
Rev.02 /Jun.99 3
DC CHARACTERISTICS
Vcc = 5V±10%, TA = 0°C to 70°C (Normal) unless otherwise specified
Symbol Parameter Test Condition Min. Typ. Max. Unit
ILI Input Leakage Current Vss < VIN <.Vcc -1 -1uA
ILO Output Leakage Current Vss < VOUT < Vcc, /CS = VIH or
/OE = VIH or /WE = VIL -1 -1uA
Icc Operating Power Supply
Current /CS = VIL,
VIN = VIH or VIL, II/O = 0mA -30 50 mA
ICC1 Average Operating Current /CS = VIL,
Min. Duty Cycle = 100%, II/O = 0mA -40 70 mA
ISB TTL Standby Current
(TTL Inputs) /CS= VIH VIN = VIH or VIL -0.4 2mA
ISB1 CMOS Standby Current /CS > Vcc - 0.2V - - 1mA
(CMOS Inputs) VIN < 0.2V or L-2 100 uA
VIN > Vcc – 0.2V LL -1 25 uA
VOL Output Low Voltage IOL = 2.1mA - - 0.4 V
VOH Output High Voltage IOH = -1mA 2.4 - - V
Note : Typical values are at Vcc =5.0V, TA = 25°C
AC CHARACTERISTICS
Vcc = 5V±10%, TA = 0°C to 70°C (Normal) unless otherwise specified.
-55 -70 -85
Min. Max. Min. Max. Min Max.
1TRC Read Cycle Time 55 -70 -85 -ns
2TAA Address Access Time -55 -70 -85 ns
3TACS Chip Select Access Time -55 -70 -85 ns
4TOE Output Enable to Output Valid -30 -35 -45 ns
5TCLZ Chip Select to Output in Low Z 5-5-5-ns
6TOLZ Output Enable to Output in Low Z 5-5-5-ns
7TCHZ Chip Deselection to Output in High Z 0 20 0 30 0 30 ns
8TOHZ Out Disable to Output in High Z 0 20 0 30 0 30 ns
9TOH Output Hold from Address Change 5-5-5-ns
10 TWC Write Cycle Time 55 -70 -85 -ns
11 TCW Chip Selection to End of Write 50 -65 -75 -ns
12 TAW Address Valid to End of Write 50 -65 -75 -ns
13 TAS Address Set-up Time 0-0-0-ns
14 TWP Write Pulse Width 40 -50 -55 -ns
15 TWR Write Recovery Time 0-0-0-ns
16 TWHZ Write to Output in High Z 0 20 0 30 0 30 ns
17 TDW Data to Write Time Overlap 25 -35 -40 -ns
18 TDH Data Hold from Write Time 0-0-0-ns
19 TOW Output Active from End of Write 5-5-5-ns
Symbol Parameter
#Unit