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FNA51060T3 Motion SPM® 55 Series
April 2017
©2014 Semiconductor 1www.fairchildsemi.com
www.onsemi.com
FNA51060T3 Rev. 1.1
FNA51060T3
Motion SPM® 55 Series
Features
• UL Certified No. E209204 (UL1557)
• 600 V - 10 A 3-Phase IGBT Inverter Including Co ntrol
IC for Gate Drive and Protections
• Low-Loss, Short-Circuit Rated IGBTs
• Separate Open-Emitter Pins from Low-Side IGBTs for
Three-Phase Current Sensing
• Active-HIGH interface, works with 3.3 / 5 V Logic,
Schmitt-trigger Input
• HVIC for Gate Driving, Under-Voltage and Short-Cir-
cuit Current Protection
• Fault Output for Under-Voltage and Short-Circuit Cur-
rent Protection
• Inter-Lock Function to Prevent Short-Circuit
• Shut-Down Input
• HVIC Temperature-Sensing Built-In for Temperature
Monitoring
• Optimized for 5 kHz Switching Frequency
• Isolation Rating: 1500 Vrms / min.
Applications
• Motion Control - Home Appliance / Industrial Motor
Related Resources
General Description
FNA51060T3 is a Motion SPM 55 module providing a
fully-featured, high-performance inverter output stage for
AC Induction, BLDC, and PMSM motors. These modules
integrate optimized gate drive of the built-in IGBTs to
minimize EMI and losses, while also provi ding multiple
on-module protectio n features including under-voltage
lockouts, inter-lock function, over-current shutdown,
thermal monitoring of drive IC , and fault reporting. The
built-in, high-speed HVIC requires only a single supply
voltage and translates the incoming logic-level gate
inputs to the high-voltage, high-current drive signals
required to properly drive the module's robust short-
circuit-rated IGBTs. Separate negative IGBT terminals
are available for each phase to support the widest
variety of control algorithms.
Package Mark ing and Ordering Information
Figure 1. 3D Package Drawing
(Click to Activate 3D Content)
Device Device Marking Package Packing Type Quantity
FNA51060T3 FNA51060T3 SPMFA-A20 RAIL 13
FNA51060T3 Motion SPM® 55 Series
©2014 emiconductor 2www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Integrated Power Functions
• 600 V - 10 A IGBT inverter for three phase DC / AC power conversion (Please refer to Figure 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: gate drive circuit, high-voltage isolated high-speed level shifting
control circuit Under-Voltage Lock-Out (UVLO) protection
• For inverter low-side IGBTs: gate drive circuit, Short-Circuit Protection (SCP)
control supply circuit Under-Voltage Lock-Out (UVLO) protection
• Fault signaling: corresponding to UVLO (low-side supply) and SC faults
• Input interface: High-active interface, works with 3.3 / 5 V logic, Schmitt trigger input
Pin Configuration
Figure 2. Top View
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 3www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Pin Descriptions
Pin Number Pin Name Pin Description
1 P Positive DC-Link Input
2U, VS(U) Output for U Phase
3V, VS(V) Output for V Phase
4W, VS(W) Output for W Phase
5 NUNegative DC-Link Input for U Phase
6 NVNegative DC-Link Input for V Phase
7 NWNegative DC-Link Input for W Phase
8IN(UL) Signal Input for Low-Side U Phase
9IN(UH) Signal Input for High- ide U Phase
10 IN(VL) Signal Input for Low-Side V Phase
11 IN(VH) Signal Input for High-Side V Phase
12 IN(WL) Signal Input for Low-Side W Phase
13 IN(WH) Signal Input for High-Side W Phase
14 VDD Common Bias Voltage for IC and IGBTs Driving
15 COM Common Supply Ground
16 CSC Capacitor (Low-Pass Filter) for Short-circuit Current Detection Input
17 VFFault Output, Shut-Down Input, Temperature Output of Drive IC
18 VB(W) High-Side Bias Voltage for W-Phase IGBT Driving
19 VB(V) High-Side Bias Voltage for V-Phase IGBT Driving
20 VB(U) High-Side Bias Voltage for U-Phase IGBT Driving
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 4www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Internal Equivalent Circuit and Input/Output Pins
Figure 3. Internal Block Diagram
Note:
1. Inverter high-side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT.
2. Inverter low-side is composed of three IGBTs, freewheeling diodes, and one control IC for each IGBT. It has gate drive and protection functions.
3. Single drive IC has gate driver for six IGBTs and protection functions.
4. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals.
VB
HO
HIN
LO
VS
LIN
Csc
VF
COM
VDD
Csc
VF
IN(UL)
IN(UH)
VB(U)
IN(VH)
VB(V)
VB(W)
IN(WH)
IN(WL)
Nu
Nv
Nw
U,Vs(U)
V,Vs(V)
W,Vs(W)
P
IN(VL)
HO
LO
VS
HO
LO
VS
COM
VDD
VB
HIN
LIN
VB
HIN
LIN
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 5www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Absolute Maximum Ratings (TJ = 25°C, unless otherwise specified.)
Inverter Part
Note:
5. The maximum junction temperature rating of the power chips integrated within the Motion SPM® 55 product is 150°C.
Control Part
Total System
Thermal Resistance
Note:
6. For the measurement point of case temperature (TC), please refer to Figure 2.
Symbol Parameter Conditions Rating Unit
VPN Supply Voltage Applied between P - NU, NV, NW450 V
VPN(Surge) Supply Voltage (Surge) Applied between P - NU, NV, NW500 V
VCES Collector - Emitter Voltage 600 V
± ICEach IGBT Collector Current TC = 25°C, TJ ＜150°C 10 A
± ICP Each IGBT Collector Current (Peak) TC = 25°C, TJ ＜ 150°C, Under 1 ms Pulse
Width 20 A
PCCollector Dissipation TC = 25°C per Chip 22 W
TJOperating Junction Temperature (Note 5) -40 ~ 150 °C
Symbol Parameter Conditions Rating Unit
VDD Control Supply Voltage Applied between VDD - COM 20 V
VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
20 V
VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH),
IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VDD +0.3 V
VFFault Supply Voltage Applied between VF - COM -0.3 ~ VDD +0.3 V
IFFault Current Sink Current at VF pin 5mA
VSC Current Sensing Input Voltage Applied between CSC - COM -0.3 ~ VDD +0.3 V
Symbol Parameter Conditions Rating Unit
VPN(PROT) Self Protection Supply Voltage Limit
(Short Circuit Protection Capability) VDD = VBS = 13.5 ~ 16.5 V
TJ = 150°C, Non-Repetitive, < 2 μs400 V
TSTG Storage Temperature -40 ~ 125 °C
VISO Isolation Voltage
Connect Pins to Heat Sink Plate AC 60 Hz, Sinusoidal, 1 Minute 1500 Vrms
Symbol Parameter Conditions Min. Typ. Max. Unit
Rth(j-c)Q Junction to Case Thermal Resistance Inverter IGBT part (per 1 / 6 module) - - 5.6 °C / W
Rth(j-c)F Inverter FWD part (per 1 / 6 module) - - 6.9 °C / W
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 6www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Electrical Characteristics (TJ = 25°C, unless otherwise specified.)
Inverter Part
Note:
7. tON and tOFF include the prop ag ation delay of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For
the detailed information, please see Figure 4.
Figure 4. Switching Time Definition
Symbol Parameter Conditions Min. Typ. Max. Unit
VCE(SAT) Collector - Emitter Saturation
Voltage VDD = VBS = 15 V
VIN = 5 V
IC = 10 A
TJ = 25°C -1.45 1.85 V
TJ = 150°C -1.65 - V
VFFWDi Forward Voltage VIN = 0 V
IF = 10 A TJ = 25°C -1.85 2.3 V
TJ = 150°C -1.75 - V
HS tON Switching Times VPN = 400 V, VDD = VBS = 15 V, IC = 10A
TJ = 25°C
VIN = 0 V ↔ 5 V, Inductive load
(Note 7)
-700 -ns
tC(ON) -170 -ns
tOFF -800 -ns
tC(OFF) -150 -ns
trr -90 -ns
LS tON VPN = 400 V, VDD = VBS = 15 V, IC = 10A
TJ = 25°C
VIN = 0 V ↔ 5 V, Inductive load
(Note 7)
-750 -ns
tC(ON) -250 -ns
tOFF -800 -ns
tC(OFF) -100 -ns
trr -80 -ns
ICES Collector - Emitter Leakage
Current VCE = VCES - - 1 mA
VCE IC
VIN
tON tC(ON)
VIN(ON)
10% IC
10% VCE
90% IC
100% IC
trr
100% IC
VCE
IC
VIN
tOFF tC(OFF)
VIN(OFF) 10% VCE 10% IC
(a ) tu rn -o n (b ) turn -o ff
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 7www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Control Part
Note:
8. Short-c ircuit prote ction is functioning for all si x IGBTs.
Figure. 5. V-T Curve of Temperature Output of IC (5V pull-up with 4.7kohm)
Symbol Parameter Conditions Min. Typ. Max. Unit
IQDD Quiescent VDD Supply
Current VDD = 15 V,
IN(UH,VH,WH,UL,VL,WL) = 0 V VDD - COM -2.3 3.4 mA
IPDD Operating VDD Supply
Current VDD = 15 V, fPWM = 20 kHz, duty =
50%, applied to one PWM signal
input
VDD - COM -2.7 4.0 mA
IQBS Quiescent VBS Supply
Current VBS = 15 V, IN(UH, VH, WH) = 0 V VB(U) - VS(U), VB(V) -
VS(V), VB(W) - VS(W)
-60 100 μA
IPBS Operating VBS Supply
Current VDD = VBS = 15 V, fPWM = 20 kHz,
duty = 50%, applied to one PWM
signal input for high - side
VB(U) - VS(U), VB(V) -
VS(V), VB(W) - VS(W)
-430 600 μA
VFH Fault Output Voltage VSC = 0 V, VF Circuit: 4.7 kΩ to 5 V Pull-up 4.5 - - V
VFL VSC = 1 V, VF Circuit: 4.7 kΩ to 5 V Pull-up - - 0.5 V
VSC(ref) Short-Circuit Trip Level VDD = 15 V (Note 4) 0.45 0.5 0.55 V
UVDDD Supply Circuit
Under-Voltage
Protection
Detection level 10.0 11.5 13.0 V
UVDDR Reset level 10.5 12.0 13.5 V
UVBSD Detection level 9.5 11.0 12.5 V
UVBSR Reset level 10.0 11.5 13.0 V
IFT HVIC Temperature
Sensing Current VDD = VBS = 15 V, THVIC = 25°C 70 95 120 μA
VFT HVIC Temperature
Sensing Voltage VDD = VBS = 15 V, THVIC = 25° C, 4.7 kΩ to 5 V Pull-up
(Figure. 5) -4.55 V
tFOD Fault-Out Pulse Width 40 100 -μs
VFSDR Shut-down Reset level Applied between VF - COM - - 2.4 V
VFSDD Shut-down Detection
level 0.8 - - V
VIN(ON) ON Threshold Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL),
IN(WL) - COM - - 2.4 V
VIN(OFF) OFF Threshold Voltage 0.8 - - V
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 8www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Recommended Operating Conditions
Note:
9. This product might not make response if input pulse width is less than the recommanded value.
Note:
10. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s
printed cir cuit board. The input signal secti on of the SP M 55 product integrate s 5 kΩ (typ.) pull-down resistor. Therefore, when using an external fi ltering resistor, please pay
attention to the signal voltage drop at input terminal.
Figure 6. Recommended MCU I/O Interface Circuit
Symbol Parameter Conditions Min. Typ. Max. Unit
VPN Supply Voltage Applied between P - NU, NV, NW-300 400 V
VDD Control Supply Voltage Applied between VDD - COM 14.0 15 16.5 V
VBS High - Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) -
VS(W)
13.0 15 18.5 V
dVDD / d t,
dVBS / dt Control Supply Variation -1 - 1 V / μs
tdead Blanking Time for
Preventing Arm - Short For each input signal 0.5 - - μs
fPWM PWM Input Signal - 40°C ＜ TJ ＜ 150°C - - 20 kHz
VSEN Voltage for Current
Sensing Applied between NU, NV, NW - COM
(Including surge voltage) -4 4 V
PWIN(ON) Minimun Input Pulse
Width (Note 9) 0.7 - - μs
PWIN(OFF) 0.7 - -
MCU
COM
5 V Line (MCU or C ontrol pow er)
,,
IN(UL) IN(VL) IN(WL)
,,
IN(UH) IN(VH) IN(WH)
VF
RPF = 4.7kΩSPM
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 9www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Mechanical Characteristics and Ratings
Figure 7. Flatness Measurement Position
Figure 8. Mounting Screws Torque Order
Note:
11. Do not make over torque when mounting screws. Much mounting torque may cause package cracks, as well as bolts and Al heat- s ink destruction.
12. Avoi d one s ide tig htening stress. Fig ure 10 sh ows th e recomm ende d torqu e order for mou nting scr ews. Un even mou nting can cause t he ceramic substrate of the Mo tion SPM
55 product to be damaged. The Pre-screwing torque is set to 20 ~ 30 % of maximum torque rating.
Parameter Conditions Min. Typ. Max. Unit
Device Flatness See Figure 7 -50 -100 μm
Mounting Torque Mounting Screw: - M3
Note Figure 8
Recommended 0.7 N • m 0.6 0.7 0.8 N • m
Recommended 7.1 kg • cm 5.9 6.9 7.9 kg • cm
Weight -6.0 - g
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 10 www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Time Charts of Protective Function
a1 : Control supply voltage rises: After the voltage rises UVDDR, the circuits start to operate when next input is applied.
a2 : Normal operation: IGBT ON and carrying current.
a3 : Under voltage detection (UVDDD).
a4 : IGBT OFF in spite of control input condition.
a5 : Fault output operation starts.
a6 : Under voltage reset (UVDDR).
a7 : Normal operation: IGBT ON and carrying current.
Figure 9. Under-Voltage Protection (Low-Side)
b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied.
b2 : Normal operation: IGBT ON and carrying current.
b3 : Under voltage detection (UVBSD).
b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.
b5 : Under voltage reset (UVBSR)
b6 : Normal operation: IGBT ON and carrying current
Figure 10. Under-Voltage Protection (High-Side)
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UVDDR
Protection
Circuit State SET RESET
UVDDD
a1 a3
a2 a4
a6
a5
a7
Input Signal
Output Current
Fault Output Signal
Control
Supply Voltage
RESET
UVBSR
Protection
Circuit State SET RESET
UVBSD
b1 b3
b2 b4 b6
b5
High-level (no fault output)
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 11 www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
(with the external shunt resistance and CR connection)
c1 : Normal operation: IGBT ON and carrying current.
c2 : Short circuit current detection (SC trigger).
c3 : Hard IGBT gate interrupt.
c4 : IGBT turns OFF.
c5 : Input “L” : IGBT OFF state.
c6 : Input “H”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.
c7 : IGBT OFF state
Figure 11. Short-Circuit Protection
d1 : High Side First - Input - First - Output Mode
d2 : Low Side Noise Mode : No Lo
d3 : High Side Noise Mode : No Ho
d4 : Low Side First - Input - First - Output Mode
d5 : In - Phase Mode : No Ho
Figure 12. Inter-Lock Function
Lower arms
control input
Output Current
Sensing Voltage
of the shun t
resistance
Fault Output Signal
SC Reference Voltage
CR circuit time
constant delay
SC
Protection
Circuit state SET RESET
c6 c7
c3
c2
c1
c8
c4
c5
Internal IGBT
Gate-Emitter Volt age
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 12 www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Note:
1) To avoid malfunction, the wiring of ea ch input should be as short as possible. (less than 2 ~ 3 cm)
2) By virt ue of integr atin g an ap plica tion specific type of HVIC inside the SPM® 55 product, direct coupling to MCU terminals with out any opto-coupler or transformer isolation is
possible.
3) VF is open-drain type. This sig nal li ne sho uld be pulle d up to th e posi tive side of the M CU or co ntro l power suppl y with a r esistor that makes IFO up to 5 mA . Please ref er to Fig-
ure 14.
4) CSP15 of around seven times larger than bootstrap capacitor CBS is recommended.
5) Input signal is active-HIGH type. There is a 5 kΩ resistor inside the IC to pull down each input signal line to GND. RC coupling circuits is recommanded for the prevention of
input signal oscillation. RSCPS time constant should be selected in the range 50 ~ 150 ns. (Reco mm e nded RS = 100 Ω, CPS = 1 nF)
6) To prevent errors of the protection function, the wiring around RF and CSC should be as short as possible.
7) In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5 ~ 2 μs.
8) The connection between con trol GND line and power GND line which includes the NU, NV, NW must be connected to only one point. Please do not connect the control GND
to the power GND by the broad patter n. Also, the wiring distance between control GND and power GND should be as short as possible.
9) Each capacitor should be mounted as close to the pins of the Motion SPM 55 product as possible.
10) To prevent surge destruct io n, th e wi ri ng betw ee n th e smo oth i ng capacitor and the P and GND pins should be as sho rt as po ssible. The use of a high frequency non-inductive
capacitor of around 0.1 ~ 0.22 μF between the P and GND pins is recommended.
11) Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays.
12) The zener diode or transient voltage suppressor should be adopted for the protection of ICs from the surge destruction between each pair of control supply terminals.
(Recommanded zener diode is 22 V / 1 W, which has the lower zener impedance characteristic than about 15 Ω)
13) Please choose the electrolytic capacitor with good temperature characteristic in CBS. Also, choose 0.1 ~ 0.2 μF R-category ceramic capacitors with good temperature and
frequency characteristics in CBSC.
14) For the detailed information, please refer to the application notes.
Figure 13. Typical Application Circuit
Fault
15V line
CBS CBSC
CSP15 CSPC15
RPF
CBPF
RS
M
VDC
CDCS
Gating UH
Gating VH
Gating WH
Gating UL
Gating VL
Gati n g WL
CPF
M
C
U
RSW
RSV
RSU
U-Phas e C urren t
V-Phase Current
W-Ph as e Current
RFNW(7)
NV(6)
NU(5)
W (4)
V (3)
U (2)
P (1)
(20) VB(U)
(19) VB(V)
(16) CSC
(17) VF
(8) IN(UL)
(10) IN(VL)
(12) IN(WL)
(9) IN(UH)
(11) IN(VH)
(18) VB(W)
(14) VDD
(13) IN(WH)
Input Signal for
Short-Circuit Protection
CSC
RS
RS
RS
RS
RS
RS
CPS
CPS
CPS
CPS
CPS CPS
IN(WH)
IN(VH)
IN(UH)
COM
VDD
VS(V)
VS(U)
VS(W)
VB(U)
VB(V)
VB(W)
(15) C OM
OUT(WH)
OUT(VH)
OUT(UH)
Temp. Monitoring
5V line
CSPC05 CSP05
CBS CBSC
CBS CBSC
IN(WL)
IN(VL)
IN(UL)
VF
CSC
OUT(WL)
OUT(VL)
OUT(UL)
FNA51060T3 Motion SPM® 55 Series
©2014 Semiconductor 13 www.fairchildsemi.com
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FNA51060T3 Rev. 1.1
Detailed Package Outline Drawings (FNA51060T3, Long Lead)
©2014 Semiconductor www.fairchildsemi.com
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