CAUTION: The small device geometries inherent to the design of this bipolar component increase the component’s
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in
handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Description
These small outline, low input current, high gain
optocouplers are single channel devices in a five lead
miniature footprint. They are electrically equivalent
to the following Avago optocouplers:
The SO-5 JEDEC registered (MO-155) package outline
does not require “through holes” in a PCB. This
package occupies approximately one-fourth the
footprint area of the standard dual-in-line package.
The lead profile is designed to be compatible with
standard surface mount processes.
These high gain series opto-couplers use a Light
Emitting Diode and an integrated high gain photo-
detector to provide extremely high current transfer
ratio between input and output. Separate pins for
the photodiode and output stage results in TTL
compatible saturation voltages and high speed
operation. Where desired the VCC and VO terminals
may be tied together to achieve conventional photo-
darlington operation.
The HCPL-M701 is for use in CMOS, LSTTL or other
low power applications. A 400% minimum current
transfer ratio is guaranteed over a 0-70°C operating
range for only 0.5 mA of LED current.
The HCPL-M700 is designed for use mainly in TTL
applications. Current Transfer Ratio is 300%
minimum over 0-70°C for an LED current of 1.6 mA
[1 TTL Unit Load (U.L.)]. A 300% CTR enables operation
with 1 U.L. out with a 2.2 kΩ pull-up resistor.
Selection for lower input currents down to 250 µA is
available upon request.
Features
• Surface mountable
• Very small, low profile JEDEC registered package outline
• Compatible with infrared vapor phase reflow and wave
soldering processes
• High current transfer ratio: 2000%
• Low input current capability: 0.5 mA
• TTL compatible output: VOL = 0.1 V
• Guaranteed ac and dc performance over temperature:
0°C to 70°C
• High output current: 60 mA
• Recognized under the component program of U.L. (file No.
E55361) for dielectric withstand proof test voltage of 3750
Vac, 1 minute
• Lead free option “-000E”
Applications
• Ground isolate most logic families: TTL/TTL, CMOS/TTL,
CMOS/CMOS, LSTTL/TTL, CMOS/LSTTL
• Low input current line receiver
• EIA RS232C line receiver
• Telephone ring detector
• ac line voltage status indicator:
low input power dissipation
• Low power systems: ground isolation
HCPL-M700/HCPL-M701
Small Outline , 5 Lead, L o w Input Current, High Gain Optocouplers
Data Sheet
SO-5 Package Standard DIP SO-8 Package
HCPL-M700 6N138 HCPL-0700
HCPL-M701 6N139 HCPL-0701
2
Outline Drawing (JEDEC MO-155)
MXXX
XXX
6
5
43
1
7.0 ± 0.2
(0.276 ± 0.008)
2.5 ± 0.1
(0.098 ± 0.004)
0.102 ± 0.102
(0.004 ± 0.004)
VCC
VOUT
GNDCATHODE
ANODE
4.4 ± 0.1
(0.173 ± 0.004)
1.27
(0.050)
BSC
0.15 ± 0.025
(0.006 ± 0.001)
0.71
(0.028)MIN.
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
* MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006)
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
7° MAX.
MAX. LEAD COPLANARITY
= 0.102 (0.004)
Ordering Information
HCPL-M700 and HCPL-M701 are UL Recognized with 3750 Vrms for 1 minute per UL1577 and are approved
under CSA Component Acceptance Notice #5, File CA 88324.
Option
Part RoHS Non RoHS Surface Gull Tape &
Number Compliant Compliant Package Mount Wing Reel Quantity
HCPL-M700 -000E No option SO-5 100 per tube
HCPL-M701 -500E #500 X X X 1500 per reel
To order, choose a part number from the part number column and combine with the desired option from the
option column to form an order entry.
Example 1:
HCPL-M700-500E to order product of Mini-flat Surface Mount 5-pin package in Tape and Reel packaging
with RoHS compliant.
Example 2:
HCPL-M700 to order product of Mini-flat Surface Mount 5-pin package in tube packaging and non RoHS
compliant.
Option data sheets are available. Contact your Avago sales representative or authorized distributor for
information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since 15th July
2001 and RoHS compliant option will use ‘-XXXE‘.
3
Absolute Maximum Ratings
(No Derating Required up to 85°C)
Storage Temperature ...................................................-55°C to +125°C
Operating Temperature .................................................-40°C to +85°C
Average Input Current - IF.......................................................... 20 mA
Peak Input Current - IF............................................................... 40 mA
(50% duty cycle, 1 ms pulse width)
Peak Transient Input Current - IF................................................ 1.0 A
(≤1 µs pulse width, 300 pps)
Reverse Input Voltage - VR............................................................... 5 V
Input Power Dissipation............................................................. 35 mW
Output Current - IO (Pin 5) ......................................................... 60 mA
Supply and Output Voltage - VCC (Pin 6-4),VO (Pin 5-4)
HCPL-M700 ....................................................................-0.5 V to 7 V
HCPL-M701 ..................................................................-0.5 V to 18 V
Output Power Dissipation ........................................................ 100 mW
Infrared and Vapor Phase Reflow Temperature .................... see below
SchematicLand Pattern Recommendation
I
F
6V
CC
1
3
I
CC
V
F
ANODE
CATHODE
+
–5
4GND
V
O
I
O
8.27
(0.325)
2.0
(0.080)
2.5
(0.10)
1.3
(0.05)
0.64
(0.025)
4.4
(0.17)
4
Insulation Related Specifications
Parameter Symbol Value Units Conditions
Min. External Air Gap L(IO1) ≥5 mm Measured from input terminals
(Clearance) to output terminals
Min. External Tracking Path L(IO2) ≥5 mm Measured from input terminals
(Creepage) to output terminals
Min. Internal Plastic Gap 0.08 mm Through insulation distance
(Clearance) conductor to conductor
Tracking Resistance CTI 175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group (per DIN VDE 0109) IIIa Material Group DIN VDE 0109
Solder Reflow Thermal Profile
Recommended Pb-Free IR Profile
0
TIME (SECONDS)
TEMPERATURE (°C)
200
100
50 150100 200 250
300
0
30
SEC.
50 SEC.
30
SEC.
160°C
140°C
150°C
PEAK
TEMP.
245°C
PEAK
TEMP.
240°CPEAK
TEMP.
230°C
SOLDERING
TIME
200°C
PREHEATING TIME
150°C, 90 + 30 SEC.
2.5°C ± 0.5°C/SEC.
3°C + 1°C/–0.5°C
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
217 °C
RAMP-DOWN
6 °C/SEC. MAX.
RAMP-UP
3 °C/SEC. MAX.
150 - 200 °C
260 +0/-5 °C
t 25 °C to PEAK
60 to 150 SEC.
20-40 SEC.
TIME WITHIN 5 °C of ACTUAL
PEAK TEMPERA TURE
tp
ts
PREHEAT
60 to 180 SEC.
tL
TL
Tsmax
Tsmin
25
Tp
TIME
TEMPERATURE
NOTES:
THE TIME FROM 25 °C to PEAK
TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 °C, Tsmin = 150 °C
Note: Non-halide flux should be used.
Note: Non-halide flux should be used.
5
Electrical Specifications
Over recommended temperature (T
A = 0°C to 70°C) unless otherwise specified. (See note 6.)
Parameter Symbol Device Min. Typ.* Max. Units Test Conditions Fig. Note
HCPL-
Current CTR M701 400 2000 3500 % IF = 0.5 mA, VO = 0.4 V, 2, 3 1
Transfer VCC = 4.5 V
Ratio 500 1600 2600 IF = 1.6 mA, V = 0.4 V,
VCC = 4.5 V
M700 300 1600 2600 IF = 1.6 mA, VO = 0.4 V,
VCC = 4.5 V
Logic Low VOL M701 0.1 0.4 V IF = 1.6 mA, IO = 8 mA, 1
Output VCC = 4.5 V
Voltage 0.1 0.4 IF = 5 mA, IO = 15 mA,
VCC = 4.5 V
0.2 0.4 IF = 12 mA, IO = 24 mA,
VCC = 4.5 V
M700 0.1 0.4 IF = 1.6 mA, IO = 24 mA,
VCC = 4.5 V
Logic High IOH M701 0.05 100 µAI
F = 0 mA,
Output VO = VCC = 18 V
M700 0.1 250 IF = 0 mA,
VO = VCC = 7 V
Logic Low ICCL 0.4 1.5 mA IF = 1.6 mA, VO = Open,
Supply VCC = 18 V
Current
Logic High ICCH 0.01 10 µAI
F = 0 mA, VO = Open,
Supply VCC = 18 V
Current
Input VF1.4 1.7 V T
A = 25°C4
Forward
Voltage 1.75 IF = 1.6 mA
Input BVR5I
R = 10 µA
Reverse
Breakdown
Voltage
Tempera- ∆VF/∆T
A -1.8 mV/°C I
F = 1.6 mA
ture Co-
efficient of
Forward
Voltage
Input CIN 60 pF f = 1 MHz, VF = 0
Capacitance
Input- VISO 3750 VRMS RH ≤ 50%, t = 1 min, 2, 3
Output T
A = 25°C
Insulation
Resistance RI-O 1012 ΩVI-O = 500 VDC 2
(Input-
Output)
Capacitance CI-O 0.6 pF f = 1 MHz 2
(Input-
Output)
*All typicals at TA = 25°C, VCC = 5 V.
6
Switching Specifications
Over recommended temperature (TA = 0°C to 70°C), VCC = 5 V, unless otherwise specified.
Sym- Device
Parameter bol HCPL- Min. Typ.* Max. Unit Test Conditions Fig. Note
Propagation tPHL M701 25 75 µsT
A = 25°CI
F = 0.5 mA, 5, 6,
100 7
0.5 2 TA = 25°CI
F = 12 mA,
3
M700 5 20 TA = 25°CI
F = 1.6 mA,
25
Propagation tPLH M701 10 60 TA = 25°CI
F = 0.5 mA, 5, 6,
90 7
110 T
A = 25°CI
F = 12 mA,
15
M700 10 35 TA = 25°CI
F = 1.6 mA,
50
Common |CMH| 1,000 10,000 V/µsI
F = 0 mA 8 4, 5
Mode RL = 2.2 kΩ
Transient |VCM| = 10 Vp-p
Immunity at
Logic High
Output
Common |CML| 1,000 10,000 V/µsI
F = 1.6 mA 8 4, 5
Mode RL = 2.2 kΩ
Transient |VCM| = 10 Vp-p
Immunity at
Logic Low
Output
*All typicals at TA = 25°C.
RL = 4.7 kΩ
RL = 270 Ω
RL = 2.2 kΩ
RL = 4.7 kΩ
RL = 270 Ω
RL = 2.2 kΩ
Notes:
1. dc CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input
current, IF, times 100.
2. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
3. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 VRMS for 1 second
(leakage detection current limit, II-O ≤ 5 µA).
4. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the
common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient
immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse
signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V).
5. In applications where dV/dt may exceed 50,000 V/µs (such as static discharge) a series resistor, RCC, should be included to
protect the detector IC from destructively high surge currents. The recommended value is RCC = 220 Ω.
6. Use of a 0.1 µF bypass capacitor connected between pins 4 and 6 is recommended.
Delay Time
to Logic
Low at
Output
Delay Time
to Logic
High at
Output
7
Figure 6. Non-Saturated Rise and
Fall Times vs. Load Resistance.
Figure 1. dc Transfer
Characteristics.
Figure 2. Current Transfer Ratio vs.
Forward Current.
Figure 3. Output Current vs. Input
Diode Forward Current.
Figure 5. Propagation Delay vs.
Temperature.
Figure 4. Input Diode Forward
Current vs. Forward Voltage.
01.0 2.0
V
O
– OUTPUT VOLTAGE – V
I
O
– OUTPUT CURRENT – mA
50
25
0
T
A
= 25°C
V
CC
= 5.0 V
4.0 mA
3.5 mA
3.0 mA
2.5 mA
2.0 mA
1.5 mA
1.0 mA
0.5 mA
4.5 mA
5.0 mA
IF – FORWARD CURRENT – mA
2000
1600
800
400
0.1 1.0
CTR – CURRENT TRANSFER RATIO – %
10
1200
0
VCC = 5.0 V
VO = 0.4 V
0° C
25° C
70° C
I
F
– INPUT DIODE FORWARD CURRENT – mA
100
10
0.1
0.01
0.01 0.1 1 10
I
O
– OUTPUT CURRENT – mA
1.0
T
A
= 70°C
T
A
= 25°C
T
A
= 0°C
VF – FORWARD VOLTAGE – V
100
10
0.1
0.01
1.1 1.2 1.3 1.4
IF – FORWARD CURRENT – mA
1.61.5
1.0
0.001
1000
IF
VF
+TA = 25°C
–
050 100
T
A
– TEMPERATURE – °C
t
p
– PROPAGATION DELAY – µs
24
12
010 20 30 40 60 70 80 90
2
4
6
8
10
14
16
18
20
22
26 R
L
= 2.2 kΩ
I
F
= 1.6 mA
1/f = 50 µs
t
PHL
t
PLH
R
L
– LOAD RESISTANCE – kΩ
100.0
10.0
0.1 1.0
TIME – µs
10
1.0
T
A
= 25°C
(SEE FIGURE 7
FOR TEST CIRCUIT)
I
F
ADJUSTED FOR V
OL
= 2 V
t
f
t
r
Figure 7. Switching Test Circuit.
Figure 8. Test Circuit for Transient Immunity and Typical Waveforms.
V
O
0.1µF
R
L
A
B
PULSE GEN.
V
CM
+
V
FF
+5 V
–
V
O
V
OL
V
O
0 V 10% 90% 90% 10%
SWITCH AT A: I = 0 mA
F
SWITCH AT B: I = 1.6 mA
F
V
CM
t
r
t
f
5 V
10 V
I
F
16
5
4
3
t
r
, t
f
= 16 ns R
CC
(SEE NOTE 5)
220 Ω
V
O
PULSE
GEN.
Z
O
= 50 Ω
t
r
= 5 ns
I
F
MONITOR
I
F
0.1µF
R
L
C
L
= 15 pF*
R
M
0
t
PHL
t
PLH
V
O
I
F
V
OL
1.5 V 1.5 V
+5 V
1
3
6
5
4
5 V
90%
10%
90%
10%
(SATURATED
RESPONSE)
(NON-
SATURATED
RESPONSE)
V
O
5 V
t
f
t
r
* INCLUDES PROBE AND
FIXTURE CAPACITANCE
10% DUTY CYCLE
1/f 100 µs
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes AV01-0548EN
AV02-0238EN May 11, 2007
