REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make correction to figures 2 and 4. Update boilerplate - jak. 00-07-18 Monica L. Poelking B Update the boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 09-03-24 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kelleher STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY Thomas J. Ricciuti APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A Michael A. Frye DRAWING APPROVAL DATE 91-11-01 REVISION LEVEL B MICROCIRCUIT, DIGITAL, ADVANCED CMOS, 8-BIT D FLIP-FLOP, POSITIVE EDGE-TRIGGERED WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-91611 1 OF 14 5962-E200-09 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91611 Federal stock class designator \ RHA designator (see 1.2.1) 01 M K A Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 Circuit function 54ACT825 8-bit D flip-flop, positive edge-triggered with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter K L 3 Descriptive designator GDFP2-F24 or CDFP3-F24 GDIP3-T24 or CDIP4-T24 CQCC1-N28 Terminals 24 24 28 Package style Flat pack Dual-in-line Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) .................................................................................. -0.5 V dc to +7.0 V dc DC input voltage range (VIN) ................................................................................ -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) ........................................................................... -0.5 V dc to VCC + 0.5 V dc Input clamp diode current .................................................................................... 20 mA Output clamp diode current.................................................................................. 20 mA DC output current................................................................................................. 50 mA DC VCC or GND current (per pin) ......................................................................... 50 mA Maximum power dissipation (PD) ......................................................................... 500 mW Storage temperature range (TSTG) ....................................................................... -65C to +150C Lead temperature (soldering, 10 seconds)........................................................... +300C Thermal resistance, junction-to-case (JC) ........................................................... See MIL-STD-1835 Junction temperature (TJ) .................................................................................... +175C 3/ 1.4 Recommended operating conditions. 1/ 2/ 4/ Supply voltage range (VCC) .................................................................................. 4.5 V dc to +5.5 V dc Input voltage range (VIN) ...................................................................................... +0.0 V dc to VCC Output voltage range (VOUT)................................................................................. +0.0 V dc to VCC Case operating temperature range (TC) ............................................................... -55C to +125C Input rise or fall times (VCC = 4.5 V to 5.5 V)........................................................ 0 to 8 ns/V Minimum setup time, data (Dn) to clock (CP) (ts1): TC = +25C, VCC = 4.5 V ............................................................................... 3.5 ns TC = -55C and +125C, VCC = 4.5 V............................................................ 4.0 ns Minimum setup time, enable (EN) to (CP) (ts2): TC = +25C, VCC = 4.5 V ............................................................................... 3.5 ns TC = -55C and +125C, VCC = 4.5 V............................................................ 4.0 ns Minimum hold time, Dn to CP, (th1): TC = +25C, VCC = 4.5 V ............................................................................... 2.5 ns TC = -55C and +125C, VCC = 4.5 V............................................................ 2.5 ns Minimum hold time, EN to CP, (th2): TC = +25C, VCC = 4.5 V ............................................................................... 2.0 ns TC = -55C and +125C, VCC = 4.5 V............................................................ 2.0 ns Minimum pulse width CPn high or low (tW1): TC = +25C, VCC = 4.5 V ............................................................................... 6.0 ns TC = -55C and +125C, VCC = 4.5 V............................................................ 6.0 ns Minimum pulse width clear (CLR) low (tW2): TC = +25C, VCC = 4.5 V ............................................................................... 6.0 ns TC = -55C and +125C, VCC = 4.5 V............................................................ 7.0 ns Minimum recovery time, CLR to CP (trec): TC = +25C, VCC = 4.5 V ............................................................................... 4.0 ns TC = -55C and +125C, VCC = 4.5 V............................................................ 4.5 ns Maximum clock frequency, (fmax): TC = +25C, VCC = 4.5 V ............................................................................... 95 MHz TC = -55C and +125C, VCC = 4.5 V............................................................ 95 MHz 1/ 2/ 3/ 4/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Unless otherwise noted, all voltages are referenced to GND. Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Unless otherwise specified, the values listed above shall apply over the full VCC and TC recommended operating range. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the solicitation or contract. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http://www.jedec.org or from Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 4 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 5 TABLE I. Electrical performance characteristics. Test High level output voltage Symbol VOH Test conditions -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VIN = VIH minimum or VIL maximum IOH = -50 A Device type VCC Group A subgroups All 4.5 V 5.5 V 1, 2, 3 VIN = VIH minimum or VIL maximum IOH = -24 mA All 4.5 V 5.5 V 4.7 VIN = VIH minimum or VIL maximum IOH = -50 mA VIN = VIH minimum or VIL maximum IOL = 50 A All 5.5 V 3.85 All 4.5 V 5.5 V VIN = VIH minimum or VIL maximum IOL = 24 mA All 4.5 V 0.5 5.5 V 0.5 VIN = VIH minimum or VIL maximum IOL = 50 mA All 5.5 V 1.65 4.5 V and 5.5 V 4.5 V and 5.5 V 1, 2, 3 1, 2, 3 0.8 V All 5.5 V 1, 2, 3 -1.0 A Limits Min 4.4 5.4 Unit Max V 1/ Low level output Voltage VOL 3.7 1, 2, 3 0.1 0.1 V 1/ 2.0 V High level input voltage VIH 2/ All Low level input voltage VIL 2/ All Input leakage current IIL VIN = 0.0 V IIH VIN = 5.5 V All 5.5 V For input under test, VIN = VCC - 2.1 V For all other inputs, VIN = VCC or GND All 5.5 V 1, 2, 3 1.6 mA All 5.5 V 1, 2, 3 160 A Quiescent supply current delta, TTL input levels ICC Quiescent supply current ICCH VIN = VCC or GND ICCL IOUT = 0.0 A 3/ ICCZ 1.0 5.5 V 160 5.5 V 160 Off-state output leakage current, high IOZH OEn = VIH minimum or VIL maximum All other inputs = VCC or GND VOUT = 5.5 V All 5.5 V 1, 2, 3 +10.0 A Off-state output leakage current, low IOZL OEn = VIH minimum or VIL maximum All other inputs = VCC or GND VOUT = 0.0 V All 5.5 V 1, 2, 3 -10.0 A Input capacitance CIN See 4.4.1c TC = +25C All GND 4 4.5 pF Output capacitance COUT See 4.4.1c TC = +25C All GND 4 4.5 pF Power dissipation capacitance CPD 4/ See 4.4.1c TC = +25C All 5.0 V 4 4.4 pF See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Functional tests Propagation delay time, CP to On tPHL1 5/ Test conditions -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified Device type VCC See 4.4.1b All CL = 50 pF RL = 500 See figure 4 All 4.5 V and 5.5 V 4.5 V All tPLH1 4.5 V 5/ Propagation delay time, CLR to On tPHL2 5/ Propagation delay enable time, OE1, OE2, and OE3 to On tPZH 5/ CL = 50 pF RL = 500 See figure 4 All CL = 50 pF RL = 500 See figure 4 All All tPZL 4.5 V 4.5 V 4.5 V 5/ Propagation delay disable time, OE1, OE2, and OE3 to On tPHZ 5/ CL = 50 pF RL = 500 See figure 4 tPLZ All All 5/ 4.5 V 4.5 V Group A subgroups Limits Unit Min Max 7, 8 L H 9 1.0 9.5 10, 11 1.0 11.5 9 1.0 9.5 10, 11 1.0 11.5 9 1.0 14.5 10, 11 1.0 18.0 9 1.0 9.5 10, 11 1.0 11.5 9 1.0 10.5 10, 11 1.0 12.5 9 1.0 11.5 10, 11 1.0 13.5 9 1.0 10.5 10, 11 1.0 13.0 ns ns ns ns 1/ VOH and VOL tests will be tested at VCC = 4.5 V. VOH and VOL are guaranteed, if not tested for VCC = 5.5 V. Limits shown apply to operation at VCC = 4.5 V. Transmission driving tests are performed at VCC = 5.5 V with a 2 ms duration maximum. 2/ VIH and VIL tests are not required if applied as a forcing function for the VOH and VOL tests. 3/ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at VIN = VCC - 2.1 V (alternate method). Classes Q and V shall use the preferred method. When the test is performed using the alternate test method, the maximum limit is equal to the number of inputs at a high TTL input level times 1.0 mA or 1.6 mA, as applicable; and the preferred method and limits are guaranteed. 4/ Power dissipation capacitance (CPD) determines the no load power consumption, PD = (CPD + CL) (VCC x VCC) f + (ICC x VCC) + (n x d x ICC x VCC). The dynamic current consumption, IS = (CPD + CL) VCCf + ICC + (n x d x ICC). For both PD and IS: n is the number of device inputs at TTL levels; f is the frequency of the input signal; and d is the duty cycle of the input signal. 5/ AC limits at VCC = 5.5 V are equal to limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. Minimum ac limits are guaranteed for VCC = 5.5 V by guardbanding the VCC = 4.5 V minimum limits to 1.5 ns. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 7 Device type Case outlines Terminal number 01 K and L 3 Terminal symbol OE1 OE2 D0 D1 D2 D3 D4 D5 D6 D7 CLR GND CP EN O7 O6 O5 O4 O3 O2 O1 O0 OE3 VCC --------- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NC OE1 OE2 D0 D1 D2 D3 NC D4 D5 D6 D7 CLR GND NC CP EN O7 O6 O5 O4 NC O3 O2 O1 O0 OE3 VCC Terminal descriptions Terminal symbol Description Dn (n = 0 to 7) Data inputs On (n = 0 to 7) Data outputs CP Clock pulse input OE1, OE2, OE3 Output enable inputs (active low) EN Clock enable input (active low) CLR Clear input (active low) FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 8 Inputs Outputs Dn Internal Qn Output function OEn 1/ CLR EN CP External On Internal External H X L L L Z Load High-Z H X L H H Z Load High-Z H L X X X L Z Clear Clear L L X X X L L Clear Clear H H H X X NC Z Hold Hold L H H X X NC NC Hold Hold H H L L L Z Load Load H H L H H Z Load Load L H L L L L Load Load L H L H H H Load Load H = High voltage level L = Low voltage level X = Immaterial = Low-to-high clock transition Z = High impedance NC = No change 1/ Outputs On are enabled when OE1, OE2, and OE3 = L FIGURE 2. Truth table. FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 9 FIGURE 4. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 10 NOTES: 1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 2. RL = 500 or equivalent. 3. Input signal from pulse generator: VIN = 0.0 V to 3.0 V; PRR 10 MHz; tr =3.0 ns; tf = 3.0 ns; tr and tf shall be measured from 0.3 V to 2.7 V, and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 4. Timing parameters shall be tested at a minimum input frequency of 1 MHz. 5. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 11 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. c. CIN and CPD shall be measured only for initial qualification and after process or design changes which may affect capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. For CIN and CPD, test all applicable pins on five devices with zero failures. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 12 TABLE II. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Subgroups (in accordance with MIL-PRF-38535, table III) Device class M Device class Q Interim electrical parameters (see 4.2) --- --- 1 Final electrical parameters (see 4.2) 1/ 1, 2, 3, 7, 8, 9, 10, 11 1/ 1, 2, 3, 7, 8, 9, 10, 11 2/ 1, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (see 4.4) 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 Group C end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 1, 2, 3, 7,8, 9, 10, 11 Group D end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 1, 2, 3 Group E end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 Device class V 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroups 1 and 7. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 13 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25C 5C, after exposure, to the subgroups specified in table II herein. 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91611 A REVISION LEVEL B SHEET 14 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 09-03-24 Approved sources of supply for SMD 5962-91611 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9161101MKA 0C7V7 54ACT825FMQB 5962-9161101MLA 0C7V7 54ACT825SDMQB 5962-9161101M3A 0C7V7 54ACT825LMQB 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 0C7V7 Vendor name and address QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.