Dual Low Bias Current
Precision Operational Amplifier
OP297
Rev. G
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FEATURES
Low offset voltage: 50 μV maximum
Low offset voltage drift: 0.6 μV/°C maximum
Very low bias current: 100 pA maximum
Very high open-loop gain: 2000 V/mV minimum
Low supply current (per amplifier): 625 μA maximum
Operates from ±2 V to ±20 V supplies
High common-mode rejection: 120 dB minimum
APPLICATIONS
Strain gage and bridge amplifiers
High stability thermocouple amplifiers
Instrumentation amplifiers
Photocurrent monitors
High gain linearity amplifiers
Long-term integrators/filters
Sample-and-hold amplifiers
Peak detectors
Logarithmic amplifiers
Battery-powered systems
GENERAL DESCRIPTION
The OP297 is the first dual op amp to pack precision perform-
ance into the space saving, industry-standard 8-lead SOIC
package. The combination of precision with low power and
extremely low input bias current makes the dual OP297 useful
in a wide variety of applications.
Precision performance of the OP297 includes very low offset
(less than 50 V) and low drift (less than 0.6 V/°C). Open-
loop gain exceeds 2000 V/mV, ensuring high linearity in every
application.
Errors due to common-mode signals are eliminated by the
common-mode rejection of over 120 dB, which minimizes
offset voltage changes experienced in battery-powered systems.
The supply current of the OP297 is under 625 A.
The OP297 uses a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all tempera-
tures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25°C, but double for
every 10°C rise in temperature, to reach the nanoamp range
above 85°C. Input bias current of the OP297 is under 100 pA at
25°C and is under 450 pA over the military temperature range
per amplifier. This part can operate with supply voltages as low
as ±2 V.
PIN CONFIGURATION
8
7
6
5
1
2
3
4
OUTA
–INA
+INA
V+
OUTB
–INB
+INBV–
B
A
00300-001
Figure 1.
TEMPERATURE (°C)
INPUT CURRENT (pA)
60
–60
40
20
0
–20
–40
–75 –50 –25 0 25 50 75 100 125
I
OS
I
B
+
I
B
–
V
S
= ±15V
V
CM
= 0V
00300-002
Figure 2. Low Bias Current over Temperature
INPUT OFFSET VOLTAGE (µV)
NUMBER OF UNITS
400
0
300
200
100
1200 UNITS
–100 –80 –60 –40 –20 0 20 40 60 80 100
TA = 25°C
VS = ±15V
VCM = 0V
00300-003
Figure 3. Very Low Offset
Combining precision, low power, and low bias current, the
OP297 is ideal for a number of applications, including instru-
mentation amplifiers, log amplifiers, photodiode preamplifiers,
and long term integrators. For a single device, see the OP97; for
a quad device, see the OP497.
OP297
Rev. G | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configuration ............................................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Typical Performance Characteristics ............................................. 5
Applications Information ................................................................ 9
AC Performance ............................................................................9
Guarding and Shielding ................................................................9
Open-Loop Gain Linearity ....................................................... 10
Application Circuits ....................................................................... 11
Precision Absolute Value Amplifier ......................................... 11
Precision Current Pump ............................................................ 11
Precision Positive Peak Detector .............................................. 11
Simple Bridge Conditioning Amplifier ................................... 11
Nonlinear Circuits ...................................................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 14
REVISION HISTORY
4/08—Rev. F to Rev. G
Changes to Table 2 Conditions ....................................................... 3
Changes to Table 2 Power Supply Rejection Parameter .............. 3
Changes to Figure 5, Figure 6, Figure 7 ......................................... 5
Changes to Figure 16 ........................................................................ 6
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
2/06—Rev. E to Rev. F
Updated Format .................................................................. Universal
Changes to Features .......................................................................... 1
Deleted OP297 Spice Macro Model Section ................................. 9
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
7/03—Rev. D to Rev. E
Changes to TPCs 13 and 16 ............................................................ 4
Edits to Figures 12 and 14 ............................................................... 8
Changes to Nonlinear Circuits Section ......................................... 8
10/02—Rev. C to Rev. D
Edits to Figure 16 ............................................................................... 6
10/02—Rev. B to Rev. C
Edits to Specifications ....................................................................... 2
Deleted Wafer Test Limits ................................................................ 3
Deleted Dice Characteristics ............................................................ 3
Deleted Absolute Maximum Ratings .............................................. 4
Edits to Ordering Guide ................................................................... 4
Updated Outline Dimensions ....................................................... 12
OP297
Rev. G | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1.
OP297E OP297F OP297G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VOS 25 50 50 100 80 200 µV
Long-Term Input Voltage
Stability
0.1 0.1 0.1 µV/month
Input Offset Current IOS VCM = 0 V 20 100 35 150 50 200 pA
Input Bias Current IB VCM = 0 V +20 ±100 +35 ±150 +50 ±200 pA
Input Noise Voltage en p-p 0.1 Hz to 10 Hz 0.5 0.5 0.5 V p-p
Input Noise Voltage Density en fOUT = 10 Hz 20 20 20 nV/√Hz
f
OUT = 1000 Hz 17 17 17 nV/√Hz
Input Noise Current Density in fOUT = 10 Hz 20 20 20 fA/√Hz
Input Resistance
Differential Mode RIN 30 30 30 MΩ
Common-Mode RINCM 500 500 500 GΩ
Large Signal Voltage Gain AVO V
OUT = ±10 V,
RL = 2 kΩ
2000 4000 1500 3200 1200 3200 V/mV
Input Voltage Range1VCM ±13 ±14 ±13 ±14 ±13 ±14 V
Common-Mode Rejection CMRR VCM = ±13 V 120 140 114 135 114 135 dB
Power Supply Rejection PSRR VS = ±2 V to
±20 V
120 130 114 125 114 125 dB
Output Voltage Swing VOUT R
L = 10 kΩ ±13 ±14 ±13 ±14 ±13 ±14 V
R
L = 2 kΩ ±13 ±13.7 ±13 ±13.7 ±13 ±13.7 V
Supply Current per Amplifier ISY No load 525 625 525 625 525 625 µA
Supply Voltage VS Operating range ±2 ±20 ±2 ±20 ±2 ±20 V
Slew Rate SR 0.05 0.15 0.05 0.15 0.05 0.15 V/µs
Gain Bandwidth Product GBWP AV = +1 500 500 500 kHz
Channel Separation CS VOUT = 20 V p-p,
fOUT = 10 Hz
150 150 150 dB
Input Capacitance CIN 3 3 3 pF
1 Guaranteed by CMR test.
@ VS = ±15 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2.
OP297E OP297F OP297G
Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VOS 35 100 80 300 110 400 V
Average Input Offset Voltage Drift TCVOS 0.2 0.6 0.5 2.0 0.6 2.0 V/°C
Input Offset Current IOS VCM = 0 V 50 450 80 750 80 750 pA
Input Bias Current IB VCM = 0 V +50 ±450 +80 ±750 +80 ±750 pA
Large Signal Voltage Gain AVO VOUT = ±10 V,
RL = 2 kΩ
1200 3200 1000 2500 800 2500 V/mV
Input Voltage Range1VCM ±13 ±13.5 ±13 ±13.5 ±13 ±13.5 V
Common-Mode Rejection CMRR VCM = ±13 114 130 108 130 108 130 dB
Power Supply Rejection PSRR VS = ±2.5 V to
±20 V
114 108 108 dB
Output Voltage Swing VOUT RL = 10 kΩ ±13 ±13.4 ±13 ±13.4 ±13 ±13.4 V
Supply Current per Amplifier ISY No load 550 750 550 750 550 750 A
Supply Voltage VS Operating range ±2.5 ±20 ±2.5 ±20 ±2.5 ±20 V
1 Guaranteed by CMR test.
OP297
Rev. G | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage ±20 V
Input Voltage1 ±20 V
Differential Input Voltage1 40 V
Output Short-Circuit Duration Indefinite
Storage Temperature Range
Z-Suffix −65°C to +175°C
P-Suffix, S-Suffix −65°C to +150°C
Operating Temperature Range
OP297E (Z-Suffix) −40°C to +85°C
OP297F, OP297G (P-Suffix, S-Suffix) −40°C to +85°C
Junction Temperature
Z-Suffix −65°C to +175°C
P-Suffix, S-Suffix −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
1 For supply voltages less than ±20 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for worst-case mounting conditions, that is, θJA
is specified for device in socket for CERDIP and PDIP pack-
ages; θJA is specified for device soldered to printed circuit board
for the SOIC package.
Table 4. Thermal Resistance
Package Type θJA θ
JC Unit
8-Lead CERDIP (Z-Suffix) 134 12 °C/W
8-Lead PDIP (P-Suffix) 96 37 °C/W
8-Lead SOIC (S-Suffix) 150 41 °C/W
ESD CAUTION
00300-004
–
+
1/2
OP297
–
+
1/2
OP297
50kΩ
50Ω
2kΩ
V
1
20V p-p @ 10Hz
V
2
CHANNEL SEPARATION = 20 log V
1
V
2
/10000
Figure 4. Channel Separation Test Circuit
OP297
Rev. G | Page 5 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
NUMBER OF UNITS
400
0
300
200
100
INPUT OFFSET VOLTAGE (µV)
–100 –80 –60 –40 –20 0 20 40 60 80 100
1200 UNITS T
A
= 25°C
V
S
= ±15V
V
CM
= 0V
0
0300-005
Figure 5. Typical Distribution of Input Offset Voltage
1200 UNITS
T
A
= 25°C
V
S
= ±15V
V
CM
= 0V
NUMBER OF UNITS
250
0
200
150
100
INPUT BIAS CURRENT (pA)
–100 –80 –60 –40 –20 0 20 40 60 80 100
50
00300-006
Figure 6. Typical Distribution of Input Bias Current
INPUT OFFSET CURRENT (pA)
–100 –80 –60 –40 –20 0 20 40 60 80 100
00300-007
0
1200 UNITS
NUMBER OF UNITS
400
300
200
100
T
A
= 25°C
V
S
= ±15V
V
CM
= 0V
Figure 7. Typical Distribution of Input Offset Current
TEMPERATURE (°C)
INPUT CURRENT (pA)
60
–60
40
20
0
–20
–40
–75 –50 –25 0 25 50 75 100 125
I
OS
I
B
+
I
B
–
V
S
= ±15V
V
CM
= 0V
00300-008
Figure 8. Input Bias, Offset Current vs. Temperature
COMMON-MODE VOLTAGE (V)
–15 –10 –5 0 5 10 15
INPUT CURRENT (pA)
60
–40
40
20
0
–20
I
OS
I
B
+
I
B
–
V
S
= ±15V
V
CM
= 0V
00300-009
Figure 9. Input Bias, Offset Current vs. Common-Mode Voltage
TIME AFTER POWER APPLIED (Minutes)
DEVIATION FROM FINAL VALUE (µV)
0
±1
±3
±2
01234 5
T
A
= 25°C
V
S
= ±15V
V
CM
= 0V
0
0300-010
Figure 10. Input Offset Voltage Warm-Up Drift
OP297
Rev. G | Page 6 of 16
100
1k
100 1k 10k 100k 1M
10k
10
10 10M
EFFECTIVE OFFSET VOLTAGE (µV)
SOURCE RESISTANCE (Ω)
BALANCED OR UNBALANCED
V
S
= ±15V
V
CM
= 0V
–55°C ≤ T
A
≤ +125°C
T
A
= +25°C
0
0300-011
Figure 11. Effective Offset Voltage vs. Source Resistance
1
10
1k 10k 100k 1M 10M
100
0.1
100 100M
EFFECTIVE OFFSET VOLTAGE DRIFT (µV/°C)
SOURCE RESISTANCE (Ω)
BALANCED OR UNBALANCED
V
S
= ±15V
V
CM
= 0V
0
0300-012
Figure 12. Effective TCVOS vs. Source Resistance
TIME FROM OUTPUT SHORT (Minutes)
SHORT-CIRCUIT CURRENT (mA)
35
–35
20
5
25
30
15
10
0
–30
–25
–20
–15
–10
–5
01234
T
A
= –55°C
T
A
= +25°C
T
A
= +125°C
T
A
= –55°C
T
A
= +25°C
T
A
= +125°C
V
S
= ±15V
OUTPUT SHORTED
TO GROUND
00300-013
Figure 13. Short-Circuit Current vs. Time, Temperature
SUPPLY VOLTAGE (V)
TOTAL SUPPLY CURRENT (µA)
1300
800 0±20
±5 ±10 ±15
1200
1100
1000
900
NO LOAD
T
A
= –55°C
T
A
= +25°C
T
A
= +125°C
00300-014
Figure 14. Total Supply Current vs. Supply Voltage
COMMON-MODE REJECTION (dB)
160
40
140
120
100
80
60
T
A
= 25°C
V
S
= ±15V
1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
00300-015
Figure 15. Common-Mode Rejection vs. Frequency
POWER SUPPLY REJECTION (dB)
160
20
40
140
120
100
80
60
TA = 25°C
VS = ±15V
ΔVS = 10V p-p
1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
0.1
00300-016
Figure 16. Power Supply Rejection vs. Frequency
OP297
Rev. G | Page 7 of 16
FREQUENCY (Hz)
1k
1
11
10 10
1
CURRENT NOISE DENSITY (fA/√Hz)
100 100
1k
10 100 k
00300-017
VOLTAGE NOISE DENSITY (nV/√Hz)
CURRENT
NOISE
VOLTAGE
NOISE
T
A
= 25°C
V
S
= ±2V TO ±15V
Figure 17. Voltage Noise Density and Current Noise Density vs. Frequency
SOURCE RESISTANCE (Ω)
10
0.01
10M
1
TOTAL NOISE DENSITY (nV/√Hz)
1M100k10k1k100
0.1
10Hz
1kHz
T
A
= 25°C
V
S
= ±2V TO ±20V
00300-018
1kHz
10Hz
Figure 18. Total Noise Density vs. Source Resistance
LOAD RESISTANCE (kΩ)
OPEN-LOOP GAIN (V/mV)
10k
100
1
1k
432 51020
VS = ±15V
VOUT = ±10V
TA = –55°C
TA = +25°C
TA = +125°C
87659
0
0300-019
Figure 19. Open-Loop Gain vs. Load Resistance
OUTPUT VOLTAGE (V)
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
0
–15
R
L
= 10kΩ
V
S
= ±15V
V
CM
= 0V
–10 –5 0 5 10 15
00300-020
T
A
= –55°C
T
A
= +25°C
T
A
= +125°C
Figure 20. Differential Input Voltage vs. Output Voltage
LOAD RESISTANCE (Ω)
OUTPUT SWING (V p-p)
0
5
10
15
20
25
30
35
10 100 1k 10k
T
A
= 25°C
V
S
= ±15V
A
VCL
= +1
1% THD
f
OUT
= 1kHz
00300-021
Figure 21. Output Swing vs. Load Resistance
FREQUENCY (Hz)
OUTPUT SWING (V p-p)
0
5
10
15
20
25
30
35
100 1k 10k 100k
TA = 25°C
VS = ±15V
AVCL = +1
1% THD
f
OUT = 1kHz
RL = 10kΩ
00300-022
Figure 22. Maximum Output Swing vs. Frequency
OP297
Rev. G | Page 8 of 16
OPEN-LOOP GAIN (dB)
–40
PHASE SHIFT (Degrees)
–20
0
20
40
270
225
180
135
90
60
100
80
1k 10k 100k 1M 10M100
FREQUENCY (Hz)
GAIN
PHASE
T
A
= –55°C
T
A
= +125°C
V
S
= ±15V
C
L
= 30pF
R
L
= 1MΩ
00300-023
Figure 23. Open-Loop Gain, Phase vs. Frequency
LOAD CAPACITANCE (pF)
OVERSHOOT (%)
010 100
10
20
30
40
50
60
70
1k 10k
T
A
= 25°C
V
S
= ±15V
A
VCL
= +1
V
OUT
= 100mV p-p
–EDGE
+EDGE
0
0300-024
Figure 24. Small Signal Overshoot vs. Load Capacitance
FREQUENCY (Hz)
OUTPUT IMPEDANCE (Ω)
1k
0.001
100
10
0.01
0.1
1
100 1k 10k 100k 1M10
T
A
= 25°C
V
S
= ±15V
00300-025
Figure 25. Open-Loop Output Impedance vs. Frequency
OP297
Rev. G | Page 9 of 16
APPLICATIONS INFORMATION
Extremely low bias current over a wide temperature range
makes the OP297 attractive for use in sample-and-hold
amplifiers, peak detectors, and log amplifiers that must operate
over a wide temperature range. Balancing input resistances is
unnecessary with the OP297. Offset voltage and TCVOS are
degraded only minimally by high source resistance, even
when unbalanced.
The input pins of the OP297 are protected against large differen-
tial voltage by back-to-back diodes and current-limiting resistors.
Common-mode voltages at the inputs are not restricted and can
vary over the full range of the supply voltages used.
The OP297 requires very little operating headroom about the
supply rails and is specified for operation with supplies as low as
2 V. Typically, the common-mode range extends to within 1 V
of either rail. The output typically swings to within 1 V of the
rails when using a 10 k load.
AC PERFORMANCE
The ac characteristics of the OP297 are highly stable over its full
operating temperature range. Unity gain small signal response is
shown in Figure 26. Extremely tolerant of capacitive loading on
the output, the OP297 displays excellent response with 1000 pF
loads (see Figure 27).
10
100
90
0%
10
20mV 5µs
00300-026
Figure 26. Small Signal Transient Response (CL = 100 pF, AVCL = +1)
5µs
20mV
10
0%
100
90
00300-027
Figure 27. Small Signal Transient Response (CL = 1000 pF, AVCL = +1)
5µs
20mV
10
0%
100
90
0
0300-028
Figure 28. Large Signal Transient Response (AVCL = +1)
GUARDING AND SHIELDING
To maintain the extremely high input impedances of the OP297,
care is taken in circuit board layout and manufacturing. Board
surfaces must be kept scrupulously clean and free of moisture.
Conformal coating is recommended to provide a humidity
barrier. Even a clean PCB can have 100 pA of leakage currents
between adjacent traces, therefore guard rings should be used
around the inputs. Guard traces operate at a voltage close to that
on the inputs, as shown in Figure 29, to minimize leakage
currents. In noninverting applications, the guard ring should be
connected to the common-mode voltage at the inverting input.
In inverting applications, both inputs remain at ground, so the
guard trace should be grounded. Guard traces should be placed
on both sides of the circuit board.
UNIT
Y
-GAIN FOLLOWER
–
+
1/2
OP297
INVERTING AMPLIFIER
–
+
1/2
OP297
MINI-DIP
BOTTOM VIEW
8
B
1
A
NONINVERTIN
G
A
MPLIFIER
–
+
1/2
OP297
00300-029
Figure 29. Guard Ring Layout and Considerations
OP297
Rev. G | Page 10 of 16
OPEN-LOOP GAIN LINEARITY
The OP297 has both an extremely high gain of 2000 V/mV
minimum and constant gain linearity. This enhances the
precision of the OP297 and provides for very high accuracy in
high closed-loop gain applications. Figure 30 illustrates the
typical open-loop gain linearity of the OP297 over the military
temperature range.
OUTPUT VOLTAGE (V)
DIFFERENTIAL INPUT VOLTAGE (10µV/DIV)
0
–15
R
L
= 10kΩ
V
S
= ±15V
V
CM
= 0V
–10 –5 0 5 10 15
00300-030
T
A
= –55°C
T
A
= +25°C
T
A
= +125°C
Figure 30. Open-Loop Linearity of the OP297
OP297
Rev. G | Page 11 of 16
APPLICATION CIRCUITS
PRECISION ABSOLUTE VALUE AMPLIFIER
The circuit in Figure 31 is a precision absolute value amplifier
with an input impedance of 30 MΩ. The high gain and low
TCVOS of the OP297 ensure accurate operation with microvolt
input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP297
exceeds 120 dB, yielding an error of less than 2 ppm.
+15V
–15V
5
6
7
1
3
4
–
+
1/2
OP297
–
+
1/2
OP297
28
R1
1kΩ
R3
1kΩ
D1
1N4148
D2
1N4148 R2
2kΩ
0V < V
OUT
< 10V
C1
30pF
C2
0.1µF
C3
0.1µF
V
IN
00300-031
Figure 31. Precision Absolute Value Amplifier
PRECISION CURRENT PUMP
Maximum output current of the precision current pump shown
in Figure 32 is ±10 mA. Voltage compliance is ±10 V with
±15 V supplies. Output impedance of the current transmitter
exceeds 3 M with linearity better than 16 bits. R1 through R4
should be matched resistors.
+15V
5
6
7
1
2
8
3
–15V
–
+
1/2
OP297
–
+
1/2
OP297
R1
10kΩ
R2
10kΩ
V
IN
R3
10kΩ
R4
10kΩ
R5
100kΩI
OUT
10mA MAX
I
OUT
= = = 10mA/V
V
IN
R5
V
IN
100Ω
00300-032
Figure 32. Precision Current Pump
PRECISION POSITIVE PEAK DETECTOR
In Figure 33, the CH must be of polystyrene, Teflon®, or
polyethylene to minimize dielectric absorption and leakage.
The droop rate is determined by the size of CH and the bias
current of the OP297.
2N930
+15V
1N4148
RESET
V
IN
5
6
7
1
3
–15V
–
+
1/2
OP297
–
+
1/2
OP297
2
1kΩ
1kΩ
1kΩ
1kΩ
C
H
0.1µF
0.1µF
V
OUT
00300-033
Figure 33. Precision Positive Peak Detector
SIMPLE BRIDGE CONDITIONING AMPLIFIER
Figure 34 shows a simple bridge conditioning amplifier using
the OP297. The transfer function is
R
R
RR
R
VV F
REF
OUT ⎟
⎠
⎞
⎜
⎝
⎛
Δ+
Δ
=
The REF43 provides an accurate and stable reference voltage for
the bridge. To maintain the highest circuit accuracy, RF should
be 0.1% or better with a low temperature coefficient.
15
V
3
2
1
5
6
7
4
8
REF43
4
–
+
1/2
OP297
–
+
1/2
OP297
V
REF
R
F
R + ΔRV
OUT
V
OUT
= V
REF
ΔR
R + ΔR
R
F
R
00300-034
Figure 34. Simple Bridge Condition Amplifier Using the OP297
OP297
Rev. G | Page 12 of 16
NONLINEAR CIRCUITS
Due to its low input bias currents, the OP297 is an ideal log
amplifier in nonlinear circuits such as the square and square
root circuits shown in Figure 35 and Figure 36. Using the
squaring circuit of Figure 35 as an example, the analysis begins
by writing a voltage loop equation across Transistor Q1,
Transistor Q2, Transistor Q3, and Transistor Q4.
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
=
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
S4
REF
T4
S3
OUT
T3
S
IN
T2
S1
IN
T1 I
I
V
I
I
V
I
I
V
I
I
Vlnlnlnln
2
All the transistors of the MAT04 are precisely matched and at
the same temperature, so the IS and VT terms cancel, where
2lnIIN = lnIOUT + lnIREF = ln(IOUT × IREF)
Exponentiating both sides of the equation leads to
()
REF
IN
OUT I
I
I
2
=
Op Amp A2 forms a current-to-voltage converter, which gives
VOUT = R2 × IOUT. Substituting (VIN/R1) for IIN and the previous
equation for IOUT yields
2
⎟
⎠
⎞
⎜
⎝
⎛
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
=R1
V
I
R2
VIN
REF
OUT
A similar analysis made for the square root circuit of Figure 36
leads to its transfer function
()( )
R1
IV
R2V REFIN
OUT =
7
6
5
–15V
1
2
3
V+
V–
Q3
Q1
Q2
Q4 13
14
12
8
9
10
4
8
6
5
7
2
3
1
MAT04E
–
+
1/2
OP297
–
+
1/2
OP297
VIN
R1
33kΩ
C1
100pF
R3
50kΩ
R4
50kΩ
IREF
C2
100pF
R2
33kΩ
VOUT
IOUT
00300-035
Figure 35. Squaring Amplifier
7
6
5
I
OUT
–15V
1
2
3
V+
V–
Q1
79
10
4
8
3
1MAT04E
8
Q3
5
6
Q4
13
12
14
Q2
R2
33kΩ
C2
100pF
C1
100pF
R1
33kΩR3
50kΩ
R4
50kΩ
V
OUT
I
REF
–
+
1/2
OP297
–
+
1/2
OP297
V
IN
00300-036
Figure 36. Square Root Amplifier
In these circuits, IREF is a function of the negative power supply.
To maintain accuracy, the negative supply should be well regu-
lated. For applications where very high accuracy is required, a
voltage reference can be used to set IREF.
An important consideration for the squaring circuit is that a
sufficiently large input voltage can force the output beyond the
operating range of the output op amp. Resistor R4 can be
changed to scale IREF or R1; R2 can be varied to keep the output
voltage within the usable range.
Unadjusted accuracy of the square root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
OP297
Rev. G | Page 13 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
070606-A
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210 (5.33)
MAX
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
8
14
5
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
Figure 37. 8-Lead Plastic Dual In-Line Package [PDIP]
P-Suffix (N-8)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.310 (7.87)
0.220 (5.59)
0.005 (0.13)
MIN 0.055 (1.40)
MAX
0.100 (2.54) BSC
15°
0°
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.200 (5.08)
MAX
0.405 (10.29) MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36) 0.070 (1.78)
0.030 (0.76)
0.060 (1.52)
0.015 (0.38)
14
58
Figure 38. 8-Lead Ceramic Dual In-Line Package [CERDIP]
Z-Suffix (Q-8)
Dimensions shown in inches and (millimeters)
OP297
Rev. G | Page 14 of 16
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 39. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
S-Suffix (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model Temperature Range Package Description Package Options
OP297EZ −40°C to +85°C 8-Lead CERDIP Q-8 (Z-Suffix)
OP297FP −40°C to +85°C 8-Lead PDIP N-8 (P-Suffix)
OP297FPZ1
−40°C to +85°C 8-Lead PDIP N-8 (P-Suffix)
OP297FS −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297FS-REEL −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297FS-REEL7 −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297FSZ1
−40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297FSZ-REEL1
−40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297FSZ-REEL71
−40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297GP −40°C to +85°C 8-Lead PDIP N-8 (P-Suffix)
OP297GPZ1
−40°C to +85°C 8-Lead PDIP N-8 (P-Suffix)
OP297GS −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297GS-REEL −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297GS-REEL7 −40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297GSZ1
−40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297GSZ-REEL1
−40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
OP297GSZ-REEL71
−40°C to +85°C 8-Lead SOIC_N R-8 (S-Suffix)
1 Z = RoHS Compliant Part.
OP297
Rev. G | Page 15 of 16
NOTES
OP297
Rev. G | Page 16 of 16
NOTES
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00300-0-4/08(G)
