A1171EEWLT-P - Allegro Microsystems

Description

The A1171 integrated circuit is an ultrasensitive, Hall effect

switch with latched digital outputs and either unipolar or

omnipolar magnetic actuation. It features operation at low

supply currents and voltages, making it ideal for battery-

operated electronics. The low operating supply voltage,

1.65 to 3.5 V, and unique clocking algorithm assist in reducing

the average operating power consumption. For example, the

power requirement is less than 15 μW with a 2.75 V supply.

Unlike more traditional Hall effect switches, the A1171 allows

the user to configure how the device is magnetically actuated.

Under default conditions the device activates output switching

with either a north or south polarity magnetic field of sufficient

strength. The magnetic actuation can be set via an external

selection pin to operate in a unipolar mode, switching only on

a north or south polarity but not both. Furthermore, the output

of the A1171 can be configured to switch either off or on in the

absence of any significant magnetic field. Lastly, the A1171

has two push-pull output structures.

This polarity-independence, as well as the minimal power

requirements, allows the A1171 to easily replace reed switches,

1171-DS, Rev. 5

Features and Benefits

▪ 1.65 to 3.5 V battery operation

▪ Low supply current

▪ High sensitivity, BOP typically 30 G (3.0 mT)

▪ Operation with either north or south pole

▪ Configurable unipolar or omnipolar magnetic sensing

▪ Complementary, push-pull outputs

▪ Chopper stabilized

▫ Superior temperature stability

▫ Extremely low switchpoint drift

▫ Insensitive to physical stress

▪ Solid state reliability

▪ Small size

Micropower Ultrasensitive Hall Ef fect Switch

Continued on the next page…

Package: 6 pin DFN/MLP (suffix EW)

Functional Block Diagram

Not to scale

A1171

Dynamic Offset

Cancellation

VOUTPN

VOUTPS

VDD

Low-Pass

Filter

Clock

Logic

Latch

Logic

Amp

GND SELECT

Sample and Hold

and Averaging

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

providing superior reliability and ease of manufacturing while

eliminating the requirement for signal conditioning.

Improved stability is made possible through dynamic offset

cancellation using chopper stabilization, which reduces the residual

offset voltage normally caused by device overmolding, temperature

dependencies, and thermal stress. This device includes, on a single

silicon chip, a Hall-voltage generator, a small-signal amplifier,

chopper stabilization, a latch, and a MOSFET output.

The A1171 device offers a magnetically optimized solution, suitable

for most applications. Package type EW (0.40 mm maximum height)

offers a leadless surface mount solution. It is lead (Pb) free, with

NiPdAu leadframe plating.

Description (continued)

Pin-out Diagram

Absolute Maximum Ratings

Characteristic Symbol Notes Rating Units

Supply Voltage VDD 5V

Reverse Supply Voltage VRDD –0.3 V

Magnetic Flux Density B Unlimited G

Output Off Voltage VOUTPx 5V

Reverse Output Voltage VROUTPx –0.3 V

Output Current IOUTPx(Source) 1mA

IOUTPx(Sink) –1 mA

Operating Ambient Temperature TARange E –40 to 85 ºC

Maximum Junction Temperature TJ(max) 165 ºC

Storage Temperature Tstg –65 to 170 ºC

Terminal List Table

Name Number Function

VOUTPS 1 Push-pull output (selectable omnipolar activation or unipolar

south pole activation)

VOUTPN 2 Push-pull output (selectable inverted omnipolar activation or

unipolar north pole activation)

SELECT 3 Sets activation mode for VOUTPx outputs; omnipolar output

when tied to VDD or floating, unipolar output when grounded

GND 4 Ground

NC 5 No connection

VDD 6 Connects power supply to chip

PAD – Exposed pad for enhanced thermal dissipation

VOUTPS

VOUTPN

SELECT

VDD

GND

PAD

Selection Guide

Part Number Package Packing1

A1171EEWLT-P2DFN/MLP 1.5×2 mm; 0.40 mm maximum height 3000 pieces per 7 inch reel

1Contact Allegro® for additional packing options.

2Allegro products sold in DFN package types are not intended for automotive applications.

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

ELECTRICAL CHARACTERISTICS valid over operating voltage and temperature range (unless otherwise specified)

Characteristic Symbol Test Conditions Min. Typ.1Max. Units

Supply Voltage Range2VDD

Operating, TA= 25°C 1.65 – 3.5 V

Operating, over full ambient temperature range 1.8

Output Voltage VOUT(SAT) NMOS on, ISINK = 1 mA, VDD = 2.75 V – 100 300 mV

VOUT(HIGH) PMOS on, ISOURCE = –1 mA, VDD = 2.75 V VDD–300 VDD–100 – mV

Period tPERIOD – 50 100 ms

Chopping Frequency fC– 200 – kHz

Supply Slew Rate3SR 20 – – V/ms

Supply Current

IDD(EN) Device in awake mode (enabled) – – 2.0 mA

IDD(DIS) Device in sleep mode (disabled) – – 8.0 μA

IDD(AV)

VDD = 1.8 V, TA = 25°C – 3.5 8 μA

VDD = 3.5 V, TA = 25°C – 7.1 12 μA

SELECT Current4ISELECT 012μA

SELECT Voltage4VSELECT(LOW) 0–

1/3VDD V

VSELECT(HIGH) 2/3VDD –V

DD V

1Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance

may vary for individual units, within the specified maximum and minimum limits.

2Operate points, BOPX, and release points, BRPX, vary with supply voltage.

3If SR < SR(min), then valid device output might be delayed for one Period, tPERIOD , of device.

4Maximum VDD, minimum 0 V.

MAGNETIC CHARACTERISTICS valid at 1.8 V ≤ VDD ≤ 3.5 V and TA = 25°C

Characteristic Symbol Test Conditions Min. Typ.1Max. Units2

Operate Point3BOPS –3255G

BOPN –55 –32 – G

Release Point3BRPS 626– G

BRPN – –26 –6 G

Hysteresis BHYS |BOPX - BRPX| –6–G

1Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions, such as TA = 25°C. Performance

may vary for individual units, within the specified maximum and minimum limits.

21 gauss (G) is exactly equal to 0.1 millitesla (mT).

3Operate points, BOPX, and release points, BRPX, vary with supply voltage.

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information

Characteristic Symbol Test Conditions* Value Units

Package Thermal Resistance RθJA

2-layer PCB, with 0.23 in.2 copper area each side 125 ºC/W

4-layer PCB, based on JEDEC standard 64 ºC/W

*Additional thermal information available on Allegro Web site.

250

500

750

1000

1250

1500

1750

2000

2250

2500

2750

3000

20 40 60 80 100 120 140 160 180

Temperature (°C)

Power Dissipation, P

(mW)

EW package

4-layer PCB

(RθJA = 64 ºC/W)

EW package

2-layer PCB

(RθJA = 125 ºC/W)

Power Dissipation versus Ambient Temperature

+B (South)

–B (North)

(Omnipolar

configuration)

(Unipolar

configuration)

Magnetic Field

Output Pin

(Activation Polarity)

VOUTPS

(South)

VOUTPS

VOUTPN

(North)

VOUTPN

Output Polarity Diagram

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Low A verage Power

Internal timing circuitry activates the IC for a short period of

time, tAwake, and deactivates it for the remainder of the period

(tPeriod). A short awake state duration allows stabilization prior

to the sampling and data-latching on the falling edge of the tim-

ing pulse. The output during the sleep state is latched in the last

sampled state. The supply current is not affected by the output

state.

Operation

The VOUTPS output switches low (turns on) when the magnetic

field received at the Hall element in the A1171 exceeds the oper-

ate point, BOPS (or is less than BOPN). After turn-on, the output

voltage is VOUT(SAT). The output transistor is capable of sinking

current up to the short circuit current limit, IOM. When the mag-

netic field is reduced below the release point, BRPS (or increased

above BRPN), the device output switches high (turns off). The

pull-up transistor brings the output voltage to VOUT(HIGH).

VOUTPN operates with the opposite output polarity. That is, the

output is low (on) in the absence of a magnetic field. The output

goes high (turns off) when sufficient field, or either north or

south polarity, is presented to the device.

The difference between the magnetic operate and release points

is the hysteresis, BHYS , of the device. This built-in hysteresis

allows clean switching of the output even in the presence of

external mechanical vibration and electrical noise.

Powering-on the device in a hysteresis region, between BOPX

and BRPX, allows an indeterminate output state. The correct state

is attained after the first excursion beyond BOPX or BRPX.

BOPS

BOPN

BRPN

BRPS

BHYS

VOUT(HIGH)

VOUT

VOUT(SAT)

Switch to Low

Switch to High

B+

B–

V+

Figure 1. Switching Behavior of Omnipolar Switches. On the horizontal axis, the B+ direction indicates increasing south polarity magnet-

ic field strength, and the B– direction indicates decreasing south polarity field strength (including the case of increasing north polarity).

This output switching profile applies when the SELECT line is allowed to float, selecting omnipolar operation.

(A) VOUTPS (B) VOUTPN

BOPS

BOPN

BRPN

BRPS

BHYS

VOUT(HIGH)

VOUT

VOUT(SAT)

Switch to Low

Switch to High

B+

B–

V+

Functional Description

IDD(EN)

IDD(DIS)

tPeriod

Sleep

Awake

Sample and Output Latched

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Figure 2. Operation with Unipolar Mode Selected (SELECT Pin Grounded)

BOPN

BRPN

BHYS

VOUT(HIGH)

VOUT

VOUT(SAT)

Switch to Low

Switch to High

B+

B–

V+

BOPS

BRPS

BHYS

VOUT(HIGH)

VOUT

VOUT(SAT)

Switch to Low

Switch to High

B+

B–

V+

(A) VOUTPN (B) VOUTPS

SELECT Pin Settings Effect on Output

Output Pin SELECT Pin

Configuration Output Description

Number Name

1 VOUTPS

Tied to VDD or floating

Omnipolar output; ON with magnetic field of sufficient

strength (B < BOPN or B > BOPS); OFF with low-strength

or no magnetic field (BRPN < B < BRPS)

Tied to ground Unipolar output; ON with south polarity magnetic field of

sufficient strength (B > BOPS)

2 VOUTPN

Tied to VDD or floating

Omnipolar output; OFF with magnetic field of sufficient

strength (B < BOPN or B > BOPS); ON with low-strength or

no magnetic field (BRPN < B < BRPS)

Tied to ground Unipolar output; ON with north polarity magnetic field of

sufficient strength (B < BOPN)

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

VDD

GND

SELECT

VOUTPN

A1171

VOUTPS

Outputs

0.1 µF

CBYP

VDD

GND

SELECT

VOUTPN

A1171

VOUTPS

Outputs

0.1 µF

CBYP

It is strongly recommended that an external bypass capacitor be

connected (in close proximity to the Hall element) between the

supply and ground of the device to reduce both external noise

and noise generated by the chopper stabilization technique. As is

shown in figure 3, a 0.1μF capacitor is typical.

Extensive applications information on magnets and Hall-effect

devices is available in the following notes:

• Hall-Effect IC Applications Guide, AN27701

• Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead

Welding and Lead Forming AN27703.1

• Soldering Methods for Allegro Products (SMD and Through-

Hole), AN26009

All are provided in Allegro Electronic Data Book, AMS-702,

and on the Allegro Web site, www.allegromicro.com.

Figure 3. Typical Application Circuits: (a) Omnipolar operation, and (b) Unipolar Operation

(a) (b)

Applications

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Chopper Stabilization Technique

When using Hall-effect technology, a limiting factor for

switchpoint accuracy is the small signal voltage developed

across the Hall element. This voltage is disproportionally small

relative to the offset that can be produced at the output of the

Hall element. This makes it difficult to process the signal while

maintaining an accurate, reliable output over the specified oper-

ating temperature and voltage ranges.

Chopper stabilization is a unique approach used to minimize

Hall offset on the chip. The patented Allegro technique, namely

Dynamic Quadrature Offset Cancellation, removes key sources

of the output drift induced by thermal and mechanical stresses.

This offset reduction technique is based on a signal modulation-

demodulation process. The undesired offset signal is separated

from the magnetic field-induced signal in the frequency domain,

through modulation. The subsequent demodulation acts as a

modulation process for the offset, causing the magnetic field

induced signal to recover its original spectrum at baseband,

while the dc offset becomes a high-frequency signal. The mag-

netic sourced signal then can pass through a low-pass filter,

while the modulated dc offset is suppressed. This configuration

is illustrated in figure 4.

The chopper stabilization technique uses a high frequency clock.

For demodulation process, a sample and hold technique is used,

where the sampling is performed at twice the chopper frequency.

This high-frequency operation allows a greater sampling rate,

which results in higher accuracy and faster signal-processing

capability. This approach desensitizes the chip to the effects

of thermal and mechanical stresses, and produces devices that

have extremely stable quiescent Hall output voltages and precise

recoverability after temperature cycling.

The repeatability of magnetic field-induced switching is affected

slightly by a chopper technique. However, the Allegro high

frequency chopping approach minimizes the affect of jitter and

makes it imperceptible in most applications. Applications that

are more likely to be sensitive to such degradation are those

requiring precise sensing of alternating magnetic fields; for

example, speed sensing of ring-magnet targets. For such applica-

tions, Allegro recommends its digital device families with lower

sensitivity to jitter. For more information on those devices,

contact your Allegro sales representative.

Amp

Regulator

Clock/Logic

Hall Element

Sample and

Hold

Low-Pass

Filter

Figure 4. Chopper Stabilization Circuit (Dynamic Quadrature Offset Cancellation)

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Package EW, 6-pin DFN/MLP

SEATING

PLANE

0.38 ±0.02

0.70 ±0.10 1.25 ±0.05

0.25 ±0.05

1.10 ±0.10

1.10

0.30

0.70 1.575

0.50

0.325

2.00 ±0.15

1.50 ±0.15

C0.08

0.325 +0.055

–0.045

0.50 BSC

ATerminal #1 mark area

BExposed thermal pad (reference only, terminal #1

identifier appearance at supplier discretion)

For Reference Only, not for tooling use (refernce DWG-2856; similar to

JEDEC Type 1, MO-229X2BCD)

Dimensions in millimeters

Exact case and lead configuration at supplier discretion within limits shown

CReference land pattern layout (reference IPC7351

SON50P200X200X100-9M);

All pads a minimum of 0.20 mm from all adjacent pads; adjust as

necessary to meet application process requirements and PCB layout

tolerances; when mounting on a multilayer PCB, thermal vias at the

exposed thermal pad land can improve thermal dissipation (reference

EIA/JEDEC Standard JESD51-5)

Active Area Depth 0.15 mm REF

Hall Element (not to scale)

0.75

1.00

PCB Layout Reference View

Branding scale and appearance at supplier discretion

DCoplanarity includes exposed thermal pad and terminals

Standard Branding Reference View

N = Last two digits of device part number

Y = Last digit of year of manufacture

W = Week of manufacture

YWW

Micropower Ultrasensitive Hall Ef fect Switch

A1171

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-

mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the

information being relied upon is current.

Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the

failure of that life support device or system, or to affect the safety or effectiveness of that device or system.

The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;

nor for any in fringe ment of patents or other rights of third parties which may result from its use.

For the latest version of this document, visit our website:

www.allegromicro.com

Revision History

Revision Revision Date Description of Revision

Rev. 5 October 26, 2011 Update Selection Guide