MCP14A1201/2 12.0A MOSFET Driver with Low Threshold Input and Enable Features General Description * High Peak Output Current: 12.0A (typical) * Wide Input Supply Voltage Operating Range: - 4.5V to 18V * Low Shoot-Through/Cross-Conduction Current in Output Stage * High Capacitive Load Drive Capability: - 15,000 pF in 25 ns (typical) * Short Delay Times: 28 ns (tD1), 28 ns (tD2) (typical) * Low Supply Current: 360 A (typical) * Low-Voltage Threshold Input and Enable with Hysteresis * Latch-Up Protected: Withstands 500 mA Reverse Current * Space-Saving Packages: - 8-Lead MSOP - 8-Lead SOIC - 8-Lead 2 x 3 TDFN The MCP14A1201/2 devices are high-speed MOSFET drivers that are capable of providing up to 12.0A of peak current while operating from a single 4.5V to 18V supply. There are two output configurations available; inverting (MCP14A1201) and noninverting (MCP14A1202). These devices feature low shootthrough current, fast rise and fall times, and matched propagation delays which make them ideal for high switching frequency applications. Applications * * * * * Switch Mode Power Supplies Pulse Transformer Drive Line Drivers Level Translator Motor and Solenoid Drive The MCP14A1201/2 family of devices offers enhanced control with Enable functionality. The active-high Enable pin can be driven low to drive the output of the MCP14A1201/2 low, regardless of the status of the Input pin. An integrated pull-up resistor allows the user to leave the Enable pin floating for standard operation. These devices are highly latch-up resistant under any condition within their power and voltage ratings. They can accept up to 500 mA of reverse current being forced back into their outputs without damage or logic upset. All terminals are fully protected against electrostatic discharge (ESD) up to 2 kV (HBM) and 200V (MM). Package Types MCP14A1201/MCP14A1202 MSOP/SOIC 8 VDD VDD 1 IN 2 7 OUT/OUT EN 3 GND 4 6 OUT/OUT 5 GND MCP14A1201/MCP14A1202 2 x 3 TDFN* VDD 1 IN 2 EN 3 GND 4 8 VDD EP 9 7 OUT/OUT 6 OUT/OUT 5 GND * Includes Exposed Thermal Pad (EP); see Table 3-1. 2019 Microchip Technology Inc. DS20006228A-page 1 MCP14A1201/2 Functional Block Diagram VDD Internal Pull-Up Enable VREF GND Inverting Output-Pin 7 Output - Pin 6 VDD Input VREF GND DS20006228A-page 2 Non-Inverting MCP14A1201 Inverting MCP14A1202 NonLnverting 2019 Microchip Technology Inc. MCP14A1201/2 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings VDD, Supply Voltage............................................. +20V VIN, Input Voltage........... (VDD + 0.3V) to (GND - 0.3V) VEN, Enable Voltage....... (VDD + 0.3V) to (GND - 0.3V) Package Power Dissipation (TA = +50C) 8L MSOP ..................................................... 0.63 W 8L SOIC ....................................................... 1.00 W 8L 2 x 3 TDFN.............................................. 1.86 W ESD Protection on all pins .........................2 kV (HBM) ....................................................................200V (MM) DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, TA = +25C, with 4.5V VDD 18V. Parameters Sym. Min. Typ. Max. Units Conditions Input Voltage Range VIN GND - 0.3V -- VDD + 0.3 V Logic `1' High Input Voltage VIH 2.0 1.6 -- V Logic `0' Low Input Voltage VIL -- 1.3 0.8 V VHYST(IN) -- 0.3 -- V IIN -1 -- +1 A Enable Voltage Range VEN GND - 0.3V -- VDD + 0.3 V Logic `1' High Enable Voltage VEH 2.0 1.6 -- V Logic `0' Low Enable Voltage VEL -- 1.3 0.8 V VHYST(EN) -- 0.3 -- V RENBL -- 1.8 -- M VDD = 18V, ENB = GND Enable Input Current IEN -- 10 -- A VDD = 18V, ENB = GND Propagation Delay tD3 -- 28 33 ns VDD = 18V, VEN = 5V, see Figure 4-3, (Note 1) Propagation Delay tD4 -- 28 33 ns VDD = 18V, VEN = 5V, see Figure 4-3, (Note 1) VOH VDD - 0.025 -- -- V IOUT = 0A Low Output Voltage VOL -- -- 0.025 V IOUT = 0A Output Resistance, High ROH -- 0.9 1.5 IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL -- 0.6 1.2 IOUT = 10 mA, VDD = 18V Peak Output Current IPK -- 12.0 -- A VDD = 18V (Note 1) Latch-Up Protection Withstand Reverse Current IREV 0.5 -- -- A Duty cycle 2%, t 300 s (Note 1) Rise Time tR -- 25 30 ns VDD = 18V, CL = 15,000 pF, see Figure 4-1, Figure 4-2 Fall Time tF -- 25 30 ns VDD = 18V, CL = 15,000 pF, see Figure 4-1, Figure 4-2 Note 1: Tested during characterization, not production tested. Input Input Voltage Hysteresis Input Current 0V VIN VDD Enable Enable Voltage Hysteresis Enable Pin Pull-Up Resistance Output High Output Voltage Switching Time (Note 1) 2019 Microchip Technology Inc. DS20006228A-page 3 MCP14A1201/2 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise noted, TA = +25C, with 4.5V VDD 18V. Parameters Delay Time Sym. Min. Typ. Max. Units Conditions tD1 -- 28 33 ns VDD = 18V, VIN = 5V, see Figure 4-1 and Figure 4-2 tD2 -- 28 33 ns VDD = 18V, VIN = 5V, see Figure 4-1 and Figure 4-2 VDD 4.5 -- 18 V IDD -- 360 600 A VIN = 3V, VEN = 3V IDD -- 360 600 A VIN = 0V, VEN = 3V IDD -- 360 600 A VIN = 3V, VEN = 0V IDD -- 360 600 A VIN = 0V, VEN = 0V Power Supply Supply Voltage Power Supply Current Note 1: Tested during characterization, not production tested. DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V. Parameters Sym. Min. Typ. Max. VIN Logic `1' High Input Voltage Logic `0' Low Input Voltage Units GND - 0.3V -- VDD + 0.3 V VIH 2.0 1.6 -- V VIL -- 1.3 0.8 V VHYST(IN) -- 0.3 -- V IIN -10 -- +10 A VEN GND - 0.3V -- VDD + 0.3 V Logic `1' High Enable Voltage VEH 2.0 1.6 -- V Logic `0' Low Enable Voltage VEL -- 1.3 0.8 V Conditions Input Input Voltage Range Input Voltage Hysteresis Input Current 0V VIN VDD Enable Enable Voltage Range Enable Voltage Hysteresis VHYST(EN) -- 0.3 -- V Enable Input Current IEN -- 12 -- A VDD = 18V, ENB = GND Propagation Delay tD3 -- 32 37 ns VDD = 18V, VEN = 5V, TA = +125C, see Figure 4-3, (Note 1) Propagation Delay tD4 -- 32 37 ns VDD = 18V, VEN = 5V, TA = +125C, see Figure 4-3, (Note 1) High Output Voltage VOH VDD - 0.025 -- -- V DC Test Low Output Voltage VOL -- -- 0.025 V DC Test Output Resistance, High ROH -- -- 2 IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL -- -- 1.7 IOUT = 10 mA, VDD = 18V Output Note 1: Tested during characterization, not production tested. DS20006228A-page 4 2019 Microchip Technology Inc. MCP14A1201/2 DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) (CONTINUED) Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V. Parameters Sym. Min. Typ. Max. Units Conditions Rise Time tR -- 30 35 ns VDD = 18V, CL = 15,000 pF, TA = +125C, see Figure 4-1, Figure 4-2 Fall Time tF -- 30 35 ns VDD = 18V, CL = 15,000 pF, TA = +125C, see Figure 4-1, Figure 4-2 Delay Time tD1 -- 32 37 ns VDD = 18V, VIN = 5V, TA = +125C, see Figure 4-1, Figure 4-2 tD2 -- 32 37 ns VDD = 18V, VIN = 5V, TA = +125C, see Figure 4-1, Figure 4-2 VDD 4.5 -- 18 V Switching Time (Note 1) Power Supply Supply Voltage Power Supply Current Note 1: IDD -- -- 750 uA VIN = 3V, VEN = 3V IDD -- -- 750 uA VIN = 0V, VEN = 3V IDD -- -- 750 uA VIN = 3V, VEN = 0V IDD -- -- 750 uA VIN = 0V, VEN = 0V Tested during characterization, not production tested. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V Parameter Sym. Min. Typ. Max. Units TA -40 -- +125 C Comments Temperature Ranges Specified Temperature Range Maximum Junction Temperature TJ -- -- +150 C Storage Temperature Range TA -65 -- +150 C Junction-to-Ambient Thermal Resistance, 8LD MSOP JA -- 158 -- C/W Note 1 Junction-to-Ambient Thermal Resistance, 8LD SOIC JA -- 99.8 -- C/W Note 1 Junction-to-Ambient Thermal Resistance, 8LD TDFN JA -- 53.7 -- C/W Note 1 Junction-to-Top Characterization Parameter, 8LD MSOP JT -- 2.4 -- C/W Note 1 Junction-to-Top Characterization Parameter, 8LD SOIC JT -- 5.9 -- C/W Note 1 Junction-to-Top Characterization Parameter, 8LD TDFN JT -- 0.5 -- C/W Note 1 Junction-to-Board Characterization Parameter, 8LD MSOP JB -- 115.2 -- C/W Note 1 Junction-to-Board Characterization Parameter, 8LD SOIC JB -- 64.8 -- C/W Note 1 Junction-to-Board Characterization Parameter, 8LD TDFN JB -- 24.4 -- C/W Note 1 Package Thermal Resistances Note 1: Parameter is determined using High K 2S2P 4-Layer board as described in JESD 51-7, as well as JESD 51-5 for packages with exposed pads. 2019 Microchip Technology Inc. DS20006228A-page 5 MCP14A1201/2 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C with 4.5V VDD 18V. )DOO7LPHQV 5LVH7LPHQV S) S) S) S) S) S) 9 9 9 6XSSO\9ROWDJH9 FIGURE 2-1: Voltage. &DSDFLWLYH/RDGS) Rise Time vs. Supply FIGURE 2-4: Load. 5LVHDQG)DOO7LPHQV 5LVH7LPHQV 9 9 9 Fall Time vs. Capacitive 9'' 9 W5S) W)S) W5S) W)S) &DSDFLWLYH/RDGS) FIGURE 2-2: Load. 7HPSHUDWXUH& Rise Time vs. Capacitive &URVVRYHU&XUUHQW$ FIGURE 2-5: Temperature. Rise and Fall Time vs. S) S) S) S) S) S) )DOO7LPHQV 0+] N+] N+] N+] N+] FIGURE 2-3: Voltage. DS20006228A-page 6 Fall Time vs. Supply 6XSSO\9ROWDJH9 6XSSO\9ROWDJH9 FIGURE 2-6: Supply Voltage. Crossover Current vs. 2019 Microchip Technology Inc. MCP14A1201/2 Note: Unless otherwise indicated, TA = +25C with 4.5V VDD 18V. (QDEOH3URSDJDWLRQ'HOD\QV ,QSXW3URSDJDWLRQ'HOD\QV 9,1 9 W' W' 9(1 9 W' W' 6XSSO\9ROWDJH9 Input Propagation Delay vs. 9'' 9 W' W' 9'' 9 9,1 9 W' W' W' Input Propagation Delay vs. 2019 Microchip Technology Inc. (QDEOH9ROWDJH$PSOLWXGH9 FIGURE 2-11: Enable Propagation Delay Time vs. Enable Voltage Amplitude. 9'' 9 9(1 9 W' W' 7HPSHUDWXUH& FIGURE 2-9: Temperature. W' (QDEOH3URSDJDWLRQ'HOD\QV ,QSXW3URSDJDWLRQ'HOD\QV 9'' 9 FIGURE 2-8: Input Propagation Delay Time vs. Input Amplitude. ,QSXW9ROWDJH$PSOLWXGH9 FIGURE 2-10: Enable Propagation Delay vs. Supply Voltage. (QDEOH3URSDJDWLRQ'HOD\QV ,QSXW3URSDJDWLRQ'HOD\QV FIGURE 2-7: Supply Voltage. 6XSSO\9ROWDJH9 7HPSHUDWXUH& FIGURE 2-12: vs. Temperature. Enable Propagation Delay DS20006228A-page 7 MCP14A1201/2 Note: Unless otherwise indicated, TA = +25C with 4.5V VDD 18V. ,QSXW7KUHVKROG9 4XLHVFHQW&XUUHQW$ 9,+ 9,/ 6XSSO\9ROWDJH9 FIGURE 2-13: Quiescent Supply Current vs. Supply Voltage. FIGURE 2-16: Voltage. (QDEOH7KUHVKROG9 4XLHVFHQW&XUUHQW$ FIGURE 2-14: vs. Temperature. 9'' 9 9(+ 9(/ 7HPSHUDWXUH& Quiescent Supply Current FIGURE 2-17: Temperature. Enable Threshold vs. 9'' 9 9,+ (QDEOH7KUHVKROG9 ,QSXW7KUHVKROG9 Input Threshold vs. Supply 7HPSHUDWXUH& 9'' 9 6XSSO\9ROWDJH9 9,/ 9(+ 9(/ FIGURE 2-15: Temperature. DS20006228A-page 8 7HPSHUDWXUH& Input Threshold vs. 6XSSO\9ROWDJH9 FIGURE 2-18: Supply Voltage. Enable Threshold vs. 2019 Microchip Technology Inc. MCP14A1201/2 9,1 90&3$ 9,1 90&3$ 6XSSO\&XUUHQWP$ 52+ 2XWSXW5HVLVWDQFH Note: Unless otherwise indicated, TA = +25C with 4.5V VDD 18V. 7$ & 7$ & 9'' 9 0+] N+] N+] N+] N+] N+] 6XSSO\9ROWDJH9 FIGURE 2-19: Output Resistance (Output High) vs. Supply Voltage. FIGURE 2-22: Supply Current vs. Capacitive Load (VDD = 12V). 9,1 90&3$ 9,1 90&3$ 6XSSO\&XUUHQWP$ 52/ 2XWSXW5HVLVWDQFH 7$ & 7$ & 9'' 9 0+] N+] N+] N+] N+] N+] FIGURE 2-23: Supply Current vs. Capacitive Load (VDD = 6V). 9'' 9 6XSSO\&XUUHQWP$ 6XSSO\&XUUHQWP$ FIGURE 2-20: Output Resistance (Output Low) vs. Supply Voltage. 0+] N+] N+] N+] N+] N+] &DSDFLWLYH/RDGS) FIGURE 2-21: Supply Current vs. Capacitive Load (VDD = 18V). 2019 Microchip Technology Inc. &DSDFLWLYH/RDGS) 6XSSO\9ROWDJH9 &DSDFLWLYH/RDGS) 9'' 9 S) S) S) S) S) S) 6ZLWFKLQJ)UHTXHQF\N+] FIGURE 2-24: Supply Current vs. Frequency (VDD = 18V). DS20006228A-page 9 MCP14A1201/2 6XSSO\&XUUHQWP$ Note: Unless otherwise indicated, TA = +25C with 4.5V VDD 18V. 9'' 9 S) S) S) S) S) S) 6ZLWFKLQJ)UHTXHQF\N+] FIGURE 2-25: Supply Current vs. Frequency (VDD = 12V). 6XSSO\&XUUHQWP$ 9'' 9 S) S) S) S) S) S) 6ZLWFKLQJ)UHTXHQF\N+] FIGURE 2-26: Supply Current vs. Frequency (VDD = 6V). (QDEOH&XUUHQW$ 6XSSO\9ROWDJH9 FIGURE 2-27: Voltage. DS20006228A-page 10 Enable Current vs. Supply 2019 Microchip Technology Inc. MCP14A1201/2 3.0 12.0A PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE MCP14A1201/2 3.1 8L 2 x 3 TDFN 8L MSOP/SOIC 1 1 2 3 Symbol Description VDD Supply Input 2 IN Control Input 3 EN Device Enable 4 4 GND Power Ground 5 5 GND Power Ground 6 6 OUT/OUT Push-Pull Output 7 7 OUT/OUT Push-Pull Output 8 8 VDD Supply Input EP -- EP Exposed Thermal Pad (GND) Supply Input Pin (VDD) 3.4 Power Ground Pin (GND) VDD is the bias supply input for the MOSFET driver and has a voltage range of 4.5V to 18V. This input must be decoupled to ground with a local capacitor. This bypass capacitor provides a localized low-impedance path for the peak currents that are provided to the load. GND is the device return pin for the input and output stages. The GND pin should have a low-impedance connection to the bias supply source return. When the capacitive load is being discharged, high peak currents will flow through the ground pin. 3.2 3.5 Control Input Pin (IN) The MOSFET driver Control Input is a high-impedance input featuring low threshold levels. The Input also has hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals and to provide noise immunity. 3.3 Device Enable Pin (EN) The MOSFET driver Device Enable is a highimpedance input featuring low threshold levels. The Enable input also has hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals and to provide noise immunity. Driving the Enable pin below the threshold will disable the output of the device, pulling OUT/OUT low, regardless of the status of the Input pin. Driving the Enable pin above the threshold allows normal operation of the OUT/OUT pin based on the status of the Input pin. The Enable pin utilizes an internal pull up resistor, allowing the pin to be left floating for standard driver operation. 2019 Microchip Technology Inc. Output Pin (OUT, OUT) The Output is a CMOS push-pull output that is capable of sourcing and sinking 12.0A of peak current (VDD = 18V). The low output impedance ensures the gate of the external MOSFET stays in the intended state even during large transients. This output also has a reverse current latch-up rating of 500 mA. 3.6 Exposed Metal Pad Pin (EP) The exposed metal pad of the DFN package is internally connected to GND. Therefore, this pad should be connected to a Ground plane to aid in heat removal from the package. DS20006228A-page 11 MCP14A1201/2 4.0 APPLICATION INFORMATION 4.1 General Information 9'' 9 ) MOSFET drivers are high-speed, high-current devices which are intended to source/sink high-peak currents to charge/discharge the gate capacitance of external MOSFETs or Insulated-Gate Bipolar Transistors (IGBTs). In high frequency switching power supplies, the Pulse-Width Modulation (PWM) controller may not have the drive capability to directly drive the power MOSFET. A MOSFET driver such as the MCP14A1201/2 family can be used to provide additional source/sink current capability. 4.2 ,QSXW ) 2XWSXW &/ S) 0&3$ 9 MOSFET Driver Timing The ability of a MOSFET driver to transition from a fullyoff state to a fully-on state is characterized by the driver's rise time (tR), fall time (tF) and propagation delays (tD1 and tD2). Figure 4-1 and Figure 4-2 show the test circuit and timing waveform used to verify the MCP14A1201/2 timing. ,QSXW 9,+7\S 9 9,/7\S W' W5 W' 9 2XWSXW 9 ,QSXW6LJQDOW5,6( W)$//QV +]96TXDUH:DYH 9'' 9 ) ) ,QSXW FIGURE 4-2: Waveform. 4.3 2XWSXW &/ S) 0&3$ 9 ,QSXW 9,+7\S 9 9,/7\S W' W) W' 9 W5 2XWSXW 9 ,QSXW6LJQDOW5,6( W)$//QV +]96TXDUH:DYH FIGURE 4-1: Waveform. DS20006228A-page 12 W) Inverting Driver Timing Noninverting Driver Timing Enable Function The enable pin (EN) provides additional control of the output pin (OUT). This pin is active high and is internally pulled up to VDD so that the pin can be left floating to provide standard MOSFET driver operation. When the enable pin's input voltage is above the enable pin high voltage threshold, (VEN_H), the output is enabled and allowed to react to the status of the Input pin. However, when the voltage applied to the Enable pin falls below the low threshold voltage (VEN_L), the driver's output is disabled and does not respond to changes in the status of the Input pin. When the driver is disabled, the output is pulled down to a low state. Refer to Table 4-1 for enable pin logic. The threshold voltage levels for the Enable pin are similar to the threshold voltage levels of the Input pin. Hysteresis is provided to help increase the noise immunity of the enable function, avoiding false triggers of the enable signal during driver switching. There are propagation delays associated with the driver receiving an enable signal and the output reacting. These propagation delays, tD3 and tD4, are graphically represented in Figure 4-3. 2019 Microchip Technology Inc. MCP14A1201/2 TABLE 4-1: 4.6 ENABLE PIN LOGIC MCP14A1201 OUT MCP14A1202 OUT H L H L H L X L L ENB IN H H L Power Dissipation The total internal power dissipation in a MOSFET driver is the summation of three separate power dissipation elements, as shown in Equation 4-1. EQUATION 4-1: P T = PL + P Q + PCC Where: 5V PT = Total power dissipation PL = Load power dissipation PQ = Quiescent power dissipation PCC = Operating power dissipation Enable VEH (Typ.) VEL (Typ.) 0V tD3 tD4 18V 90% 4.6.1 Output 10% 0V Ena ble Signa l: tRISE = tFALL 10 ns, 100 Hz, 0-5V Squa re Wa ve FIGURE 4-3: CAPACITIVE LOAD DISSIPATION The power dissipation caused by a capacitive load is a direct function of the frequency, total capacitive load and supply voltage. The power lost in the MOSFET driver for a complete charging and discharging cycle of a MOSFET is shown in Equation 4-2. Enable Timing Waveform. EQUATION 4-2: 4.4 Decoupling Capacitors Careful PCB layout and decoupling capacitors are required when using power MOSFET drivers. Large currents are required to charge and discharge capacitive loads quickly. For example, approximately 720 mA are needed to charge a 1000 pF load with 18V in 25 ns. To operate the MOSFET driver over a wide frequency range with low supply impedance, it is recommended to place 1.0 F and 0.1 F low ESR ceramic capacitors in parallel between the driver VDD and GND. These capacitors should be placed close to the driver to minimize circuit board parasitics and provide a local source for the required current. 4.5 PCB Layout Considerations Proper Printed Circuit Board (PCB) layout is important in high-current, fast-switching circuits to provide proper device operation and robustness of design. Improper component placement may cause errant switching, excessive voltage ringing or circuit latch-up. The PCB trace loop length and inductance should be minimized by the use of ground planes or traces under the MOSFET gate drive signal. Separate analog and power grounds and local driver decoupling should also be used. P L = f CT V DD 2 Where: f = CT = Total load capacitance VDD = MOSFET driver supply voltage 4.6.2 Switching frequency QUIESCENT POWER DISSIPATION The power dissipation associated with the quiescent current draw depends on the state of the Input and Section 1.0 "Electrical Enable pins. See Characteristics" for typical quiescent current draw values in different operating states. The quiescent power dissipation is shown in Equation 4-3. EQUATION 4-3: P Q = I QH D + I QL 1 - D V DD Where: IQH = Quiescent current in the High state D = Duty cycle IQL = Quiescent current in the Low state VDD = MOSFET driver supply voltage Placing a ground plane beneath the MCP14A1201/2 devices will help as a radiated noise shield, as well as providing some heat sinking for power dissipated within the device. 2019 Microchip Technology Inc. DS20006228A-page 13 MCP14A1201/2 4.6.3 OPERATING POWER DISSIPATION The operating power dissipation occurs each time the MOSFET driver output transitions because, for a very short period of time, both MOSFETs in the output stage are on simultaneously. This cross-conduction current leads to a power dissipation described in Equation 4-4. EQUATION 4-4: P CC = V DD I CO Where: ICO = Crossover Current VDD = MOSFET driver supply voltage DS20006228A-page 14 2019 Microchip Technology Inc. MCP14A1201/2 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 8-Lead MSOP Example Device MCP14A1201-E/MS Code A1201 MCP14A1201T-E/MS A1201 MCP14A1202-E/MS A1202 MCP14A1202T-E/MS A1202 Note: Applies to 8-Lead MSOP Example 8-Lead SOIC Device MCP14A1201-E/SN NNN Code 14A1201 MCP14A1201T-E/SN 14A1201 MCP14A1202-E/SN 14A1202 MCP14A1202T-E/SN 14A1202 Note: e3 Note: 256 Example: Device Code MCP14A1201T-E/MNY EM3 MCP14A1202T-E/MNY EM4 Note: * 14A1201 e31925 Applies to 8-Lead SOIC 8-Lead TDFN (2 x 3) Legend: XX...X Y YY WW NNN A01 5256 EM3 925 25 Applies to 8-Lead 2 x 3 TDFN Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC(R) designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2019 Microchip Technology Inc. DS20006228A-page 15 MCP14A1201/2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20006228A-page 16 2019 Microchip Technology Inc. MCP14A1201/2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2019 Microchip Technology Inc. DS20006228A-page 17 MCP14A1201/2 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20006228A-page 18 2019 Microchip Technology Inc. MCP14A1201/2 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2X 0.10 C A-B D A D NOTE 5 N E 2 E1 2 E1 E NOTE 1 2 1 e B NX b 0.25 C A-B D NOTE 5 TOP VIEW 0.10 C C A A2 SEATING PLANE 8X A1 SIDE VIEW 0.10 C h R0.13 h R0.13 H SEE VIEW C VIEW A-A 0.23 L (L1) VIEW C Microchip Technology Drawing No. C04-057-SN Rev E Sheet 1 of 2 2019 Microchip Technology Inc. DS20006228A-page 19 MCP14A1201/2 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits Number of Pins N e Pitch Overall Height A Molded Package Thickness A2 Standoff A1 Overall Width E Molded Package Width E1 Overall Length D Chamfer (Optional) h Foot Length L Footprint L1 Foot Angle c Lead Thickness b Lead Width Mold Draft Angle Top Mold Draft Angle Bottom MIN 1.25 0.10 0.25 0.40 0 0.17 0.31 5 5 MILLIMETERS NOM 8 1.27 BSC 6.00 BSC 3.90 BSC 4.90 BSC 1.04 REF - MAX 1.75 0.25 0.50 1.27 8 0.25 0.51 15 15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. 5. Datums A & B to be determined at Datum H. Microchip Technology Drawing No. C04-057-SN Rev E Sheet 2 of 2 DS20006228A-page 20 2019 Microchip Technology Inc. MCP14A1201/2 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging SILK SCREEN C Y1 X1 E RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 MIN MILLIMETERS NOM 1.27 BSC 5.40 MAX 0.60 1.55 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-2057-SN Rev E 2019 Microchip Technology Inc. DS20006228A-page 21 MCP14A1201/2 8-Lead Plastic Dual Flat, No Lead Package (MNY) - 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A B N (DATUM A) (DATUM B) E NOTE 1 2X 0.15 C 1 2 2X 0.15 C TOP VIEW 0.10 C C (A3) A SEATING PLANE 8X 0.08 C A1 SIDE VIEW 0.10 C A B D2 L 1 2 0.10 C A B NOTE 1 E2 K N 8X b e 0.10 0.05 C A B C BOTTOM VIEW Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 1 of 2 DS20006228A-page 22 2019 Microchip Technology Inc. MCP14A1201/2 8-Lead Plastic Dual Flat, No Lead Package (MNY) - 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Units Dimension Limits N Number of Pins e Pitch A Overall Height A1 Standoff Contact Thickness A3 D Overall Length E Overall Width Exposed Pad Length D2 Exposed Pad Width E2 b Contact Width L Contact Length Contact-to-Exposed Pad K MIN 0.70 0.00 1.35 1.25 0.20 0.25 0.20 MILLIMETERS NOM 8 0.50 BSC 0.75 0.02 0.20 REF 2.00 BSC 3.00 BSC 1.40 1.30 0.25 0.30 - MAX 0.80 0.05 1.45 1.35 0.30 0.45 - Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Package is saw singulated 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 2 of 2 2019 Microchip Technology Inc. DS20006228A-page 23 MCP14A1201/2 8-Lead Plastic Dual Flat, No Lead Package (MNY) - 2x3x0.8 mm Body [TDFN] With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging X2 EV 8 OV C Y2 EV Y1 1 2 SILK SCREEN X1 E RECOMMENDED LAND PATTERN Units Dimension Limits E Contact Pitch Optional Center Pad Width X2 Optional Center Pad Length Y2 Contact Pad Spacing C Contact Pad Width (X8) X1 Contact Pad Length (X8) Y1 Thermal Via Diameter V Thermal Via Pitch EV MIN MILLIMETERS NOM 0.50 BSC MAX 1.60 1.50 2.90 0.25 0.85 0.30 1.00 Notes: 1. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. 2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during reflow process Microchip Technology Drawing No. C04-129-MNY Rev. B DS20006228A-page 24 2019 Microchip Technology Inc. MCP14A1201/2 APPENDIX A: REVISION HISTORY Revision A (July 2019) * Original release of this document. 2019 Microchip Technology Inc. DS20006228A-page 25 MCP14A1201/2 NOTES: DS20006228A-page 26 2019 Microchip Technology Inc. MCP14A1201/2 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. [X](1) -X Device Tape and Reel Temperature Range Device: /XX E Package: MS SN MNY Y* = -40C to +125C (Extended) = 8-Lead Plastic Micro Small Outline Package (MSOP) = 8-Lead Plastic Small Outline - Narrow, 3.90 mm Body (SOIC) = 8-Lead Plastic Dual Flat, No Lead Package 2 x 3 x 0.75 mm Body (TDFN) = Nickel palladium gold manufacturing designator. Only available on the SC70 and TDFN packages. 2019 Microchip Technology Inc. a) MCP14A1201T-E/MS: Tape and Reel, Extended temperature, 8LD MSOP package b) MCP14A1201-E/MS: Extended temperature, 8LD MSOP package c) MCP14A1202T-E/SN: Tape and Reel, Extended temperature, 8LD SOIC package d) MCP14A1202-E/SN: Extended temperature, 8LD SOIC package Package MCP14A1201: High-Speed MOSFET Driver MCP14A1202: High-Speed MOSFET Driver MCP14A1201T: High-Speed MOSFET Driver (Tape and Reel) MCP14A1202T: High-Speed MOSFET Driver (Tape and Reel) Temperature Range: Examples: e) MCP14A1202T-E/MNY: Tape and Reel, Extended temperature, 8LD TDFN package Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. DS20006228A-page 27 MCP14A1201/2 NOTES: DS20006228A-page 28 2019 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2019, Microchip Technology Incorporated, All Rights Reserved. For information regarding Microchip's Quality Management Systems, please visit www.microchip.com/quality. 2019 Microchip Technology Inc. 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