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Rev. A
02/20/2013
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
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c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
IS61WV51216EDALL
IS61/64WV51216EDBLL
512K x 16 HIGH-SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH ECC FEBRUARY 2013
FEATURES
• High-speedaccesstimes:8,10,20ns
• High-performance,low-powerCMOSprocess
• Multiplecenterpowerandgroundpinsforgreater
noise immunity
•
Easy memory expansion with CE and OE options
• CE power-down
• Fullystaticoperation:noclockorrefresh
required
• TTLcompatibleinputsandoutputs
• SinglePowerSupply
– Vdd=1.65Vto2.2V(IS61WV51216EDALL)
– Vdd=2.4Vto3.6V(IS61/64WV51216EDBLL)
• Packagesavailable:
–
48-ballminiBGA(6mmx8mm)
–44-pinTSOP(TypeII)
• IndustrialandAutomotiveTemperatureSupport
• Lead-freeavailable
• Datacontrolforupperandlowerbytes
DESCRIPTION
TheISSIIS61WV51216EDALLand
IS61/64WV51216EDBLLarehigh-speed,8M-bitstatic
RAMsorganizedas512Kwordsby16bits.Itisfabri-
cated using ISSI'shigh-performanceCMOStechnology.
Thishighlyreliableprocesscoupledwithinnovative
circuit design techniques, yields high-performance and
low power consumption devices.
When CEisHIGH(deselected),thedeviceassumes
a standby mode at which the power dissipation can be
reduceddownwithCMOSinputlevels.
Easy memory expansion is provided by using Chip En-
ableandOutputEnableinputs,CE and OE.Theactive
LOWWriteEnable(WE) controls both writing and read-
ing of the memory. A data byte allows Upper Byte (UB)
andLowerByte(LB) access.
ThedeviceispackagedintheJEDECstandard44-pin
TSOPTypeIIand48-pinMiniBGA(6mmx8mm).
FUNCTIONAL BLOCK DIAGRAM
Memory
Lower IO
Array-
512Kx8
ECC
Array-
512K
x4
Decoder
I/O Data
Circuit
ECC
Column I/O
IO0-7
Control
Circuit
A0-A18
IO8-15
8
ECC
8
8
8
12
12
Memory
Upper IO
Array-
512Kx8
ECC
Array-
512K
x4
8 4 48
/CE
/OE
/WE
/UB
/LB
2 Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
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PIN DESCRIPTIONS
A0-A18 AddressInputs
I/O0-I/O15 DataInputs/Outputs
CE Chip Enable Input
OE OutputEnableInput
WE Write Enable Input
LB Lower-byteControl(I/O0-I/O7)
UB Upper-byteControl(I/O8-I/O15)
NC No Connection
Vdd Power
GND Ground
48-pin mini BGA (6mm x 8mm)
1 2 3 4 5 6
A
B
C
D
E
F
G
H
LB OE A0 A1 A2 NC
I/O
8
UB A3 A4 CE I/O
0
I/O
9
I/O
10
A5 A6 I/O
1
I/O
2
GND I/O
11
A17 A7 I/O
3
VDD
VDD I/O
12
NC A16 I/O
4
GND
I/O
14
I/O
13
A14 A15 I/O
5
I/O
6
I/O
15
NC A12 A13 WE I/O
7
A18 A8 A9 A10 A11 NC
Integrated Silicon Solution, Inc. — www.issi.com 3
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PIN DESCRIPTIONS
A0-A18 AddressInputs
I/O0-I/O15 DataInputs/Outputs
CE Chip Enable Input
OE OutputEnableInput
WE Write Enable Input
LB Lower-byteControl(I/O0-I/O7)
UB Upper-byteControl(I/O8-I/O15)
NC No Connection
Vdd Power
GND Ground
44-Pin TSOP (Type II)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A1
A2
A3
A4
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
WE
A5
A6
A7
A8
A9
A17
A16
A15
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
A18
A14
A13
A12
A11
A10
PIN CONFIGURATIONS
4 Integrated Silicon Solution, Inc. — www.issi.com
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ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter Value Unit
Vterm TerminalVoltagewithRespecttoGND –0.5toVdd + 0.5 V
Vdd VddRelatestoGND –0.3to4.0 V
tstg StorageTemperature –65to+150 °C
Pt Power Dissipation 1.0 W
Notes:
1.StressgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamageto
thedevice.Thisisastressratingonlyandfunctionaloperationofthedeviceattheseoranyotherconditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
CAPACITANCE(1,2)
Symbol Parameter Conditions Max. Unit
Cin Input Capacitance Vin = 0V 6 pF
Ci/O Input/OutputCapacitance VOut = 0V 8 pF
Notes:
1.Testedinitiallyandafteranydesignorprocesschangesthatmayaffecttheseparameters.
2. Testconditions:Ta = 25°C, f=1MHz,Vdd = 3.3V.
TRUTH TABLE
I/O PIN
Mode WE CE OE LB UB I/O0-I/O7 I/O8-I/O15 VDD Current
NotSelected X H X X X High-Z High-Z isb1, isb2
OutputDisabled H L H X X High-Z High-Z iCC
X L X H H High-Z High-Z
Read H L L L H dOut High-Z iCC
H L L H L High-Z dOut
H L L L L dOut dOut
Write L L X L H din High-Z iCC
L L X H L High-Z din
L L X L L din din
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ERROR DETECTION AND ERROR CORRECTION
• Independent ECC for each byte
• Detect and correct one bit error per byte
• Better reliability than parity code schemes which can only detect an error but not correct an error
• Backward Compatible: Drop in replacement to current in industry standard devices (without ECC)
OPERATING RANGE (VDD)
Range Ambient IS61WV51216EDALL IS61WV51216EDBLL IS64WV51216EDBLL
Temperature VDD (20nS) VDD (8, 10nS) VDD (10nS)
Industrial –40°Cto+85°C 1.65V-2.2V 2.4V-3.6V —
Automotive(A1) –40°Cto+85°C — — 2.4V-3.6V
Automotive(A3) –40°Cto+125°C — — 2.4V-3.6V
6 Integrated Silicon Solution, Inc. — www.issi.com
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DC ELECTRICAL CHARACTERISTICS (OverOperatingRange)
VDD = 2.4V-3.6V
Symbol Parameter Test Conditions Min. Max. Unit
VOH OutputHIGHVoltage Vdd = Min.,iOH = –1.0mA 1.8 — V
VOL OutputLOWVoltage Vdd = Min.,iOL = 1.0mA — 0.4 V
ViH InputHIGHVoltage 2.0 Vdd + 0.3 V
ViL InputLOWVoltage(1) –0.3 0.8 V
iLi InputLeakage GND≤ Vin ≤ Vdd –1 1 µA
iLO OutputLeakage GND≤ VOut ≤ Vdd, OutputsDisabled –1 1 µA
Note:
1. ViL (min.) = –0.3V DC; ViL (min.) = –2.0V AC (pulse width < 2 ns). Not 100% tested.
ViH (max.) = Vdd + 0.3V dC; ViH (max.) = Vdd + 2.0V aC (pulse width < 2 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS (OverOperatingRange)
VDD = 1.65V-2.2V
Symbol Parameter Test Conditions Min. Max. Unit
VOH OutputHIGHVoltage iOH = -0.1mA 1.4 — V
VOL OutputLOWVoltage iOL = 0.1mA — 0.2 V
ViH InputHIGHVoltage 1.4 Vdd + 0.2 V
ViL InputLOWVoltage –0.2 0.4 V
iLi InputLeakage GND≤ Vin ≤ Vdd –1 1 µA
iLO OutputLeakage GND≤ VOut ≤ Vdd, –1 1 µA
OutputsDisabled
Notes:
1. ViL (min.) = –0.3V dC; ViL (min.) = –1.0V AC (pulse width < 2 ns). Not 100% tested.
ViH (max.) = Vdd + 0.3V dC; ViH (max.) = Vdd + 1.0V AC (pulse width < 2 ns). Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com7
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POWER SUPPLY CHARACTERISTICS(1) (OverOperatingRange)
-8 -10 -20
Symbol Parameter Test Conditions Min. Max. Min. Max. Min. Max. Unit
iCC VddDynamicOperating Vdd = Max., Com. — 45 — 40 — 30 mA
Supply Current iOut = 0 mA, f = fmaX Ind. — 55 — 50 — 40
Auto. — — — 65 — 55
typ.(2) 15
iCC1 Operating Vdd = Max., Com. — 20 — 20 — 20 mA
Supply Current iOut = 0 mA, f = 0 Ind. — 25 — 25 — 25
Auto. — — — 50 — 50
isb1 TTLStandbyCurrent Vdd = Max., Com. — 20 — 20 — 20 mA
(TTLInputs) Vin = ViH or ViL Ind. — 25 — 25 — 25
CE ≥ ViH,f=0 Auto. — — — 45 — 45
isb2 CMOSStandby Vdd = Max., Com. — 10 — 10 — 10 mA
Current(CMOSInputs) CE ≥ Vdd – 0.2V, Ind. — 15 — 15 — 15
Vin ≥ Vdd – 0.2V, or Auto. — — — 35 — 35
Vin ≤ 0.2V
, f = 0 typ.(2) 2
Note:
1. At f = fmaX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2.TypicalvaluesaremeasuredatVdd=3.0V,Ta = 25oC and not 100% tested.
AC TEST LOADS
Figure 1.
R1
5 pF
Including
jig and
scope
R2
OUTPUT
VTM
Figure 2.
ZO = 50Ω
VDD/2
50Ω
OUTPUT
30 pF
Including
jig and
scope
AC TEST CONDITIONS
Parameter Unit Unit Unit
(2.4V-3.6V) (3.3V + 5%) (1.65V-2.2V)
InputPulseLevel 0.4VtoVdd - 0.3V 0.4V to Vdd - 0.3V 0.4V to Vdd - 0.3V
InputRiseandFallTimes 1V/ns 1V/ns 1V/ns
InputandOutputTiming VDD/2 VDD + 0.05 0.9V
andReferenceLevel(VRef) 2
OutputLoad SeeFigures1and2 SeeFigures1and2 SeeFigures1and2
R1 ( Ω ) 1909 317 13500
R2 ( Ω ) 1105 351 10800
Vtm(V) 3.0V 3.3V 1.8V
8 Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
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IS61WV51216EDALL
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READ CYCLE SWITCHING CHARACTERISTICS(1) (OverOperatingRange)
-8 -10
Symbol Parameter Min. Max. Min. Max. Unit
trC ReadCycleTime 8 — 10 — ns
taa AddressAccessTime — 8 — 10 ns
tOHa OutputHoldTime 2.5 — 2.5 — ns
taCe CEAccessTime — 8 — 10 ns
tdOe OEAccessTime — 5.5 — 6.5 ns
tHzOe(2) OEtoHigh-ZOutput — 3 — 4 ns
tLzOe(2) OEtoLow-ZOutput 0 — 0 — ns
tHzCe(2 CEtoHigh-ZOutput 0 3 0 4 ns
tLzCe(2) CEtoLow-ZOutput 3 — 3 — ns
tba LB, UBAccessTime — 5.5 — 6.5 ns
tHzb(2) LB, UBtoHigh-ZOutput 0 3 0 3 ns
tLzb(2) LB, UBtoLow-ZOutput 0 — 0 — ns
tPu PowerUpTime 0 — 0 — ns
tPd PowerDownTime — 8 — 10 ns
Notes:
1. TestconditionsandoutputloadingconditionsarespeciedintheACTestConditionsandACTestLoads(Figure1).
2. TestedwiththeloadinFigure2.Transitionismeasured±500mVfromsteady-statevoltage.
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READ CYCLE SWITCHING CHARACTERISTICS(1) (OverOperatingRange)
-20 ns
Symbol Parameter Min. Max. Unit
trC ReadCycleTime 20 — ns
taa AddressAccessTime — 20 ns
tOHa OutputHoldTime 2.5 — ns
taCe CEAccessTime — 20 ns
tdOe OEAccessTime — 8 ns
tHzOe(2) OEtoHigh-ZOutput 0 8 ns
tLzOe(2) OEtoLow-ZOutput 0 — ns
tHzCe(2 CEtoHigh-ZOutput 0 8 ns
tLzCe(2) CEtoLow-ZOutput 3 — ns
tba LB, UBAccessTime — 8 ns
tHzb LB, UBtoHigh-ZOutput 0 8 ns
tLzb LB, UBtoLow-ZOutput 0 — ns
Notes:
1. TestconditionsandoutputloadingconditionsarespeciedintheACTestConditionsandACTestLoads(Figure1).
2. TestedwiththeloadinFigure1b.Transitionismeasured±500mVfromsteady-statevoltage.Not100%tested.
3. Not 100% tested.
10 Integrated Silicon Solution, Inc. — www.issi.com
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t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACE
t
LZCE
t
HZOE
HIGH-Z DATA VALID
ADDRESS
OE
CE
D
OUT
t
HZCE
READ CYCLE NO. 2(1,3) (CE and OE Controlled)
Notes:
1. WEisHIGHforaReadCycle.
2. Thedeviceiscontinuouslyselected.OE, CE = ViL.
3. Address is valid prior to or coincident with CELOWtransitions.
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = ViL)
DATA VALID
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
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WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (OverOperatingRange)
-8 -10
Symbol Parameter Min. Max. Min. Max. Unit
twC WriteCycleTime 8 — 10 — ns
tsCe CEtoWriteEnd 6.5 — 8 — ns
taw AddressSetupTime 6.5 — 8 — ns
to Write End
tHa AddressHoldfromWriteEnd 0 — 0 — ns
tsa AddressSetupTime 0 — 0 — ns
tPwb LB, UBValidtoEndofWrite 6.5 — 8 — ns
tPwe1 WEPulseWidth 6.5 — 8 — ns
tPwe2 WE Pulse Width (OE=LOW) 8.0 — 10 — ns
tsd DataSetuptoWriteEnd 5 — 6 — ns
tHd DataHoldfromWriteEnd 0 — 0 — ns
tHzwe(2) WELOWtoHigh-ZOutput — 3.5 — 5 ns
tLzwe(2) WEHIGHtoLow-ZOutput 2 — 2 — ns
Notes:
1. TestconditionsandoutputloadingconditionsarespeciedintheACTestConditionsandACTestLoads(Figure1).
2. TestedwiththeloadinFigure2.Transitionismeasured±500mVfromsteady-statevoltage.Not100%tested.
3. TheinternalwritetimeisdenedbytheoverlapofCELOWandUB or LB, and WELOW.Allsignalsmustbeinvalidstatestoiniti-
ateaWrite,butanyonecangoinactivetoterminatetheWrite.TheDataInputSetupandHoldtimingarereferencedtotherising
or falling edge of the signal that terminates the write. Shaded area product in development
12 Integrated Silicon Solution, Inc. — www.issi.com
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WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (OverOperatingRange)
-20 ns
Symbol Parameter Min. Max. Unit
twC WriteCycleTime 20 — ns
tsCe CEtoWriteEnd 12 — ns
taw AddressSetupTime 12 — ns
to Write End
tHa AddressHoldfromWriteEnd 0 — ns
tsa AddressSetupTime 0 — ns
tPwb LB, UBValidtoEndofWrite 12 — ns
tPwe1 WE Pulse Width (OE=HIGH) 12 — ns
tPwe2 WE Pulse Width (OE=LOW) 17 — ns
tsd DataSetuptoWriteEnd 9 — ns
tHd DataHoldfromWriteEnd 0 — ns
tHzwe(2) WELOWtoHigh-ZOutput — 9 ns
tLzwe(2) WEHIGHtoLow-ZOutput 3 — ns
Notes:
1. TestconditionsandoutputloadingconditionsarespeciedintheACTestConditionsandACTest
Loads(Figure1).
2. TestedwiththeloadinFigure1b.Transitionismeasured±500mVfromsteady-statevoltage.Not
100% tested.
3. TheinternalwritetimeisdenedbytheoverlapofCELOWandUB or LB, and WELOW.Allsignals
mustbeinvalidstatestoinitiateaWrite,butanyonecangoinactivetoterminatetheWrite.TheData
InputSetupandHoldtimingarereferencedtotherisingorfallingedgeofthesignalthatterminates
the write.
Integrated Silicon Solution, Inc. — www.issi.com 13
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AC WAVEFORMS
WRITE CYCLE NO. 1(1,2) (CE Controlled, OE=HIGHorLOW)
DATA UNDEFINED
t WC
VALID ADDRESS
t SCE
t PWE1
t PWE2
t AW
t HA
HIGH-Z
t HD
t SA
t HZWE
ADDRESS
CE
WE
D
OUT
D
IN DATA
IN
VALID
t LZWE
t SD
14 Integrated Silicon Solution, Inc. — www.issi.com
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AC WAVEFORMS
WRITE CYCLE NO. 2
(WE Controlled. OE isHIGHDuringWriteCycle)(1,2)
DATA UNDEFINED
LOW
t
WC
VALID ADDRESS
t
PWE1
t
AW
t
HA
HIGH-Z
t
PBW
t
HD
t
SA
t
HZWE
ADDRESS
CE
UB, LB
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
WRITE CYCLE NO. 3
(WE Controlled. OE isLOWDuringWriteCycle)(1)
Integrated Silicon Solution, Inc. — www.issi.com 15
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AC WAVEFORMS
WRITE CYCLE NO. 4
(LB, UB Controlled, Back-to-Back Write) (1,3)
DATA UNDEFINED
t
WC
ADDRESS 1 ADDRESS 2
t
WC
HIGH-Z
t
PBW
WORD 1
LOW
WORD 2
t
HD
t
SA
t
HZWE
ADDRESS
CE
UB, LB
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
t
PBW
DATA
IN
VALID
t
SD
t
HD
t
SA
t
HA t
HA
Notes:
1. TheinternalWritetimeisdenedbytheoverlapofCE = LOw, UB and/or LB = LOw, and WE=LOW.Allsignalsmustbeinvalidstatesto
initiateaWrite,butanycanbedeassertedtoterminatetheWrite.Thet sa, t Ha, t sd, and t Hd timing is referenced to the rising or falling edge
of the signal that terminates the Write.
2. TestedwithOEHIGHforaminimumof4nsbeforeWE=LOWtoplacetheI/OinaHIGH-Zstate.
3. WEmaybeheldLOWacrossmanyaddresscyclesandtheLB, UB pins can be used to control the Write function.
16 Integrated Silicon Solution, Inc. — www.issi.com
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DATA RETENTION WAVEFORM (CE Controlled)
VDD
CE ≥ V
DD
- 0.2V
t
SDR
t
RDR
V
DR
CE
GND
Data Retention Mode
DATA RETENTION SWITCHING CHARACTERISTICS (2.4V-3.6V)
Symbol Parameter Test Condition Options Min. Typ.(1) Max. Unit
Vdr VddforDataRetention SeeDataRetentionWaveform 2.0 — 3.6 V
idr Data Retention Current Vdd = Vdr(min), CE ≥ Vdd–0.2V Com. — 2 10
mA
Ind. — — 15
Auto. 35
tsdr DataRetentionSetupTime SeeDataRetentionWaveform 0 — — ns
trdr RecoveryTime SeeDataRetentionWaveform trC — — ns
Note 1: TypicalvaluesaremeasuredatVdd = Vdr(min)Ta = 25
O
C and not 100% tested.
DATA RETENTION SWITCHING CHARACTERISTICS (1.65V-2.2V)
Symbol Parameter Test Condition Options Min. Typ.(1) Max. Unit
Vdr VddforDataRetention SeeDataRetentionWaveform 1.2 — 3.6 V
idr Data Retention Current Vdd = Vdr(min), CE ≥ Vdd–0.2V Com. — 2 10
mA
Ind. — — 15
Auto. — — 35
tsdr DataRetentionSetupTime SeeDataRetentionWaveform 0 — — ns
trdr RecoveryTime SeeDataRetentionWaveform trC — — ns
Note 1: TypicalvaluesaremeasuredatVdd = Vdr(min),Ta = 25
O
C and not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com 17
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ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Voltage Range: 2.4V to 3.6V
Speed (ns) Order Part No. Package
8 IS61WV51216EDBLL-8BLI 48miniBGA(6mmx8mm),Lead-free
IS61WV51216EDBLL-8TLI TSOP(TypeII),Lead-free
10 IS61WV51216EDBLL-10BI 48miniBGA(6mmx8mm)
IS61WV51216EDBLL-10BLI 48miniBGA(6mmx8mm),Lead-free
IS61WV51216EDBLL-10TI TSOP(TypeII)
IS61WV51216EDBLL-10TLI TSOP(TypeII),Lead-free
Automotive Range: -40°C to +125°C
Voltage Range: 2.4V to 3.6V
Speed (ns) Order Part No. Package
10 IS64WV51216EDBLL-10BA3 48miniBGA(6mmx8mm)
IS64WV51216EDBLL-10BLA3 48miniBGA(6mmx8mm),Lead-free
IS64WV51216EDBLL-10CTA3 TSOP(TypeII),CopperLeadframe
IS64WV51216EDBLL-10CTLA3TSOP(TypeII),Lead-free,CopperLeadframe
Industrial Range: -40°C to +85°C
Voltage Range: 1.65V to 2.2V
Speed (ns) Order Part No. Package
20 IS61WV51216EDALL-20BLI 48miniBGA(6mmx8mm),Lead-free
IS61WV51216EDALL-20TLI TSOP(TypeII),Lead-free
18 Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
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2. Reference document : JEDEC MO-207
1. CONTROLLING DIMENSION : MM .
NOTE :
08/12/2008
Package Outline
Integrated Silicon Solution, Inc. — www.issi.com 19
Rev. A
02/20/2013
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2. DIMENSION D AND E1 DO NOT INCLUDE MOLD PROTRUSION.
3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION.
1. CONTROLLING DIMENSION : MM
NOTE :
Θ
Θ
06/04/2008
Package Outline