TCM9001MD Preliminary TOSHIBA C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TCM9001MD V0.21 Dec 12, 2008 Preliminary 1/10" VGA size Camera Module Features General * Input Clock * Frame rate * Data formats * Output format * Power supply : 9.0 to 26MHz (with PLL, selectable) : 30fps (max.) @VGA output : YUV422/RAW : Parallel output : Analog 2.8V -/+ 0.2V Digital 1.8V -/+ 0.1V I/O 1.8V -/+0.1V or 2.8V -/+0.2V : -20 to +60 degree C : -30 to +85 degree C * Operating temperature * Storage temperature Sensor * Optical format : 1/10 inch * Effective pixel numbers : 648(H) x 492(V) * Pixel pitch : 2.2m(H) x 2.2m(V) (square pixel) * Image area size : 1425.6m(H) x 1082.4m(V) * Color filter : Primary color filter, Bayer arrangement * Image sizer and window of interest (QVGA, QQVGA) * Picture flip (Horizontal flip and Vertical flip) * Picture effects (monochrome, negative, sepia, sketch, emboss) * Fixed output format (VGA, QVGA, QQVGA) * Auto luminance control (=Auto exposure) * Auto white balance * Blemish correction * Auto flicker detection and correction * Gamma correction * Lens shading correction * Power down mode for low power consumption V0.21 Dec. 12, 2008 1/40 Preliminary TCM9001MD Key Specifications Item Optical format Effective pixel numbers Image area size Pixel pitch Aspect ratio Input clock frequency range Signal output order Color filter Output data Frame rate Package Contents 1/10 inch 648(H) x 492(V) 1425.6m(H) x 1082.4m(V) 2.2m(H) x 2.2m(V) 4(H) : 3(V) 9 to 26 MHz (with PLL, selectable) Progressive scanning RGB primary color filter Bayer arrangement (G checked, R/B in line sequence) YUV422 or RAW parallel output 30fps (max.) @ VGA Camera Module Table 1 Key specifications V0.21 Dec. 12, 2008 2/40 Preliminary TCM9001MD Table of Contents Features........................................................................................................................................................ 1 General .............................................................................................................................................................1 Sensor ..............................................................................................................................................................1 Key Specifications............................................................................................................................................2 Table of Contents.......................................................................................................................................... 3 1. List of Abbreviation............................................................................................................................. 5 2. Block Diagram..................................................................................................................................... 6 2.1. 2.2. Block Diagram........................................................................................................................................6 I/O circuits.............................................................................................................................................7 3. Pin Layout ........................................................................................................................................... 8 4. I2C Control Interface........................................................................................................................... 9 4.1. 4.2. General ...................................................................................................................................................9 Slave address .......................................................................................................................................10 5. Power supply .................................................................................................................................... 11 6. Input clock frequency ....................................................................................................................... 12 6.1. Clock setting.........................................................................................................................................12 7. Frame rate......................................................................................................................................... 12 8. Data Formats .................................................................................................................................... 12 9. Functions .......................................................................................................................................... 13 9.1. 9.2. 9.3. 9.4. 9.5. 9.6. 9.7. 9.8. 9.9. 9.10. 9.11. 9.12. 9.13. 9.14. 9.15. 9.16. 9.17. 9.18. 9.19. 10. Window of interest ..............................................................................................................................13 Image sizer...........................................................................................................................................13 Picture flip ............................................................................................................................................13 Picture effects ......................................................................................................................................13 Dynamic range adjustment .................................................................................................................13 Gamma correction................................................................................................................................13 Auto luminance control .......................................................................................................................14 Analog gain control..............................................................................................................................14 White balance ......................................................................................................................................14 Auto flicker detection and correction ...............................................................................................14 Statistical data output .......................................................................................................................14 Color separation.................................................................................................................................14 Color matrix .......................................................................................................................................14 Edge enhancement ............................................................................................................................14 Brightness and contrast ....................................................................................................................15 Lens shading correction ....................................................................................................................15 Blemish correction .............................................................................................................................15 Test charts..........................................................................................................................................15 Test pattern output............................................................................................................................15 Timing Chart ..................................................................................................................................... 16 10.1. Power management modes...............................................................................................................16 10.2. Power on/off sequence .....................................................................................................................17 10.2.1. Power on sequence (w/ built-in regulator)...............................................................................17 10.2.2. Power off sequence (w/ built-in regulator) ..............................................................................17 10.3. Output signal waveform ....................................................................................................................18 11. V0.21 Register descriptions ........................................................................................................................ 19 Dec. 12, 2008 3/40 Preliminary 12. TCM9001MD Electrical Characteristics .................................................................................................................. 31 12.1. Absolute Maximum Ratings...............................................................................................................31 12.2. Operating Conditions.........................................................................................................................31 12.3. DC Characteristics..............................................................................................................................32 12.4. AC Characteristics..............................................................................................................................33 12.4.1. EXTCLK input conditions ...............................................................................................................33 12.4.2. SDA and SCL...................................................................................................................................34 12.4.3. DATA7 to DATA0, DCLK, HSYNC and VSYNC ................................................................................35 13. Reference of Application Circuit ....................................................................................................... 36 14. Characteristics of Lens...................................................................................................................... 37 15. Module dimensions ........................................................................................................................... 38 16. Instruction for the Camera Module handling.................................................................................... 39 RESTRICTIONS ON PRODUCT USE ............................................................................................................. 39 Revision History.......................................................................................................................................... 40 V0.21 Dec. 12, 2008 4/40 Preliminary 1. TCM9001MD List of Abbreviation Abbreviation ISP CDS ADC PLL VCO PPRO MPRO APRO ALC AE AF UXGA SXGA Quad VGA XGA SVGA VGA CIF QVGA QCIF QQVGA subQCIF Image area Effective pixel area Description Image Signal Processor Correlated Double Sampling Analog to Digital Converter Phase Locked Loop Variable Controlled Oscillator Pre PROcessor Main PROcessor After signal PROcessor Auto Luminance Control (AE) Auto Exposure Auto Focus Ultra XGA (1600 x 1200) Super XGA (1280 x 1024) Quad VGA (1280 x 960) eXtended Graphics Array (1024 x 768) Super VGA (800 x 600) Video Graph Array (640 x 480) Common Intermediate Format (352 x 288) Quarter VGA (320 x 240) Quarter CIF (176 x 144) Quarter Quarter VGA (160 x 120) subQCIF (128 x96) Aperture area of the sensor It is the pixel area that is the signal output is available. Table 2 Abbreviation V0.21 Dec. 12, 2008 5/40 TCM9001MD Preliminary 2. Block Diagram 2.1. Block Diagram Sensor Core PPRO CDS Image Area (648x492) ADC Monitoring Test pattern generator Blemish Correction Linear Color Separation Output Format selector Noise Reduction Linear Matrix Color Correction Signal Generator Lens Shading Correction Gamma Correction YUV Matrix High luminance Correction Edge Enhancement Timing Generator for Image Area APRO MPRO DATA0 : DATA7 VSYNC HSYNC DCLK Parallel output Statistical Data for ALC, AWB Carrier Boost Correction Auto White Balance Auto Luminance Controol (Auto Exposure) PLL IOVDD Flicker Correction Timing Generator for ISP AVDD Dizital Zoom UV LPF RGB Matrix DVDD Regulator GND SCL I 2C I/F Register Table SDA RESET PWRDWN Some functional blocks, circuits or constants may be omitted or simplified in the block diagram for explanatory purposes. Figure 1 Block diagram V0.21 Dec. 12, 2008 6/40 TCM9001MD Preliminary 2.2. I/O circuits Pin No. / Pin name B5: EXTCLK I/O Interface circuit I GND C6: PWRDWN I GND D3: RESET IOVDD 140k IOVDD I GND D6: SCL I GND C5: SDA I/O GND A3: DCLK D1: HSYNC D2: VSYNC B1: DATA1 B2: DATA2 B3: DATA0 B4: DATA3 C1: DATA4 C2: DATA5 C3: DATA6 D4: DATA7 GND IOVDD O GND The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. Table 3 I/O circuits V0.21 Dec. 12, 2008 7/40 TCM9001MD Preliminary 3. Pin Layout <Top view> Orientation A5 A4 A3 A2 B6 B5 B4 B3 B2 B1 C6 C5 C4 C3 C2 C1 D4 D3 D2 D1 E4 E3 E2 D6 E5 Pin No. A2 A3 A4 A5 B1 B2 B3 B4 B5 B6 C1 C2 C3 C4 C5 C6 D1 D2 D3 D4 D6 E2 E3 E4 E5 Pin name IOVDD DCLK GND VDD15 DATA1 DATA2 DATA0 DATA3 EXTCLK DVDD DATA4 DATA5 DATA6 GND SDA PWRDWN HSYNC VSYNC RESET DATA7 SCL GND GND VDD15 AVDD I/O O O O O O I O O O I/O I O O I O I - Description Power supply for I/O circuits (1.7 to 3.0V) Data clock output System ground Capacitor connection for internal regulator Image data output 1 Image data output 2 Image data output 0 Image data output 3 External clock input Power supply for digital circuits (1.8V -/+ 0.1V) Image data output 4 Image data output 5 Image data output 6 System ground Serial data input/output for I2C System power down signal input Horizontal synchronization signal output Vertical synchronization signal output System reset signal input (Reset = L) Image data output 7 Serial data input/output for I2C System ground System ground Capacitor connection for internal regulator Power supply for analog circuits (2.8V -/+ 0.2V) Install the product correctly. Otherwise, it may result in break down, damage and/or degradation to the product or equipment. Table 4 Pin description V0.21 Dec. 12, 2008 8/40 TCM9001MD Preliminary 4. I2C Control Interface TCM9001MD controls interface configuration is based on fast mode I2C bus. Register setting can be changed via I2C bus. All register settings are readable via I2C bus. 4.1. General Write mode Read mode (Standard format) Read mode (Combination format) Figure 2 Write/Read mode Start condition, End condition Bit Transfer SDA SDA SCL SCL S P Start condition End conditon data line stable ; data valid Acknowledge change of data allowed Not Acknowledge HiZ SDA from trancemitter HiZ SDA from reciver SCL from master NACK S 1 8 9 Figure 3 Start/End condition Note: The system conforms to the I2C Standard Specification as defined by . V0.21 Dec. 12, 2008 9/40 Preliminary 4.2. TCM9001MD Slave address TCM9001MD has one address table. Slave address is 7Ch. W : 7Ch R : 7Dh Bit Data A6 A5 A4 A3 A2 A1 A0 R/W 0 1 1 1 1 1 0 1/0 Table 5 Slave address V0.21 Dec. 12, 2008 10/40 Preliminary 5. TCM9001MD Power supply TCM9001MD needs two power supplies, 2.8V and 1.8V. 2.8V is for Analog and 1.8V is for the build-in regulator (for Analog and digital circuits). And IOVDD also require a power supply, 1.8V or 2.8V, for I/F. Pin name AVDD IOVDD DVDD I/O - Description Power supply for analog circuits (2.8V -/+ 0.2V) Power supply for I/O circuits (1.8V -/+ 0.1V or 2.8V -/+ 0.2V) Power supply for regulator (1.8V -/+ 0.1V) Table 6 Power supply pins V0.21 Dec. 12, 2008 11/40 TCM9001MD Preliminary 6. Input clock frequency The input clock frequency between 9MHz and 26MHz is acceptable to TCM9001MD. 6.1. Clock setting The clock system diagram is shown below. REGCK 20h(D7-D6) 20h(D5-D4) VCO_DIV[1:0] VCO Divider CKREF Divider Phase Comparator EXTCLK 0h: 1/5 : Fh: 1/20 CKREF_DIV[3:0] PLL Divider 1Bh(D3-D0) VCO 1Dh(D4) CLK_SEL[1:0] EXTCLK_THROUGH CLK Selector Divider 0h: 1h: 2h: 3h: 1/8 1/4 1/2 1/1 0h: 1h: 2h: 3h: VCO Reserved EXTCLK Reserved EXTCLK Selector DCLK 1/18 0h: VCO 1h: EXTCLK Internal circuits 500 to 720MHz Divider x1/2 010h: 1/16 : 1FFh: 1/511 CKVAR_DIV[8:0] 1Fh(D0), 1Eh(D7-D0) Some functional blocks, circuits or constants may be omitted or simplified in the block diagram for explanatory purposes. Figure 4 Clock diagram 7. Frame rate TCM9001MD can operate 30 fps or less in VGA output mode. 8. Data Formats 2 The following data formats are available. Data format is selectable by I C commands. The data output supports parallel. Available parallel output: YUV422 and Raw V0.21 Dec. 12, 2008 12/40 Preliminary TCM9001MD 9. Functions 9.1. Window of interest The window of interest function enables the user to select a part of the image from the whole image area with specified location (2 pixel step) and specified size (8 pixel step). The available maximum size is 648 x 492 in RAW output or 640 x 480 (VGA) in YUV output mode and the available minimum size is 128 x 96 (subQCIF). 9.2. Image sizer The image sizer function enables the monitoring (sub sampling) mode on given image with scale factors of 1, 1/2, and 1/4. The available minimum image output is 128 x 96 (subQCIF). Monitoring (sub sampling) mode has a limited output format. This function can be used like a zoom function. Digital x2 zoom is available under QVGA or less monitoring operation and digital x2 and x4 zoom is available under QQVGA or less monitoring operation. 9.3. Picture flip 2 Horizontal and vertical flip modes are controlled by I C commands. Each flip mode is selectable separately as below. No. 0 1 2 3 Mode Original Horizontal flip Vertical flip Vertical and Horizontal flip (180 deg rotation) Table 7 Flip mode 9.4. Picture effects The picture effect function supports some kind of pictures with special effects as below. It is controlled by I2C bus commands. Normal / Monochrome / Negative / Sepia / Emboss / Sketch 9.5. Dynamic range adjustment Dynamic range adjustment function supports programmable black level adjustment, high luminance level signal compression and others. 9.6. Gamma correction Gamma correction function supports fixed gamma tables only. Fixed gamma table coefficients are 0.45, 0.55, and 0.65. V0.21 Dec. 12, 2008 13/40 Preliminary 9.7. TCM9001MD Auto luminance control Auto luminance control (ALC) function is also called Auto Exposure (AE) control. It enables the system to adjust the electrical shutter speed, digital gain and analog gain to adapt to the ambient light automatically to achieve proper brightness of the image. The luminance convergence level, sampling location, EV shift and others can be controlled via I2C bus. It also has manual mode. 9.8. Analog gain control Analog gain control is used to adjust the gain of the amplifier of pixel cell. It is often used in dark environment to increase brightness of the image automatically. It also has manual mode. 9.9. White balance Two modes are available for white balance control under different lighting conditions; manual white balance control and auto white balance control. In manual white balance control mode, it can specify the gain for each color to achieve special effects. In auto white balance control mode, the system supports the gain setting for the white balance based on limit conditions (such as sampling area and range of gain) specified by the user via I2C bus. 9.10. Auto flicker detection and correction Auto flicker detection and correction function can correct a fluorescent flicker for both AC 50Hz and 60Hz automatically. However, it is impossible to detect a flicker when shutter speed is faster than 1/100s (Very brighter condition). 9.11. Statistical data output ALC statistical data are calculated in ISP every frame continuously. The region for calculating is selectable from all area, center only and center weighted mode. The statistical data can be read via I2C bus in read mode. AWB statistical data is also calculated in ISP every frame continuously. 9.12. Color separation Color separation function separates color from sensor bayer arrangement. 9.13. Color matrix Color matrix can adjust each color via I2C bus. It can control 6 factors. 9.14. Edge enhancement Edge enhancement can emphasize edges in an image. It can be set V edge and H edge independently. It also can adjust an enhancement level via I2C bus. V0.21 Dec. 12, 2008 14/40 Preliminary 9.15. TCM9001MD Brightness and contrast Brightness and Contrast can be adjusted via I2C bus. 9.16. Lens shading correction The lens shading function can change the pixel gain of off center area to compensate the loss caused by lens shading effect. The correction gain and starting location are programmable across the shading area via I2C bus. It can be set V and H separately. 9.17. Blemish correction Blemish correction supports to correct fixed white and black pixels automatically. 9.18. Test charts For connection test, it has built-in color bar charts, color/grayscale ramp charts and others. 9.19. Test pattern output For connection test of input/output terminals, it is available to output 1/0 value via I2C bus. V0.21 Dec. 12, 2008 15/40 TCM9001MD Preliminary 10. 10.1. Timing Chart Power management modes OPERATING MODE 1. STANDBY : 0h => 1h 2. SLEEP : 0h => 1h 3. I2C Command Initial Setting 1. SLEEP : 1h => 0h 2. STANDBY : 1h => 0h STANDBY MODE 1. EXTCLK : On 2. PWRDWN : H => L 3. RESET : L => H 1. RESET : H => L 2. PWRDWN : L => H 3. EXTCLK : Off POWER DOWN MODE 1. 2. 3. 4. IOVDD DVDD AVDD PWRDWN : On : On : On : L => H 1. 2. 3. 4. AVDD DVDD PWRDWN IOVDD : Off : Off : H => L : Off POWER OFF MODE Figure 5 Power management states Mode OPERATING MDOE STANDBY MODE POWER DOWN MODE POWER OFF MDOE Comment All circuits are active. Internal digital circuits and clock control circuits are Disable for low power consumption while STANDBY and SLEEP registers are set to "0". All power are set. Clock is not provided. All power supplies are turned off . Table 8 Power management mode V0.21 Dec. 12, 2008 16/40 TCM9001MD Preliminary 10.2. Power on/off sequence 10.2.1. Power on sequence (w/ built-in regulator) IOVDD (1.8V0.1V or 2.8V0.2V) DVDD (1.8V0.1V) > 0ns AVDD 2.8V0.2V) > 0ns > 0ns PWRDWN > 1msec > 0ns EXTCLK RESET > 2msec High-Z DATA out Output Data I2C Commands > 2ms Slave:7Ch Setting Comannds STANDBY = `1h' SLEEP = `1h' *These commans should be written from host. Figure 6.1 Power on sequence (w/ built-in regulator) 10.2.2. Power off sequence (w/ built-in regulator) > 0ns RESET PWRDWN > 0ns > 0ns EXTCLK > 0ns AVDD 2.8V0.2V) > 0ns DVDD (1.8V0.1V) > 0ns IOVDD (1.8V0.1V or 2.8V0.2V) DATA out Data High-Z Figure 6.2 Power off sequence (w/ built-in regulator) V0.21 Dec. 12, 2008 17/40 Preliminary 10.3. TCM9001MD Output signal waveform It can be output DCLK during blanking pulse low. It means DCLK is output continuously. Figure 7 Example of output waveform (VGA output) V0.21 Dec. 12, 2008 18/40 Preliminary 11. TCM9001MD Register descriptions Slave address = 7Ch/7Dh Sub Add. (Hex) bit Register name 00 01 02 03 D7-0 D7-0 D7-0 D7 VER_NUM [7:0] VER_NUM[15:8] ALCDATA[7:0] ALC_AC5060 04 05 D6-4 D3-2 D1-0 D7-0 D7-4 D3-0 D7-0 D7-0 ALC_LES_MODE[2:0] Reserved ALCDATA[9:8] ALC_AGOUT[7:0] Reserved ALC_AGOUT[11:8] ALC_DGOUT[7:0] ALC_ESOUT[7:0] 06 07 08 D7-6 Reserved D5-0 ALC_ESOUT[13:8] 09 0A 0B 0C D7-0 D7-0 D7-0 D7-6 D5-0 AWB_UOUT[7:0] AWB_UOUT[15:8] AWB_UOUT[23:16] Reserved AWB_UOUT[29:24] 0D 0E 0F 10 D7-0 D7-0 D7-0 D7-6 D5-0 AWB_VOUT[7:0] AWB_VOUT[15:8] AWB_VOUT[23:16] Reserved AWB_VOUT[29:24] 11 12 13 14 15 16 17 18 D7-0 D7-0 D7-3 D2-0 D7-0 D7-0 D7-0 D7-0 D7 AWB_PIXOUT[7:0] AWB_PIXOUT[15:8] Reserved AWB_PIXOUT[18:16] AWB_RGOUT[7:0] AWB_GGOUT[7:0] AWB_BGOUT[7:0] Reserved STANDBY 19 1A D6-0 Reserved D7-0 Reserved D7 VCO_STP_X 1B D6-0 Reserved D7-4 Reserved D3-0 CKREF_DIV[3:0] 1C D7-0 Reserved V0.21 Dec. 12, 2008 Description Chip version identification Shows internal ALC accumulated data. (Lower bits) Shows internal detection result on Flicker detection. 0h: 50Hz detected 1h: 60Hz detected Shows current LES mode. Reserved Shows internal ALC accumulated data. (Upper bits) Shows the analog gain status of ALC. (Lower bits) Reserved Shows the analog gain status of ALC. (Upper bits) Shows the digital gain status of ALC. Shows the accumulated number of electrical shutter lines. (Lower bits) Reserved Shows the accumulated number of electrical shutter lines. (Upper bits) Shows the accumulated value of U signal referred as AWB. (Lower bits) Reserved Shows the accumulated value of U signal referred as AWB. (Upper bits) Shows the accumulated value of V signal referred as AWB. (Lower bits) Reserved Shows the accumulated value of V signal referred as AWB. (Upper bits) Shows the number of pixels referred as AWB. (Lower bits) Reserved Shows the number of pixels referred as AWB. (Upper bits) Shows the R gain for white balance. Shows the G gain for white balance. Shows the B gain for white balance. Reserved Software standby mode SW 0h: Standby 1h: Normal Reserved Reserved VCOPLL core SW 0h: Stop 1h: Active Reserved Reserved PLL divider control for reference clock (EXTCLK) 0h: 1/5 Fh: 1/20 Reserved Read Default only or (Hex) R/W R R R R 48 10 00 00 R R 00 00 R R 00 00 R 00 R R R R 00 00 00 00 R R R R 00 00 00 00 R R R 00 00 00 R R R R R/W 00 00 00 00 9C R/W R/W 04 90 R/W 00 R/W 00 19/40 Preliminary Sub Add. (Hex) 1D 1E 1F 20 bit Register name D7-5 Reserved D4 EXTCLK_THROUGH D3-0 Reserved D7-0 CKVAR_DIV[7:0] D7-1 Reserved D0 CKVAR_DIV[8] D7-6 VCO_DIV[1:0] D5-4 CLK_SEL[1:0] 21 22 D3-0 Reserved D7-0 Reserved D7 VFLIP D6 HFLIP D5-3 Reserved D2-0 HV_INTERMIT[2:0] 23 D7-0 H_COUNT[7:0] 24 D7-1 Reserved D0 H_COUNT[8] 25 D7-0 V_COUNT[7:0] 26 D7-3 Reserved D2-0 V_COUNT[10:8] 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 V0.21 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Dec. 12, 2008 TCM9001MD Description Reserved EXTCLK through mode to MRCK and SPCK 0h: OFF 1h: ON (Through) Reserved PLL divider control (Lower bits) 000h-00Fh: Not available 010h: 1/16 1FFh: 1/511 Reserved PLL divider control (MSB). See Sub-address 1Eh. VCO clock divider control 0h: 1/8 1h: 1/4 2h: 1/2 3h: 1 Clock SW to MRCK divider 0h: VCO (Normal) 1h: Reserved 2h: EXTCLK (for test) 3h: Reserved Reserved Reserved Vertical flip mode SW 0h: OFF 1h: ON Horizontal flip mode SW 0h: OFF 1h: ON Reserved Horizontal and vertical resize setting 0h-2h: x1/4 3h-6h: x1/2 7h: x1 Total number of horizontal pixels per line, including effective and blanking pixels (Lower bits) [Total H-pix / line] = H_COUNT[8:0] x 8 000h-095h: Not available 096h: 1200 pixels (Default) 1FFh: 4088 pixels Reserved Total number of horizontal pixels per line, including effective and blanking pixels (MSB) See Sub-address 23h. Total number of vertical lines per frame, including effective and blanking lines (Lower bits) [Total V-line / frame] = V_COUNT[10:0] x 8 000h-041h: Not available 042h: 528 lines (Default) 7FFh: 16376 lines Reserved Total number of vertical lines per frame, including effective and blanking lines (Upper bits) See Sub-address 25h. Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Read Default only or (Hex) R/W R/W 00 R/W 64 R/W 01 R/W C0 R/W R/W 0B 07 R/W 96 R/W 00 R/W 42 R/W 00 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 00 00 83 84 AE 21 00 04 7D 19 88 88 09 6C 20/40 Preliminary Sub Add. (Hex) 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 bit D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-3 Register name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved TP_MODE[4:0] D2-1 Reserved D0 TPG_LINE_SW 54 55 56 57 58 59 5A 5B 5C D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-4 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved LINE_RLV[3:0] D3-0 Reserved V0.21 Dec. 12, 2008 Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Test pattern selection 00h : Normal 01h-06h : Normal picture + Cross line 07h : Reserved 08h : Frame 09h-10h : Color-bar 11h-17h : Gray scale (with color) 18h : Color-bar (Horizontal ramp) 19h-1Fh : Horizontal and vertical ramp Reserved Test pattern of Center cross line 0h: OFF 1h: ON Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Red level setting for Center cross test pattern 0h: Min. Ch-Fh: Max. Reserved TCM9001MD Read Default only or (Hex) R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 00 0C 22 0B AA 0A 84 03 10 4C 1D 14 05 12 B0 3F 7F 44 44 00 E8 00 9F C0 24 52 71 0E 00 00 0E R/W R/W R/W R/W R/W R/W R/W R/W R/W 08 14 84 30 80 80 00 06 50 21/40 Preliminary Sub Add. (Hex) bit Register name 5D D7-4 LINE_GLV[3:0] 5E D3-0 Reserved D7-4 LINE_BLV[3:0] 5F 60 61 62 63 64 D3-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7 65 D6-0 Reserved D7-0 AGMIN_LDNR_WIDTH[7:0] 66 D7-0 AGMAX_LDNR_WIDTH[7:0] 67 D7-0 AGMIN_LDNR_MP[7:0] 68 D7-0 AGMAX_LDNR_MP[7:0] 69 6A 6B 6C 6D 6E 6F 70 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 71 D7-0 AGMAX_BLACK_ADJ[7:0] 72 D7-0 IDR_SET[7:0] 73 D7-0 PWB_RG[7:0] 74 D7-0 PWB_GRG[7:0] 75 D7-0 PWB_GBG[7:0] 76 D7-0 PWB_BG[7:0] 77 78 D7-0 Reserved D7 LSSC_SW 79 7A D6-0 Reserved D7-0 Reserved D7-0 Reserved V0.21 Reserved Reserved Reserved Reserved Reserved Reserved LDNR_SW Reserved Reserved Reserved Reserved Reserved Reserved Reserved AGMIN_BLACK_ADJ[7:0] Dec. 12, 2008 TCM9001MD Description Green level setting for Center cross test pattern 0h: Min. Ch-Fh: Max. Reserved Blue level setting for Center cross test pattern 0h: Min. Ch-Fh: Max. Reserved Reserved Reserved Reserved Reserved Reserved Random noise reduction SW 0h: OFF 1h: ON Reserved Slice level setting for Noise reduction while Analog gain condition is min. (=under high light) 00h: Min. FFh: Max. Slice level setting for Noise reduction while Analog gain condition is max. (=under low light) 00h: Min. FFh: Max. Gain setting for Noise reduction while Analog gain condition is min. (=under high light) 00h: Min. FFh: Max. Gain setting for Noise reduction while Analog gain condition is max. (=under low light) 00h: Min. FFh: Max. Reserved Reserved Reserved Reserved Reserved Reserved Reserved Fine setting for Black level while Analog gain condition is min. 00h: Min. FFh: Max. Fine setting for Black level while Analog gain condition is max. 00h: Min. FFh: Max. Saturation level setting 00h: 100% 55h: 130% FFh: 200% Preset WB setting for R pixels 00h: x1 80h: x2 FFh: x3 Preset WB setting for Gr pixels 00h: x1 80h: x2 FFh: x3 Preset WB setting for Gb pixels 00h: x1 80h: x2 FFh: x3 Preset WB setting for B pixels 00h: x1 80h: x2 FFh: x3 Reserved Lens shading correction SW 0h: OFF 1h: ON Reserved Reserved Reserved Read Default only or (Hex) R/W R/W A5 R/W 5A R/W R/W R/W R/W R/W R/W B0 00 1B 4E 04 90 R/W 30 R/W 30 R/W 66 R/W 66 R/W R/W R/W R/W R/W R/W R/W R/W C0 30 30 10 30 AB 30 80 R/W 80 R/W 55 R/W 00 R/W 04 R/W 04 R/W 62 R/W R/W 00 80 R/W R/W 52 4F 22/40 Preliminary Sub Add. (Hex) bit Register name 7B D7-0 LSSC_LEFT_RG[7:0] 7C D7-0 LSSC_LEFT_GG[7:0] 7D D7-0 LSSC_LEFT_BG[7:0] 7E D7-0 LSSC_RIGHT_RG[7:0] 7F D7-0 LSSC_RIGHT_GG[7:0] 80 D7-0 LSSC_RIGHT_BG[7:0] 81 D7-0 LSSC_TOP_RG[7:0] 82 D7-0 LSSC_TOP_GG[7:0] 83 D7-0 LSSC_TOP_BG[7:0] 84 D7-0 LSSC_BOTTOM_RG[7:0] 85 D7-0 LSSC_BOTTOM_GG[7:0] 86 D7-0 LSSC_BOTTOM_BG[7:0] 87 D7-2 Reserved D1-0 LSSC_MP_MODE[1:0] 88 89 8A D7-0 Reserved D7-0 Reserved D7-0 PP_BLACK_ADJ[7:0] 8B 8C 8D 8E 8F 90 91 D7-0 D7-0 D7-0 D7-0 D7-0 D7-0 D7 92 D6-0 Reserved D7-0 AGMIN_ANR_WIDTH[7:0] 93 D7-0 AGMAX_ANR_WIDTH[7:0] 94 D7-0 AGMIN_ANR_MP[7:0] 95 D7-0 AGMAX_ANR_MP[7:0] 96 D7 Reserved Reserved Reserved Reserved Reserved Reserved ANR_SW DTL_SW D6-0 Reserved V0.21 Dec. 12, 2008 TCM9001MD Description R gain on the left side for Lens shading correction 00h: Min. FFh: Max. G gain on the left side for Lens shading correction 00h: Min. FFh: Max. B gain on the left side for Lens shading correction 00h: Min. FFh: Max. R gain on the right side for Lens shading correction 00h: Min. FFh: Max. G gain on the right side for Lens shading correction 00h: Min. FFh: Max. B gain on the right side for Lens shading correction 00h: Min. FFh: Max. R gain on the top side for Lens shading correction 00h: Min. FFh: Max. G gain on the top side for Lens shading correction 00h: Min. FFh: Max. B gain on the top side for Lens shading correction 00h: Min. FFh: Max. R gain on the bottom side for Lens shading correction 00h: Min. FFh: Max. G gain on the bottom side for Lens shading correction 00h: Min. FFh: Max. B gain on the bottom side for Lens shading correction 00h: Min. FFh: Max. Reserved Gain setting for Lens shading correction 0h: x1/8 1h: x1/4 2h: x1/2 3h: x1 Reserved Reserved Black level setting after Lens shading correction 00h: Min. FFh: Max. Reserved Reserved Reserved Reserved Reserved Reserved Noise reduction SW 0h: OFF 1h: ON Reserved Slice level setting for Noise reduction while Analog gain condition is min. 00h: Min. FFh: Max. Slice level setting for Noise reduction while Analog gain condition is max. 00h: Min. FFh: Max. Gain setting for Noise reduction while Analog gain condition is min. 00h: Min. FFh: Max. Gain setting for Noise reduction while Analog gain condition is max. 00h: Min. FFh: Max. Edge enhancement SW 0h: OFF 1h: ON Reserved Read Default only or (Hex) R/W R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 00 R/W 01 R/W R/W R/W 00 00 40 R/W R/W R/W R/W R/W R/W R/W 09 E0 C0 80 C0 80 80 R/W 80 R/W 80 R/W 40 R/W 40 R/W 80 23/40 Preliminary Sub Add. (Hex) bit Register name 97 D7-0 AGMIN_HDTL_NC[7:0] 98 D7-0 AGMIN_VDTL_NC[7:0] 99 D7-0 AGMAX_HDTL_NC[7:0] 9A D7-0 AGMAX_VDTL_NC[7:0] 9B D7-0 AGMIN_HDTL_MG[7:0] 9C D7-0 AGMIN_HDTL_PG[7:0] 9D D7-0 AGMIN_VDTL_MG[7:0] 9E D7-0 AGMIN_VDTL_PG[7:0] 9F D7-0 AGMAX_HDTL_MG[7:0] A0 D7-0 AGMAX_HDTL_PG[7:0] A1 D7-0 AGMAX_VDTL_MG[7:0] A2 D7-0 AGMAX_VDTL_PG[7:0] A3 D7-0 PE_HVDTL_G[7:0] A4 D7 HCBC_SW A5 D6-0 Reserved D7-0 AGMIN_HCBC_G[7:0] A6 D7-0 AGMAX_HCBC_G[7:0] A7 A8 A9 D7-0 Reserved D7-0 Reserved D7-0 Reserved V0.21 Dec. 12, 2008 TCM9001MD Description Coring level setting for Horizontal edge enhancement while Analog gain condition is min. 00h: Min. FFh: Max. Coring level setting for Vertical edge enhancement while Analog gain condition is min. 00h: Min. FFh: Max. Coring level setting for Horizontal edge enhancement while Analog gain condition is max. 00h: Min. FFh: Max. Coring level setting for Vertical edge enhancement while Analog gain condition is max. 00h: Min. FFh: Max. Edge enhancement gain setting to Horizontal edges toward black while Analog gain condition is min. 00h: Min. FFh: Max. Edge enhancement gain setting for Horizontal edges toward white while Analog gain condition is min. 00h: Min. FFh: Max. Edge enhancement gain setting for Vertical edges toward black while Analog gain condition is min. 00h: Min. FFh: Max. Edge enhancement gain setting for Vertical edges toward white while Analog gain condition is min. 00h: Min. FFh: Max. Edge enhancement gain setting for Horizontal edges toward black while Analog gain condition is max. 00h: Min. FFh: Max. Edge enhancement gain setting for Horizontal edges toward white while Analog gain condition is max. 00h: Min. FFh: Max. Edge enhancement gain setting for Vertical edges toward black while Analog gain condition is max. 00h: Min. FFh: Max. Edge enhancement gain setting for Vertical edges toward white while Analog gain condition is max. 00h: Min. FFh: Max. Edge enhancement gain setting for Picture effect mode. It's valid while PIC_EFFECT = 5h, 6h or 7h. 00h: Min. FFh: Max. Horizontal carrier boost correction SW 0h: OFF 1h: ON Reserved Gain setting for Horizontal carrier boost correction while Analog gain condition is min. 00h: Min. FFh: Max. Gain setting for Horizontal carrier boost correction while Analog gain condition is max. 00h: Min. FFh: Max. Reserved Reserved Reserved Read Default only or (Hex) R/W R/W 07 R/W 03 R/W 07 R/W 03 R/W 80 R/W 20 R/W 40 R/W 10 R/W 80 R/W 20 R/W 40 R/W 10 R/W 80 R/W 82 R/W 55 R/W 55 R/W R/W R/W 80 80 80 24/40 Preliminary Sub Add. (Hex) AA bit Register name D7 LMCC_BMG_SEL D6 LMCC_BMR_SEL D5 D4 Reserved LMCC_GMB_SEL D3 LMCC_GMR_SEL D2 D1 Reserved LMCC_RMB_SEL D0 LMCC_RMG_SEL AB D7-0 LMCC_RMG_G[7:0] AC D7-0 LMCC_RMB_G[7:0] AD D7-0 LMCC_GMR_G[7:0] AE D7-0 LMCC_GMB_G[7:0] AF D7-0 LMCC_BMR_G[7:0] B0 D7-0 LMCC_BMG_G[7:0] B1 D7-6 GAM_SW[1:0] D5-2 Reserved D1 YUVM_AWBDISP_SW B2 B3 B4 D0 Reserved D7 Reserved D6-0 R_MATRIX[6:0] D7 Reserved D6-0 B_MATRIX[6:0] D7 UVG_SEL D6 BRIGHT_SEL D5-3 Reserved D2-0 PIC_EFFECT[2:0] B5 V0.21 D7-0 CONTRAST[7:0] Dec. 12, 2008 TCM9001MD Description B-G coefficient polarity SW for Color matrix 0h: B-G 1h: G-B B-R coefficient polarity SW for Color matrix 0h: B-R 1h: R-B Reserved G-B coefficient polarity SW for Color matrix 0h: G-B 1h: B-G G-R coefficient polarity SW for Color matrix 0h: G-R 1h: R-G Reserved R-B coefficient polarity SW for Color matrix 0h: R-B 1h: B-R R-G coefficient polarity SW for Color matrix 0h: R-G 1h: G-R R-G gain setting for Color matrix 00h: x0/256 FFh: x255/256 R-B gain setting for Color matrix 00h: x0/256 FFh: x255/256 G-R gain setting for Color matrix 00h: x0/256 FFh: x255/256 G-B gain setting for Color matrix 00h: x0/256 FFh: x255/256 B-R gain setting for Color matrix 00h: x0/256 FFh: x255/256 B-G gain setting for Color matrix 00h: x0/256 FFh: x255/256 Gamma correction SW and gain setting 0h: OFF 1h: 0.65 2h: 0.55 3h: 0.45 Reserved AWB test display SW. This register is used with IPIX_DISP_SW=1. 0h: OFF 1h: ON Reserved Reserved R matrix coefficient for Y signal generating Y = (R_MATRIX[6:0] / 256) R + (B_MATRIX[6:0] / 256) B + ((256 - R_MATRIX[6:0] - B_MATRIX[6:0]) / 256) G The value When 00h is as same as one when 01h. Reserved B matrix coefficient for Y signal generating Y = (R_MATRIX[6:0] / 256) R + (B_MATRIX[6:0] / 256) B + ((256 - R_MATRIX[6:0] - B_MATRIX[6:0]) / 256) G The value When 00h is as same as one when 01h. UV gain SW 0h: x0.5 1h: x1.0 Brightness adjusting range SW 0h: -/+127/10bit 1h: -/+1016/10bit Reserved Picture effect mode SW 0h: Normal 1h: Monochrome 2h: Sepia (Mono) 3h: Sepia (Color) 4h: Negative 5h: Emboss 6h: Black board sketch 7h: White board sketch Contrast setting for Y signal00h: x0 FFh: x4 Read Default only or (Hex) R/W R/W 09 R/W 04 R/W 10 R/W 04 R/W 08 R/W 40 R/W 40 R/W 40 R/W 4D R/W 1C R/W C8 R/W 40 25/40 Preliminary Sub Add. (Hex) bit Register name B6 D7-0 BRIGHT[7:0] B7 B8 B9 D7-0 Reserved D7-0 Reserved D7-0 U_GAIN[7:0] BA D7-0 V_GAIN[7:0] BB D7-0 SEPIA_US[7:0] BC D7-0 SEPIA_VS[7:0] BD D7-0 U_CORING[7:0] BE D7-0 V_CORING[7:0] BF D7 YDTL_SW D6 UVLPF_SW C0 D5-0 Reserved D7-0 YDTL_G[7:0] C1 C2 D7-0 Reserved D7 ALC_SW D6 C3 ALC_LOCK D5-0 Reserved D7-0 MES[7:0] C4 D7-6 Reserved D5-0 MES[13:8] C5 D7-0 MDG[7:0] C6 D7-0 MAG[7:0] C7 D7-6 AGCONT_SEL[1:0] D5-4 Reserved D3-0 MAG[11:8] C8 D7-0 AG_MIN[7:0] C9 D7-0 AG_MAX[7:0] V0.21 Dec. 12, 2008 TCM9001MD Description Brightness setting for Y signal 00h: -128 80h: -/+0 FFh: +127 Reserved Reserved Gain setting for U signal U = (B - Y) / 128 x U_GAIN[7:0] Gain setting for U signal V = (R - Y) / 128 x V_GAIN[7:0] DC offset level setting for U signal for Sepia effect picture 00h: -128 80h: -/+0 FFh: +127 DC offset level setting for V signal for Sepia effect picture 00h: -128 80h: -/+0 FFh: +127 Coring level setting for U signal (small signal will be compressed) 00h: Min. FFh: Max. Coring level setting for V signal (small signal will be compressed) 00h: Min. FFh: Max. Edge enhancement SW for high frequency components of Y signal 0h: OFF 1h: ON LPF SW for UV signals 0h: OFF 1h: ON Reserved Edge enhancement gain setting for high frequency components of Y signal 00h: Min. FFh: Max. Reserved ALC SW 0h: OFF 1h: ON Holds the exposure condition of ALC 0h: OFF 1h: ON (Lock) Reserved Manual exposure adjusting (Lower bits). It's valid while ALC_SW = OFF. 0000h: Min. 3FFFh: Max. Reserved Manual exposure adjusting (Upper bits). See Sub-address C3h. Manual Digital gain setting 00h: Min. FFh: Max. Manual Analog gain setting (Lower bits). It's valid while ALC_SW = OFF. 000h: Min. FFFh: Max Gain range setting for the changing gains according to AG condition. This setting affects AGMAX/MIN***G registers. 0h: Min. 3h: Max. Reserved Manual Analog gain setting (Upper bits). See Sub-address C6h. Min. limiter setting for Analog gain for ALC 00h: Min. FFh: Max. Max. limiter setting for Analog gain for ALC 00h: Min. FFh: Max. Read Default only or (Hex) R/W R/W 80 R/W R/W R/W 00 FF 48 R/W 5B R/W 78 R/W 90 R/W 03 R/W 03 R/W C0 R/W 00 R/W R/W 00 80 R/W 2C R/W 01 R/W 00 R/W 20 R/W 80 R/W 20 R/W 0F 26/40 Preliminary Sub Add. (Hex) CA bit D7 Register name AUTO_LES_SW D6-4 AUTO_LES_MODE[2:0] D3-2 ALC_WEIGHT[1:0] D1-0 FLCK_ADJ[1:0] CB D7-0 ALC_LV[7:0] CC D7-2 Reserved D1-0 ALC_LV[9:8] CD D7-0 ALC_LVW[7:0] CE D7-0 L64P600S[7:0] CF D7 Reserved D6-4 ALC_VWAIT[2:0] D3-0 L64P600S[11:8] D0 D7-0 UPDN_SPD[7:0] D1 D2 D7-0 Reserved D7-0 NEAR_SPD[7:0] D3 D4 D7-0 Reserved D7 AC5060 D6 Reserved D5-0 ALC_SAFETY[5:0] D5 D6 D7 D8 D9 DA DB V0.21 D7-0 D7-0 D7-4 D3 Reserved Reserved Reserved ACFDET D2-0 D7-0 D7-0 D7-0 D7-0 Reserved Reserved Reserved Reserved Reserved Dec. 12, 2008 TCM9001MD Description Auto long exposure SW 0h: OFF 1h: ON Time setting for Auto long exposure mode 0h: Min. (1V) 4h: Max. (16V) 5h-7h: Not available Weighted ALC measuring mode setting 0h: All pixels 1h: Central pixels only 2h: Not available 3h: Central pixels weighted This register should be set according to the frame rate for flicker less condition. 0h: Frame rate < 3.75 fps 1h: 3.75 =< Frame rate < 7.5 fps 2h: 7.5 =< Frame rate < 15 fps 3h: 15 =< Frame rate < 30 fps ALC convergence level setting (Lower bits) 000h: Min. 3FFh: Max. Reserved ALC convergence level setting (Upper bits) See Sub-address CBh. Insensitive range setting for ALC convergence level 00h: Min. FFh: Max. Sets the number of lines for 8/100 sec. (for AC 50Hz) or 8/120 sec (for AC 60Hz) (Lower bits) 866h: 2150 Line (Default) 867h-FFFh: Invalid Reserved Waiting time setting to stop ALC for a certain time at condition change 0h: Min. 7h: Max. Sets the number of lines for 8/100 sec. (Upper bits). See Sub-address CEh. ALC convergence speed setting 00h: Min. FF Max. Reserved ALC convergence speed setting near the convergence level 00h: Min. FF Max. Reserved Manual setting for AC50/60Hz. While ACFDET = ON, this register is set as the initial AC mode setting for Auto flicker detection. 0h: AC 50Hz mode 1h: AC 60Hz mode Reserved Continuous alteration detection period setting to avoid ALC restarting for an instant luminance alternation 00h: Min. 3Fh: Max. Reserved Reserved Reserved Auto flicker detection SW 0h: OFF (Manual setting by AC5060) 1h: ON (The initial condition is given by AC5060) Reserved Reserved Reserved Reserved Reserved Read Default only or (Hex) R/W R/W 03 R/W E0 R/W 11 R/W 0A R/W 99 R/W 06 R/W 80 R/W R/W 20 80 R/W R/W 30 8A R/W R/W R/W 02 4F 08 R/W R/W R/W R/W 08 FF 01 00 27/40 Preliminary Sub Add. (Hex) DC DD DE bit Register name D7-0 Reserved D7-0 Reserved D7 AWB_SW D6 AWB_LOCK DF D5-0 Reserved D7-0 WB_MRG[7:0] E0 D7-0 WB_MGG[7:0] E1 D7-0 WB_MBG[7:0] E2 D7-0 WB_RBMIN[7:0] E3 D7-0 WB_RBMAX[7:0] E4 D7 HEXA_SW D6 Reserved D5-4 COLGATE_RANGE[1:0] D3-1 Reserved D0 COLGATE_OPEN E5 D7 Reserved D6-0 RYCUTM[6:0] E6 D7 Reserved D6-0 RYCUTP[6:0] E7 D7 Reserved D6-0 BYCUTM[6:0] E8 D7 Reserved D6-0 BYCUTP[6:0] E9 D7-0 RBCUTL[7:0] EA D7-0 RBCUTH[7:0] V0.21 Dec. 12, 2008 TCM9001MD Description Reserved Reserved Auto white balance SW 0h: OFF 1h: ON Holds Auto white balance condition 0h: OFF (AWB active) 1h: ON (AWB freeze) Reserved R gain setting for manual WB 00h: Min. FFh: Max. G gain setting for manual WB 00h: Min. FFh: Max. B gain setting for manual WB 00h: Min. FFh: Max. Lower limit gain setting for RB gain on AWB 00h: Min. FFh: Max. Upper limit gain setting for RB gain on AWB 00h: Min. FFh: Max. Hexagonal color detection gate SW 0h: OFF 1h: ON (Hexagonal gate active) Reserved Range SW for Hexagonal color detection gate setting 0h: 1 pixel/step (total range: -127 to 127 pixels) 1h: 2 pixel/step (total range: -254 to 254 pixels) 2h: 4 pixel/step (total range: -508 to 508 pixels) 3h: 8 pixel/step (total range: -1016 to 1016 pixels) Reserved Opens the color detection gate 0h: OFF (Color gate active) 1h: ON (Opens gate, Color gate setting invalid) Reserved Lower limit level setting for R-Y of Hexagonal color detection gate 00h: Narrowest FFh: Widest Reserved Upper limit level setting for R-Y of Hexagonal color detection gate 00h: Narrowest FFh: Widest Reserved Lower limit level setting for B-Y of Hexagonal color detection gate 00h: Narrowest FFh: Widest Reserved Upper limit level setting for B-Y of Hexagonal color detection gate 00h: Narrowest FFh: Widest Lower cross point on R-Y axis setting for Hexagonal color detection gate 80h: Widest 00h: Center 7Fh: Narrowest Upper cross point on R-Y axis setting for Hexagonal color detection gate 80h: Narrowest 00h: Center 7Fh: Widest Read Default only or (Hex) R/W R/W R/W R/W 14 00 80 R/W 80 R/W 80 R/W 80 R/W 40 R/W FF R/W 90 R/W 20 R/W 50 R/W 38 R/W 20 R/W F0 R/W 18 28/40 Preliminary Sub Add. (Hex) EB bit Register name D7 SQ_SW D6 SQ_POL D5-1 Reserved D0 YGATE_SW EC D7-0 RYCUTL[7:0] ED D7-0 RYCUTH[7:0] EE D7-0 BYCUTL[7:0] EF D7-0 BYCUTH[7:0] F0 D7-0 YGATE_L[7:0] F1 D7-0 YGATE_H[7:0] F2 D7-6 Reserved D5 IPIX_DISP_SW F3 D4-0 Reserved D7-5 Reserved D4-0 AWB_U_UPDNLV[4:0] F4 D7-5 Reserved D4-0 AWB_V_UPDNLV[4:0] F5 D7-0 AWB_WAIT[7:0] F6 D7-0 AWB_SPDDLY[7:0] F7 D7-6 Reserved D5-0 AWB_SPD[5:0] F8 F9 FA V0.21 D7 AWB_HUE_COR D6 D5 Reserved AWBSPD_FIX D4-0 Reserved D7-0 Reserved D7-0 H_START[7:0] Dec. 12, 2008 TCM9001MD Description Square color detection gate SW 0h: OFF 1h: ON Color detection mode SW for Square color detection gate 0h: Subtracts Square gate area from Hexagonal one 1h: Adds Square gate area to Hexagonal one Reserved Luminance detection gate SW 0h: OFF (Opens gate) 1h: ON Lower R-Y level setting for Square color detection gate 80h: Widest 00h: Center 7Fh: Narrowest Upper R-Y level setting for Square color detection gate 80h: Narrowest 00h: Center 7Fh: Widest Lower B-Y level setting for Square color detection gate 80h: Widest 00h: Center 7Fh: Narrowest Upper B-Y level setting for Square color detection gate 80h: Narrowest 00h: Center 7Fh: Widest Lower luminance level setting for Luminance detection gate 00h: Lowest (Widest) FFh: Highest (Narrowest) Upper luminance level setting for Luminance detection gate 00h: Lowest (Narrowest) FFh: Highest (Widest) Reserved Displays the pixels for AWB accumulation. This register is used with YUVM_AWBDISP_SW=1. 0h: OFF 1h: ON Reserved Reserved Coring level setting for Up/Down detection on B gain of AWB 00h: Low level 1Fh High level Reserved Coring level setting for Up/Down detection on R gain of AWB 00h: Low level 1Fh High level Waiting time setting for Auto white balance 00h: No waiting time 80h: 128 frames FEh 254 frames FFh: Not available Controls AWB convergence time. 00h: Short FFh: Long Reserved AWB convergence speed setting 00h: Slow FFh: Fast Locks AWB to prevent WB from being unbalance when RB gain reach upper or lower limit. 0h: OFF 1h: ON Reserved Fixed AWB convergence speed SW 0h: Slower near convergence level 1h: Constant speed Reserved Reserved Horizontal picture start position setting [H start point] = H_START[7:0] x 2 + 1 Read Default only or (Hex) R/W R/W 01 R/W 00 R/W 00 R/W 00 R/W 00 R/W 30 R/W FF R/W 00 R/W 08 R/W 08 R/W 10 R/W 00 R/W 20 R/W 86 R/W R/W 00 41 29/40 Preliminary Sub Add. (Hex) bit Register name FB D7 Reserved D6-0 H_WIDTH[6:0] FC D7-0 V_START[7:0] FD D7-6 Reserved D5-0 V_HEIGHT[5:0] FE D7-4 PIC_FORMAT[3:0] FF D3-0 Reserved D7 SLEEP D6 Reserved D5-4 PARALLEL_OUTSW[1:0] D3 DCLK_POL D2-0 Reserved V0.21 Dec. 12, 2008 TCM9001MD Description Reserved Horizontal picture size setting [H width] = H_WIDTH[6:0] x 8 Vertical picture start position setting [V start point] = V_START[7:0] x 2 + 1 Reserved Vertical picture size setting [V height] = V_HEIGHT[5:0] x 8 Picture output format setting 0h: Raw-6 (Time shared 10bit) 1h: YUV422 (6bit) 4h: Raw-8 (Time shared 10bit) 5h: YUV422 (8bit) 8h: Raw-8 (8bit) 2h, 3h, 6h, 7h, 9h-Fh: Reserved Reserved Software standby setting. Set this register with STANDBY. 0h: ON (Standby) 1h: OFF (Normal) Reserved Data output test mode SW 0h: Normal 1h: All L 2h: All H 3h: All High-Z DCLK output polarity SW 0h: Normal 1h: Inverted Reserved Read Default only or (Hex) R/W R/W 50 R/W 0C R/W 3C R/W 50 R/W 35 30/40 TCM9001MD Preliminary 12. 12.1. Electrical Characteristics Absolute Maximum Ratings Items Symbol Rating -0.3 to 3.6 Power supply voltage AVDD DVDD IOVDD DVDD15 AVDD15 -0.3 to 3.0 Vin Iin Tstg -0.3 to IOVDD+0.3 +/- 20 -30 to 85 Input voltage Input current of protection diode Storage temperature Unit V mA The absolute maximum ratings of a semiconductor device are a set of specified parameter values, which must not be exceeded during operation, even for an instant. If any of these rating would be exceeded during operation, the device electrical characteristics may be irreparably altered and the reliability and lifetime of the device can no longer be guaranteed. Moreover, these operations with exceeded ratings may cause break down, damage and/or degradation to any other equipment. Applications using the device should be designed such that each maximum rating will never be exceeded in any operating conditions. Before using, creating and/or producing designs, refer to and comply with the precautions and conditions set forth in this documents. 12.2. Operating Conditions Item Power supply voltage Input voltage Operating temperature *1 Functional temperature *2 AVDD Min. 2.6 Rating Typ. 2.8 Max. 3.0 DVDD 1.7 1.8 1.9 IOVDD *3 1,7 2.6 1.8 2.8 1.9 3.0 1.4 1.5 1.6 0 -20 to 60 -30 to 70 IOVDD Symbol DVDD15 *4 AVDD15 *4 Vin Topr Tfunc Unit V Notes: *1: Operating temperature is the temperature range that performance is guaranteed. *2: Functional temperature is the temperature range that function is guaranteed, however performance is not guaranteed. *3: The power supply for IOVDD is 1.8V -/+ 0.1V or 2.8V -/+ 0.2V. *4 In case the build-in regulator is not used. V0.21 Dec. 12, 2008 31/40 TCM9001MD Preliminary 12.3. DC Characteristics Condition: Ta=25 degree C AVDD=2.8V, DVDD =1.8V, IOVDD=1.8V Items Current consumption EXTCLK input voltage (sine wave)* EXTCLK input (square wave) DATA output HSYNC, VSYNC output DCLK output RESET input PWRDWN input SCL input SDA input/output Symbol Conditions Min. Rating Typ. Max. - 30 5.1 8 500 50 50 10 10 10 mA mA mA A A A A A A DVDD IOVDD AVDD DVDD IOVDD AVDD DVDD IOVDD AVDD IDVDD NORMAL IIOVDD NORMAL IAVDD NORMAL IDVDD SW STBY IIOVDD SW STBY IAVDD SW STBY IDVDD HW STBY IIOVDD HW STBY IAVDD HW STBY Power down mode (Hardware standby) - Peak to peak voltage Vpp CLK - 0.5 - 1.2 V Low level input voltage VIL CLK - - - IOVDDx0.2 V High level input voltage VIH CLK - IOVDDx0.8 - - V Low level output voltage VOL DOUT VOH DOUT VOL SYNC VOH SYNC - IOVDDx0.8 - - IOVDDx0.2 IOVDDx0.2 V V V - IOVDDx0.8 - - V VOL DCLK VOH DCLK VIL RESET VIH RESET VIL PWRDWN VIH PWRDWN VIL SCL VIH SCL VIL SDA VIH SDA VOL SDA - IOVDDx0.8 IOVDDx0.8 IOVDDx0.8 IOVDDx0.8 IOVDDx0.8 - - IOVDDx0.2 IOVDDx0.2 IOVDDx0.2 IOVDDx0.2 IOVDDx0.2 0.4 V V V V V V V V V V V High level output voltage Low level output voltage High level output voltage Low level output voltage High level output voltage Low level input voltage High level input voltage Low level input voltage High level input voltage Low level input voltage High level input voltage Low level input voltage High level input voltage Low level output voltage Normal, 30fps, VGA Standby mode (Software standby) *Note: In case of a sine wave using for EXTCLK, a coupling capacitor is required with the input terminal. V0.21 Unit Dec. 12, 2008 32/40 TCM9001MD Preliminary 12.4. AC Characteristics 12.4.1. EXTCLK input conditions Items EXTCLK frequency Fall time Clock duty Symbol fEXTCLK tf;CLK DUTYEXTCLK Condition With built-in PLL - Min. 9.0 45/55 Typ. - Max. 26.0 5 55/45 Unit MHz ns % Table 9 EXTCLK input conditions 0V V pp:CLK fEXTCLK Note: In case of a sine wave using for EXTCLK, a coupling capacitor is required with the input terminal. Figure 8 EXTCLK waveform (Sine wave) f EXTCLK 100% 80% V pp:CLK 20% 0% tr:CLK tf:CLK 50% A B DUTY EXTCLK=A/(A+B):B/(A+B) Figure 9 EXTCLK waveform (Square wave) V0.21 Dec. 12, 2008 33/40 TCM9001MD Preliminary 12.4.2. SDA and SCL Items Symbol Min. Max. Unit Clock frequency fSCL 0 400 KHz Low period tLOW;SCL 1.3 - s High period tHIGH;SCL 0.6 - s Rise time tr;SCL - 300 ns Fall time tf;SCL - 300 ns Rise time tr;SDA - 300 ns Fall time tf;SDA - 300 ns Hold time(repeated) START condition After this period, the first clock pulse is generated tHD;STA 0.6 - s Setup time for a repeated START condition tSU;STA 0.6 - s Data hold time tHD;DAT 0 - ns Data setup time tSU;DAT 100 - ns Setup time for STOP condition tSU;STO 0.6 - s Normal tSP1 0 50 ns Wake-up from sleep mode tSP2 0 20 ns SCL SDA Width of spike pulse Notes *1 *1) All values referred to VIHmin and VILmax levels Table 10 SDA and SCL SDA tf tr tSU;DAT tf tHD;STA tSP tr tBUF tLOW SCL tHD;STA tHD;DAT START tHIGH tSU;STA tSU;STO RE-START STOP START Figure 10 SDA and SCL V0.21 Dec. 12, 2008 34/40 TCM9001MD Preliminary 12.4.3. DATA7 to DATA0, DCLK, HSYNC and VSYNC Items Symble Rise time tr:DCLK DCLK Fall time tf:DCLK DATA0 to 7 Rise time Tr:DATA HSYNC and VSYNC Fall time tf:DATA Setup time of data tpd:SU Hold time of data tpd:HD *1 All values referred to VOHmin and VOLmax levels. Min. 10 10 Max. 6 6 6 6 - Unit ns ns ns ns ns ns Notes *1 Table 11 DCLK and DATA out T f;DCLK T r;DCLK V OH;DCLK DCLK V OL;DCLK T pd:SU T pd:HD V OH;DATA DATA V OL;DATA T r;DATA ,T f;DATA Figure 11 DCLK and DATA out V0.21 Dec. 12, 2008 35/40 TCM9001MD Preliminary 13. Reference of Application Circuit (1 .8V typ . or 2 .8V typ .) IOVDD A 2 IOVDD DCLK A 3 (1.8 V typ .) DVDD B 6 DVDD HSYNC D 1 HSYNC E 5 AVDD VSYNC D 2 VSYNC DATA 0 B 3 DATA 0 DATA 1 B 1 DATA 1 (2 .8 V typ .) AVDD F 1 0. F 1 0. F 1 0. DCLK EXTCLK B 5 EXTCLK DATA 2 B 2 DATA 2 PWRDWN C 6 PWRDWN DATA 3 B 4 DATA 3 DATA 4 C1 DATA 4 DATA 5 C2 DATA 5 DATA 6 C3 DATA 6 DATA 7 D 4 DATA 7 RESET D 3 RESET SDA C 5 SDA SCL D 6 SCL F 1 0. TCM 9001 MD A 5 VDD 15 GND A 4 E 4 VDD 15 GND C4 GND E 2 GND E 3 Figure 12 Reference of application circuit V0.21 Dec. 12, 2008 36/40 Preliminary 14. TCM9001MD Characteristics of Lens ITEM Optical format Horizontal Field of view Vertical Diagonal F number TV distortion Focal length Manual focusing Structure VALUE 1/10 67.0 F2.8 -0.6 1.3546 Fixed focus Doublet lens UNITS inch degree degree degree % mm - Note: The optical values are obtained by simulation. Table 12 Characteristics of Lens V0.21 Dec. 12, 2008 37/40 Preliminary 15. TCM9001MD Module dimensions Unit: mm V0.21 Dec. 12, 2008 38/40 Preliminary 16. TCM9001MD Instruction for the Camera Module handling 1. Use a wrist strap for human body grounding while at work. 2. Do not touch the surface of lens with finger or hand to keep the lens clean. 3. Do not put stress on the lens block to keep optical performance. 5. Do not drop the camera module on the floor which causes breaking and flaw. 5. Pick up the edge of lens holder with fingers carefully if it is necessary for the assembly by direct handling. 6. Do not expose to strong light, such as the sun for long periods. These will be influence the optical characteristics. RESTRICTIONS ON PRODUCT USE The information contained herein subject to change without notice. The TOSHIBA is continuously working to improve the quality and reliability of its products. Nevertheless, semiconductor device in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in marking a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling guide for Semiconductor devices", or "TOSHIBA Semiconductor Reliability Handbook" etc. The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliance, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all type of safety devices, etc.. Unintended Usage of TOSIHBA products listed in this document shall be made at the customer's own risk. The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties. Please use this product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. The products described in this document are subject to foreign exchange and foreign trade control laws. V0.21 Dec. 12, 2008 39/40 Preliminary TCM9001MD Revision History Revision Date Comments V0.1 V0.21 Sep 29, 2008 Dec 12, 2008 New Amended the Characteristics of Lens in page 37. Amended the Module dimensions in page 38. V0.21 Dec. 12, 2008 40/40