General Description
The MAX19586/MAX19588 evaluation kits (EV kits) are
fully assembled and tested PCBs that contain all the
components necessary to evaluate the performance of
the MAX19586 and MAX19588. The MAX19586 is a
16-bit, 80Msps analog-to-digital converter (ADC), while
the MAX19588 is a 16-bit, 100Msps ADC. The
MAX19586/MAX19588 EV kits can accept a differential
or single-ended analog input. For applications with a
single-ended signal source, the MAX19586/MAX19588
EV kits feature an on-board transformer that converts
this signal to the required differential signal. The digital
outputs produced by the MAX19586/MAX19588 can be
captured with a logic analyzer or data-acquisition sys-
tem. The EV kits operate from a 3.3V and a 1.8V power
supply.
Features
♦Fully Assembled and Tested
♦Up to 80Msps/100Msps Sampling Rate
♦Single-Ended-to-Differential Clock Conversion
Circuitry
♦Configurable for Differential or Single-Ended
Analog Input Signals
♦On-Board Digital Output Buffer
♦Low-Voltage and Low-Power Operation
♦Simplifies Evaluation of the MAX19586/MAX19588
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
________________________________________________________________ Maxim Integrated Products 1
19-4015; Rev 1; 12/06
Component List
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Ordering Information
+Denotes a lead-free and RoHS-compliant EV kit.
*This limited temperature range is for the EV kit PCB only.
The MAX19586MAX19588 IC temperature range is -40°C
to +85°C.
**EP = Exposed paddle.
PART
TEMP RANGE
IC PACKAGE
MAX19586EVKIT+
0°C to +70°C*
56 Thin QFN-EP**
MAX19588EVKIT+
0°C to +70°C*
56 Thin QFN-EP**
DESIGNATION QTY DESCRIPTION
C1, C6, C10,
C18, C28–C33 10
0.1µF ±10%, 50V X7R ceramic
capacitors (0603)
TDK C1608X7R1H104K
C2–C5, C8,
C9, C11, C12 0 Not installed capacitors (0603)
C13, C14 2
1µF ±10%, 16V X5R ceramic
capacitors (0603)
TDK C1608X5R1C105K
C19, C22, C25 3
220µF ±20%, 6.3V low-ESR tantalum
capacitors (D-case)
AVX TPSD227M006R0100
C20, C23, C26 3
47µF ±20%, 6.3V X5R ceramic
capacitors (1210)
TDK C3225X5R0J476M
C21, C24, C27 3
2.2µF ±20%, 6.3V X5R ceramic
capacitors (0603)
TDK C1608X5R0J225M
DESIGNATION QTY DESCRIPTION
C34, C38,
C39, C40 4
0.01µF ±10%, 16V X7R ceramic
capacitors (0306)
TDK C0816X7R1C103K
C35, C36, C41,
C42, C43 5
0.1µF ±20%, 16V X7R ceramic
capacitors (0306)
TDK C0816X7R1C104M
C37 1
0.1µF ±10%, 6.3V X5R ceramic
capacitor (0201)
TDK C0603X5R0J104K
Murata GRM33R60J104K
D1 1
15mA, 70V , d ual S chottky d iod e ( S OT23)
Diodes Inc. BAS70-04 or
Central Semiconductor CMPD6263S
C LOC K, IN P U T+ 2 SMA PC mount connectors
INPUT- 0 N ot i nstal l ed S M A P C m ount connector
J1, J2 2 2-pin headers
J3, J4 2 2 x 8-pin headers
Part Selection Table
PART NUMBER BITS
SPEED (Msps)
MAX19586ETN+ 80
MAX19588ETN+ 16 100
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
2 _______________________________________________________________________________________
Component Suppliers
Component List (continued)
DESIGNATION
QTY
DESCRIPTION
J5 1 2 x 20-pin header
J6 1 PCB pin strip, 6 pins, 5mm pitch,
250V, 10A
L1, L2, L3 3 EMI filters (1806)
Murata NFM41PC204F1H3B
L4 0 Not installed, high-Q chip inductor
(0603)
R1–R5, R8,
R9, R13 0 Not installed, resistors (0603)
R6, R7,
R10, R11 4 49.9Ω ±1% resistors (0603)
R12 1 10kΩ ±1% resistor (0603)
R14 1 120Ω ±5% resistor (0603)
R15 1 49.9Ω ±1% resistor (0402)
RA1, RA2 2 120Ω ±5% resistor arrays
Panasonic EXB-2HV-121J
DESIGNATION QTY DESCRIPTION
T1, T3 2 1:2 RF transformers
Mini-Circuits ADT2-1T+
T2 1 1:1 RF transformer
Mini-Circuits T1-1T-KK81+
U1 1 See the EV Kit-Specific Component
List section
U2 1
Low-voltage, 22-bit register
(64-pin TSSOP)
Fairchild 74VCX16722MTD
U3 1
TinyLogic ULP-A inverter with
Schmitt trigger input (SC70-5)
Fairchild NC7SV14P5X
—1
P C b oar d ter m i nal b l ock ( p l ug onto the
J6 p i n str ip ) 6 p i ns, 5m m pi tch, 250V , 10A
—1
PCB: MAX19586/MAX19588
evaluation kits+
SUPPLIER PHONE WEBSITE
AVX Corp. 843-946-0238 www.avxcorp.com
Central Semiconductor Corp. 631-435-1110 www.centralsemi.com
Diodes Inc. 805-446-4800 www.diodes.com
Fairchild Semiconductor 888-522-5372 www.fairchildsemi.com
Mini-Circuits 718-934-4500 www.minicircuits.com
Murata Mfg. Co., Ltd. 770-436-1300 www.murata.com
Panasonic Corp. 714-373-7366 www.panasonic.com
TDK Corp. 847-803-6100 www.component.tdk.com
Note: Indicate that you are using the MAX19586/MAX19588 when contacting these component suppliers.
EV Kit-Specific Component List
EV KIT PART NUMBER REFERENCE
DESIGNATOR DESCRIPTION
MAX19586EVKIT+ MAX19586ETN+ (56-pin, 8mm x 8mm x 0.8mm Thin QFN-EP**)
MAX19588EVKIT+ U1 MAX19588ETN+ (56-pin, 8mm x 8mm x 0.8mm Thin QFN-EP**)
**EP = Exposed paddle.
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
_______________________________________________________________________________________ 3
Quick Start
Recommended Equipment
• DC power supplies:
Analog (AVDD) 3.3V, 500mA
Digital (DVDD) 1.8V, 100mA
Logic (VL) 1.8V, 100mA
• Signal generator with low phase noise and low jitter
for clock input (e.g., HP/Agilent 8644B)
• Signal generator for analog signal input (e.g.,
HP/Agilent 8644B)
• Analog bandpass filters for input signal and clock
signal (e.g., Allen Avionics, K&L Microwave)
• Logic analyzer or data-acquisition system (e.g., HP/
Agilent 16500C, Tektronix TLA621)
Note: The Quick Start procedure in this section
only provides a quick functional check for the
MAX19586/MAX19588 EV kits. To verify the full
dynamic performance of the MAX19586/MAX19588,
refer to the Testing the MAX1958_ sections in the
respective IC data sheets.
Procedure
The MAX19586/MAX19588 EV kits are fully assembled
and tested PCBs. Follow the steps below to verify
board operation (Figure 1). Caution: Do not turn on
power supplies or enable signal generators until all
connections are completed.
1) Connect the output of the clock signal generator to
the input of the clock bandpass filter.
2) Connect the output of the clock bandpass filter to
the CLOCK SMA connector on the EV kit.
3) Connect the output of the analog signal generator
to the input of the analog bandpass filter.
4) Connect the output of the analog bandpass filter to
the INPUT+ SMA connector on the EV kit.
5) Connect header J5 to the HP/Agilent logic analyz-
er. Alternatively, for Tektronix-type logic analyzers,
connect to headers J1, J3, and J4. To capture the
DOR bit (data over-range), connect a free logic
analyzer data line to header J2. See the Digital
Output Signals section in this document for bit
locations and all header designations.
6) Connect the 3.3V, 500mA power supply to the
AVDD terminal. Connect the ground terminal of this
supply to the GND terminal.
7) Connect a 1.8V, 100mA power supply to the DVDD
terminal. Connect the ground terminal of this sup-
ply to the GND terminal.
8) Connect another 1.8V, 100mA power supply to the
VL terminal. Connect the ground terminal of this
supply to the corresponding GND terminal.
9) Turn on the power supplies.
10) Enable the signal generators. Set the clock signal
generator output power to +19dBm and the fre-
quency (fCLK) to 80MHz for the MAX19586 EV kit,
or 100MHz for the MAX19588 EV kit. Set the analog
input signal generator output to the desired fre-
quency and amplitude. For coherent data capture,
the signal generators should be phase-locked.
Adjust the analog input signal level to overcome
cable and filter losses that may exist in the signal’s
input path. Note that the ADC full scale is
+9.1dBm.
11) Enable the logic analyzer and start collecting data.
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
4 _______________________________________________________________________________________
Detailed Description
The MAX19586/MAX19588 EV kits are fully assembled
and tested PCBs that contain all the components nec-
essary to evaluate the performance of the MAX19586
or the MAX19588 ADCs. Digital data generated by the
ADCs is captured on a 16-bit bus (+ DOR bit). The EV
kits can be evaluated with a maximum clock frequency
(fCLK) of 80MHz for the MAX19586, or 100Msps for the
MAX19588.
The EV kits are designed as six-layer PCBs to optimize
the performance of the converter. The EV kits are
specified to have 3.3V and 1.8V power supplies
applied to the analog (AVDD) and digital (DVDD, VL)
power planes, respectively.
The digital outputs are available on connectors J5 or
J3 and J4. J5 is a 40-pin connector, which can directly
interface with a user-provided logic analyzer or data-
acquisition system. The digital output clock signal,
which is used to synchronize the output data to the
logic analyzer, is available at the CLKO pins on J5-3
and J1-1.
Power Supplies
The MAX19586/MAX19588 EV kits require separate
analog and digital power supplies. A 3.3V power sup-
ply is used to power the analog portion of the ADC.
Two separate 1.8V power supplies are recommended:
DVDD powers the digital portion of the
MAX19586/MAX19588, and VL powers the buffer/
driver U2.
Reference Voltage
The full-scale range for the MAX19586/MAX19588 is
set to 2.56VP-P by an internal reference voltage. The
MAX19586/MAX19588’s internal reference voltage is
1.28V, and can be monitored at the REFOUT pad on
the EV kit. To use the internal reference voltage, the
reference input (REFIN) must be connected to the ref-
erence output (REFOUT) through resistor R12.
The MAX19586/MAX19588 EV kits also provide a
REFIN pad, allowing an external reference source to
be connected to the ADC. An external reference
source can be in the range of 1.28V ±10%.
Clock
A user-provided single-ended clock signal is convert-
ed to a differential clock signal through transformer T3.
To reduce clock jitter, the clock signal should have
high slew rates at its zero crossings. A large clock sig-
nal amplitude can be used to maximize the slew rate at
its zero crossings. Diode D1 limits the differential sig-
nal swing at the clock input when a large clock signal
is used to maximize the slew rate. The
MAX19586/MAX19588 EV kits are tested with a
+16dBm to +19dBm clock signal, with about 6dB loss
in the bandpass filter that follows the clock
signal generator.
Analog Input Signal
The MAX19586/MAX19588 require a differential analog
input signal of less than or equal to +9.1dBm (2.56VP-P
into 100Ω). The EV kits feature on-board transformer
OUTPUT
HP/AGILENT 8644B
HP/AGILENT 8644B
SYNC
OUTPUTSYNC
OUTPUTINPUT
OUTPUTINPUT
CLOCK
BANDPASS FILTER
ANALOG
BANDPASS FILTER
AVDD DVDD VL
3.3V 1.8V 1.8V
CLOCK
INPUT+
J5 LOGIC
ANALYZER
3dB
PAD
J2
16
DOR
(OPTIONAL)
MAX19586 EV KIT
OR MAX19588 EV KIT
Figure 1. MAX19586/MAX19588 EV Kits Quick Start Setup and Connections
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
_______________________________________________________________________________________ 5
T1 that converts the output of a user-provided single-
ended signal to a differential signal for the ADC.
Transformer T1 has a primary-to-secondary turns ratio
of 1:1.414. Therefore, the single-ended signal should
have a power level of less than or equal to +9.1dBm
(1.81VP-P into 50Ω). Cable and bandpass filter losses
affect the amplitude of the received signal at the ADC.
Therefore, account for these losses when configuring
the signal input generator amplitude.
The EV kits accept a fully differential input signal after
making the following modifications:
• Cut the trace between resistor R1 PCB pads.
• Remove transformers T1 and T2.
• Install a 0.1µF (0603) ceramic capacitor on C2.
• Install 0Ω(0603) resistors on R2, R3, R4, and R5.
• Install an SMA connector on the INPUT- PCB
footprint.
Digital Output Signals
The MAX19586/MAX19588 feature a 16-bit, parallel,
CMOS-compatible digital output bus and a DOR bit.
The digital outputs of the ADC and the DOR bit are
applied to a latch that is capable of driving large
capacitive loads that may be present at the logic ana-
lyzer connection. The outputs of the buffer are con-
nected to two sets of connectors. The first set of con-
nectors includes J1 for the digital output clock signal,
J2 for the DOR bit, J3 and J4 for the digital output sig-
nals. This set of connectors accommodates the data-
acquisition and logic-analyzer systems such as
Tektronix’s TLA621. The second set of connectors con-
sists of a single 40-pin header, J5, which provides all
signals, except for the DOR bit, for logic-analyzer sys-
tems such as HP/Agilent 16500C. See Table 1 for
headers J1–J5 bit locations.
Note that a poor-quality connection may lead to
apparent performance degradation. To optimize
dynamic performance, avoid using “flying” (or indi-
vidual) lead logic-analyzer probes for collecting data
from the MAX19586/MAX19588 EV kits.
Table 1. Digital Output Bit Locations
Note: All even numbered pins are connected to ground.
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
6 _______________________________________________________________________________________
MAX19586/MAX19588 U2
74VCX16722
U3
NC7SV14
U1
1
INP DAV
GND
GND
(MSB)
(LSB)
GND
GND
43
2
61
10 50
DOR 53
D15 49 O15 21
R8
SHORT
C4
OPEN
R6
49.9Ω
1%
R7
49.9Ω
1%
C5
OPEN
R4
OPEN
R2
OPEN
INPUT+
GND
1
2
C1
0.1µF
2
AVDDA
AVDDA
17
AVDD
18
AVDD
19
AVDD
23
AVDD
24
AVDD
25
AVDD
55
AVDD
56
AVDD
29
DVDD
41
DVDD
42
DVDD
51
DVDD
DVDDAVDD
AVDD
36
AGND
AGND
7
AGND
8
AGND
9
AGND
12
AGND
13
AGND
14
AGND
20
AGND
21
AGND
22
AGND
28
AGND
30
DGND
31
DGND
52
DGND
C3
OPEN
C6
0.1µFL4
OPEN
6
5
1
43
GND T2
T1
INN
11
CLKP
4
CLKN
5
R9
SHORT
C11
SHORT
C9
OPEN C12
SHORT
REFOUT
2
3
RL
D1
1
R5
OPEN
R3
OPEN
R1
SHORT
INPUT-
GND
GND
GND
1
2C2
OPEN
C8
SHORT GND
GND
GND
R10
49.9Ω
1%
R11
49.9Ω
1%
GND
C10
0.1µF
6
5
1
2
43
T3
CLOCK
GND
1
2
REFOUT
26
REFIN
REFIN
27
C13
1µF
GND
GND GND
GND
C14
1µF
GND
C18
0.1µF
GND
R12
10kΩ
1%
R13
OPEN
GND
CLK
64
7
VCC
22
VCC
28
VCC
47
VCC
43 58
VCC
VCC
VL
D21
35
D20
36
D19
38
D18
39
D17
41
D16
42
GND
OE
1
CE
33
D15
44
D14 48 D14
45
D13 47 D13
46
D12 46 D12
48
D11 45 D11
49
D10 44 D10
50
D9 43 D9
51
D8 40 D8
52
D7 39 D7
53
D6 38 D6
55
D5 37 D5
56
D4 36 D4
57
D3 35 D3
59
D2 34 D2
60
D1 33 D1
62
D0 32 D0
63
N.C. 54
N.C. 15
N.C. 16
411
GND
GND
18
GND
25
GND
31
GND
34
GND
40
GND
47
GND
54
GND
61
GND
GND
O14 20
O13 19
O12 17
O11 16
O10 15
O21 30
O20 29
O19 27 R14
120Ω
O18 26
O17 24
O16 23
O9 14
O8 13
16 J3-1
J3
15
14
13
12
11
10
9
1
RA2
120Ω
GND
GND
CLKO
GND
34
N.C.
Y
VCC
A
15
2
12
12
VL
J2DOR
J1
2
3
4
5
6
7
8
J3-3
J3-5
J3-7
J3-9
J3-11
J3-13
J3-15
J3-2
J3-4
J3-6
J3-8
J3-10
J3-12
J3-14
J3-16
J5-7
J5-9
J5-11
J5-13
J5-15
J5-17
J5-19
J5-21
J5-8
J5-10
J5-12
J5-14
J5-16
J5-18
J5-20
J5-22
J5-1
J5
J5-3
J5-5
J5-2
J5-4
J5-6
O7 12
O6 10
O5 9
O4 8
O3 6
O2 5
O1 3
O0 2
32
16 J4-1
J4
15
14
13
12
11
10
9
1
RA1
120Ω
GND
GND
2
3
4
5
6
7
8
NC
J4-3
J4-5
J4-7
J4-9
J4-11
J4-13
J4-15
J4-2
J4-4
J4-6
J4-8
J4-10
J4-12
J4-14
J4-16
J5-23
J5-25
J5-27
J5-29
J5-31
J5-33
J5-35
J5-37
J5-24
J5-26
J5-28
J5-30
J5-32
J5-34
J5-36
J5-38
J5-39 J5-40
R15
49.9Ω
1%
Figure 2a. MAX19586/MAX19588 EV Kits Schematic (Sheet 1 of 2)
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
_______________________________________________________________________________________ 7
C19
220µF
6.3V
C20
47µF
VL
GND
1
6VL
J6
5GND
4DVDD
3GND
2AVDD
1GND
3
2
L1
C21
2.2µF
GND
PLACE CAPACITORS NEXT TO U2 PINS 7, 22, 28, 37, 43, AND 58, RESPECTIVELY.
VL
C22
220µF
6.3V
C23
47µF
DVDD
GND
13
2
L2
C24
2.2µF
C25
220µF
6.3V
C26
47µF
AVDD
GND
13
2
L3
C27
2.2µF
C28
0.1µF
C29
0.1µF
C30
0.1µF
C31
0.1µF
C32
0.1µF
C33
0.1µF
GND
PLACE CAPACITORS C38 AND C41 NEXT TO U1 PINS 55 AND 56.
PLACE CAPACITORS C39 AND C42 NEXT TO U1 PINS 17, 18, AND 19.
PLACE CAPACITORS C40 AND C43 NEXT TO U1 PINS 23, 24, AND 25.
AVDD
C38
0.01µF
C39
0.01µF
C40
0.01µF
C41
0.1µF
C42
0.1µF
C43
0.1µF
GND
PLACE CAPACITORS NEXT TO U1 PINS 42, 41, 29, AND 51, RESPECTIVELY.
DVDD
C34
0.01µF
C35
0.1µF
C36
0.1µF
C37
0.1µF
Figure 2b. MAX19586/MAX19588 EV Kits Schematic (Sheet 2 of 2)
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
8 _______________________________________________________________________________________
Figure 3. MAX19586/MAX19588 EV Kits Component Placement Guide—Component Side
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
_______________________________________________________________________________________ 9
Figure 4. MAX19586/MAX19588 EV Kits PCB Layout—Component Side
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
10 ______________________________________________________________________________________
Figure 5. MAX19586/MAX19588 EV Kits PCB—GND Layer 2
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
______________________________________________________________________________________ 11
Figure 6. MAX19586/MAX19588 EV Kits PCB—VDD Layer 3
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
12 ______________________________________________________________________________________
Figure 7. MAX19586/MAX19588 EV Kits PCB—VDD Layer 4
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
______________________________________________________________________________________ 13
Figure 8. MAX19586/MAX19588 EV Kits PCB—GND Layer 5
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
14 ______________________________________________________________________________________
Figure 9. MAX19586/MAX19588 EV Kits PCB—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2006 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Evaluate: MAX19586/MAX19588
MAX19586/MAX19588 Evaluation Kits
Figure 10. MAX19586/MAX19588 EV Kits Component Placement Guide—Solder Side
Revision History
Pages changed at Rev 1: 1–14