Compact, 1.5 A Linear Charger
for Single-Cell Li+ Battery
ADP2291
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
FEATURES
Simple, safe linear charger for single-cell lithium battery
4.5 V to 12 V input voltage range
Adjustable charging current up to 1.5 A
Low cost PNP external pass element
Automatic reverse isolation with no external blocking diode
Output overshoot protection
Deep discharge precharge mode
Thermal shutdown
Automatic recharge
Programmable termination timer
LED charging status indicator
4.2 V output voltage with ±1% accuracy over line and
temperature
1 µA shutdown supply current
Small, 8-lead MSOP and 3 × 3 mm LFCSP packages
APPLICATIONS
Wireless handsets
Smart handhelds and PDAs
Digital cameras
Single-cell, lithium ion-powered systems
Cradle chargers
GENERAL DESCRIPTION
The ADP2291 is a constant-current/constant-voltage linear
charger for a single-cell, lithium ion battery, requiring just a few
components to provide a simple and safe charging system that
operates from a wide 4.5 V to 12 V input voltage range. It
features an internally controlled, multistep charging cycle that
improves battery life.
An external, low cost PNP provides the charging current to the
battery, and an external resistor sets the maximum charge
current. A small, external capacitor programs the maximum
charge time. The controller includes an LED driver to indicate
the battery charging status.
Safety features include charging stop mode for battery faults,
output overshoot protection, and thermal shutdown. The
ADP2291 also features automatic reverse isolation, which does
not require an additional blocking diode.
The multistep charge cycle optimizes the battery charging time
in a safe manner. It features a trickle charge mode for a deeply
discharged cell and a fast charging mode with a maximum
current of 1.5 A. The ADP2291 controls the end of charge with
a 4.2 V output voltage that is 1% accurate over line and tem-
perature. It automatically recharges the battery if the cell voltage
drops. When the input supply is removed, the part enters a low
current state and reduces the current drawn from the battery to
below 1 µA.
The ADP2291 is available in both a small, 8-lead MSOP
package and a 3 × 3 mm LFCSP package that is ideally suited
for small, portable applications.
TYPICAL OPERATING CIRCUIT
ADP2291
TIMER ADJ
RS Q1
CTIMER
INPUT
4
.6V–12V
SHUTDOWN
+
IN
CHG
BAT
CIN
GND
CS DRV COUT
04873-001
Figure 1.
ADP2291
Rev. A | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Typical Operating Circuit ................................................................ 1
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 10
Precharge Mode.......................................................................... 10
End-of-Charge Mode................................................................. 10
Shutdown Mode.......................................................................... 10
Charge Restart............................................................................. 10
Programmable Timer................................................................. 10
Charge Status Indicator ............................................................. 10
Automatic Reverse Isolation ..................................................... 10
Overshoot Protection................................................................. 10
Power Supply Checks................................................................. 10
Thermal Shutdown .................................................................... 11
Application Information................................................................ 12
Setting the Maximum Charge Current.................................... 12
Setting the Maximum Charge Time ........................................ 12
External Capacitors.................................................................... 12
Reverse Input Protection........................................................... 12
External Pass Transistor ............................................................ 13
Typical Application Circuit ....................................................... 14
Charge Termination................................................................... 14
Selectable Charge Current......................................................... 14
Thermal Protection.................................................................... 14
Printed Circuit Board Layout Considerations ....................... 16
LFSCP Layout Considerations.................................................. 16
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 17
REVISION HISTORY
11/05—Rev. 0 to Rev. A
Changes to Equation 7 ................................................................... 13
Changes to Figure 26...................................................................... 15
Changes to Table 7.......................................................................... 16
Changes to Ordering Guide .......................................................... 17
Updated Outline Dimensions....................................................... 17
10/04—Initial Version: Revision 0
ADP2291
Rev. A | Page 3 of 20
SPECIFICATIONS
VIN = 5.5 V, VBAT = 4.2 V, RADJ open, TA = –40°C to +85°C, typical values are at 25°C, unless otherwise noted.1
Table 1.
Parameter Conditions Min Typ Max Unit
POWER SUPPLY, IN
Input Voltage 4.5 12 V
Current Draw Fast charge/precharge/end-of-charge modes
Timeout/shutdown/battery fault
6
1.4
9
1.8
mA
mA
BATTERY VOLTAGE, BAT
Voltage Accuracy, End-of-Charge (VBAT, EOC) TA = 0°C to +50°C
VIN = 4.5 V to 12 V
VIN – VCS = VRS/10
4.158 4.2 4.242 V
Load Regulation, No Battery VIN – VCS = 0 to VRS −80 mV
Current Draw Timeout mode, VIN = 4.5 V to 12 V 45 µA
Current Draw Battery fault/shutdown mode, VIN = 4.5 V to 12 V 0.1 1 µA
Reverse Leakage Current Power-down mode: VIN = float, VBAT = 4.2 V 0.1 µA
FAST CHARGE MODE
Sense Voltage Setpoint (VRS) VIN – VCS, RADJ = open
VIN = 4.5 V to 12 V
VBAT = 3.6 V
140 150 160 mV
Sense Voltage Setpoint (VRS) VIN – VCS, RADJ = 100 kΩ
VIN = 4.5 V to 12 V
VBAT = 3.6 V
40 50 60 mV
Current Regulation Adjustment Per V of (3 V – VADJ) 67 mV/V
PRECHARGE MODE
Sense Voltage Setpoint (VRS) VIN – VCS, RADJ = open
VIN = 4.5 V to 12 V
VBAT = 2 V
10 15 20 mV
Sense Voltage Setpoint (VRS) VIN – VCS, RADJ = 100 kΩ
VIN = 4.5 V to 12 V
VBAT = 2 V
5 10 15 mV
BAT Precharge Threshold VBAT rising 2.65 2.85 V
Hysteresis 70 mV
SHUTDOWN MODE
ADJ Shutdown Threshold VADJ falling, VIN = 4.5 V 0.30 0.45 V
Hysteresis 40 mV
Pull-Up Current from ADJ VADJ = 0 40 µA
POWER-DOWN MODE
VIN Power-Down Threshold VIN rising 3.6 4 V
Hysteresis 220 mV
VIN_Good Comparator
Threshold (VIN > VBAT) VIN rising 125 170 220 mV
Hysteresis 110 mV
EOC COMPARATOR
Current Threshold VIN – VCS falling, RADJ = open, relative to VRS 7 10 13 %
Current Threshold VIN – VCS falling, RADJ = 100 kΩ, relative to VRS 6 10 16 %
Hysteresis 12 mV
RESTART COMPARATOR
BAT Restart Threshold VIN > 4.5 V, VBAT falling, relative to VBAT, EOC −170 mV
ADP2291
Rev. A | Page 4 of 20
Parameter Conditions Min Typ Max Unit
BATTERY CHARGE TIMER
Charge/Discharge TIMER Current 21.0 24.0 27.0 µA
Low Threshold 1.2 V
High Threshold 2.0 V
High-Low Threshold Delta2 750 850 mV
OVERSHOOT PROTECTION
BAT Threshold 4.7 5 5.3 V
Current Sink <2 ms duration 1.5 A
CHG OUTPUT
Output Voltage Low Current = 20 mA 0.45 V
Output Leakage Current VCHG = 5 V 0.1 1 µA
BASE DRIVE CAPABILITY
Maximum Base Drive Current 40 mA
THERMAL SHUTDOWN
Shutdown Threshold TA rising 135 °C
Hysteresis 35 °C
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). Typical values are at TA = 25°C.
2 Guaranteed by design; not tested in production.
ADP2291
Rev. A | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
IN, DRV,1 CS, CHG to GND −0.3 V to +13.5 V
BAT, ADJ, TIMER to GND −0.3 V to (VIN + 0.3 V)
Operating Ambient Temperature −40°C to +85°C
Operating Junction Temperature −40°C to +125°C
θJA, 2-layer MSOP-8 220ºC/W
θJA, 4-layer MSOP-8 158ºC/W
θJA, 2-layer LFCSP-8 62ºC/W
θJA, 4-layer LFCSP-8 48ºC/W
Storage Temperature Range −65°C to +150°C
Lead Temperature Soldering (10 sec) 300°C
1 Pulling current from the DRV pin by driving it below ground while VIN is
applied can cause permanent damage to the device.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other condition s above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified all other voltages
referenced to GND.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
ADP2291
Rev. A | Page 6 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
DRV
1
GND
2
BAT
3
CS
4
CHG
8
TIMER
7
IN
6
ADJ
5
ADP2291
TOP VIEW
(Not to Scale)
04873-002
Figure 2. 8-Lead MSOP Pin Configuration
PIN 1
INDICATOR
1DRV 2GND 3BAT 4CS
7 TIMER
8 CHG
6IN
5 ADJ
TOP VIEW
(Not to Scale)
ADP2291
04873-003
Figure 3. 8-Lead LFCSP Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 DRV Base Driver Output. Controls the base of an external PNP pass transistor.
2 GND Ground.
3 BAT Battery Voltage Sense Input.
4 CS Current Sense Resistor Negative Input.
5 ADJ Charging Current Adjust and Charger Shutdown Input.
6 IN Power Input and Current Sense Resistor Positive Input.
7 TIMER Timer Programming Input/Disable.
8 CHG LED Charge Status Indicator. This is an open-collector output.
ADP2291
Rev. A | Page 7 of 20
12
TYPICAL PERFORMANCE CHARACTERISTICS
V
IN
(V)
V
BAT
(V)
4.21
4.205
4.20
4.195
4.19 46 108
04873-004
Figure 4. Battery Voltage vs. Input Voltage
TEMPERATURE (°C)
VBAT (V)
4.21
4.205
4.20
4.195
4.19
–50 –25 250 1251007550
04873-005
Figure 5. Battery Voltage vs. Temperature
I
CHG
(mA)
VBAT (V)
4.22
4.21
4.20
4.19
4.18 0 200 800600400
04873-006
Figure 6. Battery Voltage vs. Charge Current
RS = 200 mΩ, VADJ = 3 V
I
BAT
(V)
ICHG (mA)
800.0
600.0
700.0
500.0
400.0
300.0
200.0
100.0
0.0
2.50 3.00 4.504.003.50
04873-007
Figure 7. Charge Current vs. Battery Voltage
RS = 200 mΩ, VADJ = 3 V
TEMPERATURE (°C)
IREVERSE (nA)
250
200
150
100
50
0
–50 –25 0 12575 1005025
04873-008
Figure 8. Battery Reverse Current vs. Temperature
VIN = float, VBAT = 4.2 V
TEMPERATURE (°C)
VRESTART (V)
4.10
4.09
4.08
4.07
4.06
4.05
–40 –20 0 10060 804020
04873-009
Figure 9. Restart Threshold
ADP2291
Rev. A | Page 8 of 20
12
V
IN
(V)
VRS (mV)
16.0
15.8
15.6
15.4
15.2
15.0 46 108
04873-010
Figure 10. Precharge VRS vs. Input Voltage
TEMPERATURE (°C)
VRS (mV)
15.5
15.4
15.3
15.2
15.1
–50 –25 0 25 50 75 100 125
04873-011
Figure 11. Precharge VRS vs. Temperature
R
ADJ
(k
Ω
)
VRS (mV)
16
14
12
10
8
100 1k 10k
04873-012
Figure 12. Precharge VRS vs. RADJ
V
IN
(V)
VRS (mV)
153
152
151
150
149
148 4681012
04873-013
Figure 13. Fast Charge VRS vs. Input Voltage
TEMPERATURE (°C)
V
RS
(mV)
152
151
150
149
148
–50 –25 0 25 50 75 100 125
04873-014
Figure 14. Fast Charge VRS vs. Temperature
R
ADJ
(k
Ω
)
V
RS
(mV)
160
140
120
100
80
60
40
100 1k 10k
04873-015
Figure 15. Fast Charge VRS vs. RADJ
ADP2291
Rev. A | Page 9 of 20
12
V
IN
(V)
BASE DRIVE (mA)
135
130
125
120
115 46 108
04873-016
Figure 16. Base Drive vs. Input Voltage
TEMPERATURE (
°
C)
BASE DRIVE (mA)
122
120
118
116
114
112
110
108
106
104
–40 –20 10040 60 80200
04873-017
Figure 17. Base Drive vs. Temperature
VIN = 5 V
CH1 10.0mV CH2 1.00V
BW
BW
M200µs CH2 6.18V
2
1
CH2 = V
IN
5V OFFSET
V
IN
= 5V TO 8V
CH1 = V
BAT
4.18V OFFSET
04873-018
Figure 18. Line Transient Response
IBAT = 350 mA
CH1 20.0mV
CH3 10.0mVΩ
BW
M100µs CH3 10.0mV
3
1
CH3 = I
BAT
200mA/DIV
I
BAT
= 70mA TO 700mA
CH1 = V
BAT
4.18V OFFSET
04873-019
Figure 19. Load Transient Response
VIN = 5 V
ADP2291
Rev. A | Page 10 of 20
THEORY OF OPERATION
The ADP2291 is intended to charge a single-cell, lithium battery
from a supply voltage or wall adapter providing 4.5 V to 12 V.
The charge controller adjusts the base current of an external
PNP transistor to optimize current and voltage applied to the
battery during charging. A low value resistor placed in series
with the battery charging current provides current measure-
ment for the ADP2291.
To ensure safety and long battery lifetime, the ADP2291 charges
the battery using a simple step-by-step cycle, as shown in Figure 26.
The normal charge cycle begins by measuring the battery
voltage to determine charge level. If the battery is deeply dis-
charged, then low current precharge is initiated. Once precharge
is complete, normal fast charge at the maximum current (denoted
as IMAX) begins. This maximum current can be adjusted by
varying the sense resistor value or by varying the voltage at the
adjust pin. As the battery approaches full capacity, the charging
current is reduced until the end-of-charge condition is reached.
Batteries that are not deeply discharged skip the precharge
mode and immediately begin fast charging. Each of these
modes and associated fault conditions is discussed in detail.
PRECHARGE MODE
For deeply discharged cells, the ADP2291 charges at a reduced
rate when the battery voltage VBAT < 2.8 V. This reduced rate is
IMAX/10 when the ADJ pin voltage is 3 V and IMAX/5 when the
ADJ pin voltage is 1.5 V. For ADJ pin voltages in between 3 V
and 1.5 V, the charge current can be interpolated. If the battery
voltage does not increase past 2.8 V before the precharge timer
elapses (typically 30 minutes), a battery fault is assumed and the
ADP2291 shuts down and does not restart until the input voltage
is cycled off and then back on. Note that in this mode, shutdown
commands are ignored.
END-OF-CHARGE MODE
Once the voltage loop reduces the charge current to 1/10 of its
nominal value, IMAX (irrespective of the ADJ voltage), the ADP2291
detects the end-of-charge (EOC) state, and the charge status
indicator becomes high impedance.
Low level charging continues until the timer terminates the
charge (nominally 30 minutes).
SHUTDOWN MODE
When the ADJ input is pulled below 0.4 V, the ADP2291 is put
into shutdown mode. When in this mode, the charger is dis-
abled; the current drawn from the battery falls to less than
1 µA; and the current drawn from IN falls to 0.7 mA.
When the charger is re-enabled, the charger returns to the start
state but quickly sequences through the states until the proper
charge mode is reached.
CHARGE RESTART
Once the charge is complete in the end-of-charge or timeout
mode, the ADP2291 continually monitors the cell voltage and
charge current. When the cell voltage falls by 100 mV or the
charge current increases beyond the EOC hysteresis, the ADP2291
initiates another charge cycle to keep the cell fully charged. See
Figure 26.
PROGRAMMABLE TIMER
The on-chip timer, controlled by an external capacitor CTIMER,
determines the timeout intervals of the various charger modes.
For example, a CTIMER value of 0.1 µF results in a precharge
timeout interval of 30 minutes, a fast charge timeout of 3 hours,
and an end-of-charge timeout of 30 minutes. The ratio between
precharge and end-of-charge to fast charge timeout is always
1/6. All these time intervals are proportional to the CTIMER
capacitor value, allowing them to be adjusted over a wide range.
Connecting the TIMER pin to ground disables the timer.
CHARGE STATUS INDICATOR
The ADP2291 contains a charge status output, CHG, that sinks
current when the ADP2291 is charging the battery. This output
can be used as a visual signal by connecting it to an LED, or it
can be used to generate a logic-level charge status signal by
connecting a resistor between CHG and logic high.
AUTOMATIC REVERSE ISOLATION
When the voltage on the BAT pin is higher than the voltage on
IN, the ADP2291 automatically connects the base of the pass
device to BAT. This removes the necessity of having an external
diode between the pass device and battery, further reducing the
charger’s footprint and component count.
OVERSHOOT PROTECTION
In the event of a battery disconnect during charging, a voltage
overshoot condition on BAT could occur. The ADP2291
includes an overshoot protection circuit that activates when
VBAT rises to 5 V and sinks up to 1.5 A to protect the external
components.
POWER SUPPLY CHECKS
To ensure proper operation, the ADP2291 checks the absolute
voltage level of the input supply and the supply voltage relative
to the battery. When the supply IN is below 3.8 V, the chip is
internally powered down and does not respond to external
control. In this power-down mode, the device draws less than
1 µA from the battery. The VIN good comparator halts operation
if the supply voltage is less than 165 mV above the battery
voltage, ensuring that charging occurs only if the supply voltage
is sufficient.
ADP2291
Rev. A | Page 11 of 20
THERMAL SHUTDOWN
If the ADP2291 junction temperature rises above 135°C,
thermal shutdown occurs. Extreme junction temperatures can
be the result of excessive current operation and/or high ambient
temperatures.
A 35°C temperature hysteresis is included so that the ADP2291
does not return to operation during thermal shutdown until the
on-chip temperature drops below 100°C.
CONTROL
LOGIC
TIMER
TEMP
VOLTAGE
REFERENCE
GM
3V
1.2V
5V
GM GM
TIMER
ADJ
BATDRVCSIN
SHUTDOWN
VIN_GOOD
RESTART BAT
4.1V
BAT
2.5V
CHG
0.4V
IN
BAT
IN
3.8V
IPNP
C/10
PRECHARGE
POWER_DOWN
END_OF_CHARGE
04873-020
Figure 20. Functional Block Diagram
ADP2291
Rev. A | Page 12 of 20
APPLICATION INFORMATION
SETTING THE MAXIMUM CHARGE CURRENT
The maximum charge current is set by choosing the proper
current sense resistor, RS, and the voltage on the ADJ input.
The charger nominally regulates its output current at the point
where the voltage across the current sense resistor VIN – VCS
(defined as VRS) is 150 mV. This setpoint voltage can be adjusted
by pulling down on the ADJ input, which is internally attached
through a 100 kΩ pull-up resistor to 3 V. Each volt of pull-down
from 3 V reduces VRS by 67 mV during fast charge. A minimum
of 50 mV is reached when a 100 kΩ resistor is attached between
ADJ and ground. During slow charge, the voltage across the
current sense resistor is 15 mV with no connection to ADJ, and
it drops to 10 mV with a 100 kΩ resistor attached to ground.
Therefore, the maximum charge rate IMAX is calculated as
)mΩ(
)mV(
S
RS
MAX R
V
I= (1)
where 50 mV ≤ VRS ≤ 150 mV.
After determining suitable values for VRS and RS, the value of
VADJ and RADJ are calculated as
V
mV
mVmV
7.66 50)( +
=RS
ADJ V
V (2)
RADJ = 100 kΩ × ⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
−ADJ
ADJ
VV
V
3 (3)
Examples of resistor combinations are shown in Table 4.
Table 4. Examples of RS and RADJ Selection
IMAX RS mΩ VRS mV VADJ V RADJ
1.5 A 100 150 3 Open
1 A 100 100 2.25 300 K
750 mA 100 75 1.87 167 K
500 mA 100 50 1.5 100 K
750 mA 200 150 3 Open
500 mA 200 100 2.25 300 K
375 mA 200 75 1.87 167 K
250 mA 200 50 1.5 100 K
500 mA 300 150 3 Open
333 mA 300 100 2.25 300 K
250 mA 300 75 1.87 167 K
167 mA 300 50 1.5 100 K
SETTING THE MAXIMUM CHARGE TIME
The maximum charge time is intended as a safety mechanism
to prevent the charger from trickle charging the cell indefinitely.
It does not terminate charging under normal charging condi-
tions, but only when there is a failure to reach end-of-charge.
A typical cell charges at a 1 C rate in about 1.5 hours, depending
on the cell type, temperature, and manufacturer. Generally,
a three-hour time limit is sufficient to prevent a normal charge
cycle from being interrupted by the charge timer. It is recom-
mended that the cell manufacturer be consulted for timing
details.
The maximum charge time is set by selecting the value of the
CTIMER capacitor. Calculate the timer capacitance using
CTIMER = tCHG(minutes) ×
minutes1800 µF1 (4)
The precharge and end-of-charge periods are 1/6 the duration
of the fast charge time limit. The charge timers are completely
disabled by connecting the TIMER pin to ground. If the timers
are disabled, the FAULT and TIMEOUT states are never reached,
so the timers should only be disabled if charging is monitored
and controlled externally.
EXTERNAL CAPACITORS
Use an input supply capacitor (CIN) with a value in the
1 µF to 10 µF range and place it close to the ADP2291. This
should provide adequate input bypassing, but the selected
capacitor should be checked in the actual application circuit.
Check that the input voltage does not droop or overshoot
excessively during the start-up transient.
Use a battery output capacitor (COUT) with a value of at least
10 µF. This capacitance provides compensation when no battery
load is present. In addition, the battery and interconnections
appear inductive at high frequencies and must be accounted for
when the charger is operated with a battery load. Therefore, a
small amount of output capacitance is necessary to compensate
for the inductive nature of the battery and connections. Use a
minimum output capacitance value of 1 µF for applications
where the battery cannot be removed.
REVERSE INPUT PROTECTION
The Diode D1, shown in Figure 22 through Figure 25, is
optional. It is required only if the input adapter voltage can
be applied with a reverse polarity.
If the adapter voltage is high enough, a Schottky diode is recom-
mended to minimize the voltage difference from the adapter to
the charger input and the power dissipation. Choose a diode with
a continuous current rating high enough to handle battery charging
current at the maximum ambient temperature. Use a diode with a
voltage rating greater than the maximum adapter voltage.
ADP2291
Rev. A | Page 13 of 20
In cases where the voltage drop across the protection device
must be kept low, a P MOSFET is recommended. Connect the
MOSFET as shown in Figure 21.
ADP2291
RS
INPUT
4.6V–12V
IN
CHG
CIN CS DRV
04873-021
Figure 21. Reverse Input Protection
EXTERNAL PASS TRANSISTOR
Choose the external PNP pass transistor based on the given
operating conditions and power handling capabilities. The pass
device is determined by the base drive available, the input and
output voltage, and the maximum charge current.
Select the pass transistor with a collector-emitter breakdown
voltage that exceeds the maximum adapter voltage. A VCEO
rating of at least 15 V is recommended.
Providing a charge current of IMAX with a minimum base drive
of 40 mA requires a PNP beta of at least
βMIN = mA40
MAXMAX I
I
I=
Β
(5)
Note that the beta of a transistor drops off with collector
current. Therefore, make sure the beta at IMAX meets the
minimum requirement.
For cases where the adapter voltage is low (less than 5.5 V),
calculate the saturation voltage by
VCE(SAT) = VADAPTER(MIN) − VPROTECT − VRS − VBAT (6)
where VPROTECT is the forward drop of the reverse input
protection.
The power handling capability of the PNP pass transistor is
another important parameter. The maximum power dissipation
of the pass transistor is estimated using
PDISS (W) = IMAX × (VADAPTER(MAX) − VPROTECT − VRS − VBAT) (7)
where VRS = 50 mV to 150 mV at VADJ = 1.5 V to 3.0 V,
VBAT = 2.8 V, the lowest cell voltage where fast charge can occur.
Note that the adapter voltage can be either preregulated or
unregulated. In the preregulated case, the difference between
the maximum and minimum adapter voltage is small. In this
case, use the maximum regulated adapter voltage to determine
the maximum power dissipation. In the unregulated case, the
adapter voltage can have a wide range specified. However, the
maximum voltage specified is usually with no load applied.
Therefore, the worst-case power dissipation calculation often
leads to an over-specified pass device. In either case, it is best to
determine the load characteristics of the adapter to optimize the
charger design.
For example:
VADAPTER(MIN) = 5.0 V
VADAPTER(MAX) = 6.0 V
IMAX = 500 mA
VPROTECT = 0.2 V at 500 mA
VADJ = 3 V
VRS = 150 mV
βMIN = 5.12
mA40 mA500 ==
ΒI
IMAX
VCE(SAT) = VADAPTER(MIN) − VPROTECT − VRS − VBAT
= 5.0 V − 0.2 V − 0.15 V − 4.2 V
= 0.45 V
PDISS (W) = IMAX × (VADAPTER(MAX) − VPROTECT − VRS − VBAT)
= 0.50 A × (6.0 V − 0.2 V − 0.15 V − 2.8 V)
= 1.4 W
A guide for selecting the PNP pass transistor is shown in Table 5.
Table 5. PNP Pass Transistor Selection Guide
Vendor Part Number Package Max PD @ 25°C Beta @ 1 A VCE (SAT)
Fairchild FSB6726
NZT45H8
SuperSOT
SOT223
0.5 W
1.5 W
150
110
0.5 V
0.1 V
ON Semiconductor® MTB35200
BCP53T1
MMJT9435
TSOP-6
SOT223
SOT223
0.625 W
1.5 W
1.6 W
200
35
200
0.175 V
0.3 V
0.18 V
Philips BCP51 SOT223 1.3 W 50 0.5 V
ZETEX ZXT10P20DE6
ZXT2M322
FZT549
FMMT549
SOT23-6
2 mm × 2 mm MLP
SOT223
SOT23
1.1 W
1.5 W
2 W
0.5 W
270
270
130
130
0.17 V
0.17 V
0.25 V
0.25 V
ADP2291
Rev. A | Page 14 of 20
TYPICAL APPLICATION CIRCUIT
A typical application circuit is shown in Figure 22. The circuit is
capable of a 750 mA charge current for an input voltage of 4.5 V
to 6 V. Higher input voltages can be used, but the increased power
dissipation of the pass device must be taken into account.
ADP2291
TIMER ADJ
RS
200mΩ
Q1
FZT549
D1
BAT1000
CTIMER
100nF
INPUT
4
.6V–12V +
IN
CHG
BAT
CIN
2.2µF
GND
CS DRV COUT
10µF
04873-022
Figure 22. Typical Application Circuit
CHARGE TERMINATION
In some applications, the charger is required to terminate charg-
ing when the EOC threshold is reached. Automatic charger
restart is not desired. Adding components R1, C1, and Q2
terminates charging when the CHG pin opens and prevents
further charging until the adapter is removed and reasserted.
ADP2291
TIMER ADJ
RS
200mΩ
Q1
FZT549
Q2
2N7002
D1
BAT1000
CTIMER
100nF
C1
100nF
INPUT
4.6V–12V +
IN
CHG
BAT
CIN
2.2µF
R1
500kΩ
GND
CS DRV COUT
10µFLI-ION
CELL
04873-023
Figure 23. Self-Termination Circuit
SELECTABLE CHARGE CURRENT
In applications where the charge current needs to be selectable,
use the circuit shown in Figure 24. This circuit allows a proces-
sor to determine if the charge current needs to be reduced due
to an input source limitation or a different battery capacity
option or simply to reduce the stress on the pass transistor.
R2 and Q2 allow the charge current to be selected between
high, which results in a charge current of 750 mA; and low,
which results in a charge current of 250 mA.
ADP2291
TIMER ADJ
RS
200mΩ
R2
100kΩ
Q1
FZT549
Q2
2N7002
D1
BAT1000
CTIMER
100nF
INPUT
4.6V–12V +
IN
CHG
BAT
CIN
2.2µF
GND
CS DRV
LOW/HIGH
COUT
10µFLI-ION
CELL
04873-024
Figure 24. Selectable Charge Current Circuit
THERMAL PROTECTION
In applications where the overall size must be small or the input
voltage range is wide, adding thermal regulation is suggested.
This allows the charger to monitor the temperature of the pass
device and decrease the charge current as the temperature
increases. By adding an NTC thermistor to the ADJ pin, it is
possible to accomplish this; however, care is still required to
ensure that the power dissipation of the pass device is not
exceeded.
ADP2291
TIMER ADJ
RS
200mΩ
Q1
FZT549
R1
470k
NTC LOCATED
NEAR Q1
R2
100k
D1
BAT1000
CTIMER
100nF
INPUT
4.6V–12V +
IN
CHG
BAT
CIN
2.2µF
GND
CS DRV COUT
10µFLI-ION
CELL
04873-025
Figure 25. Thermal Regulation Circuit
Some suggested NTC thermistor suppliers are listed in Table 6.
Table 6. NTC Thermistor Manufacturers
Vendor Part Number Website
BetaTHERM SMD2500KJ435J www.betatherm.com
Murata NCP18WM474J www.murata .com
Panasonic ERTJ0EV474J www.panasonic.com
Vishay 2322 615 1.474 www.vishay.com
ADP2291
Rev. A | Page 15 of 20
POWER-DOWN
VRS = 0mV
CHG = OPEN
BATTERY
FAULT
VRS = 0mV
CHG = OPEN
END OF
CHARGE
VRS = 15mV
CHG = OPEN
START
VRS = 0mV
CHG = OPEN
PRECHARGE
VRS = 15mV
CHG = LOW
FAST CHARGE
VRS = 150mV
CHG = LOW
TIME OUT
VRS = 0mV
CHG = OPEN
SHUTDOWN
VRS = 0mV
CHG = OPEN
VIN > 3.8V
VBAT > 2.8V
VBAT < 2.8V
VBAT < 4.1V
VADJ < 0.4V
VADJ > 0.4V AND TEMP < 100°C VADJ < 0.4V
VBAT < 4.1V OR
IPNP > C/10
IPNP < C/10 AND
VBAT > 4.1V
T = 30 MIN
T = 30 MIN
T = 3 HOUR
TEMP > 135°C
FROM ANYWHERE
ASYNCHRONOUSLY
VIN < 3.8V
FROM ANYWHERE
A
SYNCHRONOUSL
Y
START SEQUENCE ENDS
VADJ < 0.4V
04873-026
Figure 26. State Diagram for the ADP2291
CTIMER = 0.1 µF
ADP2291
Rev. A | Page 16 of 20
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
Use the following general guidelines when designing printed
circuit boards:
• Keep the output capacitor as close to the BAT and GND
pins as possible.
• Keep the input capacitor as close to the IN and GND pins
as possible.
• PC board traces with larger cross-sectional areas remove
more heat from the pass transistor. For optimum heat
transfer, specify thick copper and use wide traces.
• Use additional copper layers or planes to reduce thermal
resistance. When connecting to other layers, use multiple
vias if possible.
LFSCP LAYOUT CONSIDERATIONS
The LFCSP package has an exposed die paddle on the bottom
that efficiently conducts heat to the PCB. To achieve the
optimum performance from the LFCSP package, give special
consideration to the layout of the PCB. Use the following layout
guidelines for the LFCSP package:
• The pad pattern is shown in Figure 27. Follow the pad
dimension closely for reliable solder joints, while
maintaining reasonable clearances to prevent solder
bridging.
• The thermal pad of the LFCSP package provides a low
thermal impedance path (approximately 20°C/W) to the
PCB; therefore, a properly designed PCB effectively con-
ducts the heat away from the package. This is achieved by
adding thermal vias to the PCB that provide a thermal path
to the inner or bottom layers.
Note that the via diameter is small to prevent the solder
from flowing through the via and leaving voids in the
thermal pad solder joint.
Note also that the thermal pad is attached to the die sub-
strate; therefore, the thermal planes to which the vias
attach the package must be electrically isolated or
connected to GND.
• The solder mask opening should be about 120 microns
(4.7 mils) larger than the pad size, resulting in a minimum
of 60 microns (2.4 mils) clearance between the pad and the
solder mask.
• The paste mask opening is typically designed to match the
pad size used on the peripheral pads of the LFCSP package.
This should provide a reliable solder joint as long as the
stencil thickness is about 0.125 mm. The paste mask for the
thermal pad needs to be designed for the maximum coverage
to effectively remove the heat from the package. However,
due to the presence of thermal vias and the size of the ther-
mal pad, eliminating voids may not be possible.
• The recommended paste mask stencil thickness is
0.125 mm. Use a laser cut stainless steel stencil with
trapezoidal walls.
• Use a no-clean, Type 3 solder paste for mounting the
LFCSP package. A nitrogen purge during the reflow
process is recommended.
• The package manufacturer recommends that the reflow
temperature not exceed 220°C and the time above liquidus
be less than 75 seconds. Make sure the preheat ramp is
3°C/second or lower. The actual temperature profile
depends on the board’s density and should be determined
by the assembly house.
0.50
2× VIAS, 0.250∅
35µm PLATING
3.36
0.901.80
2.36
1.90
1.40
0.30
0.73
04873-027
Figure 27. 3 mm × 3 mm LFCSP Pad Pattern
(Dimensions in millimeters)
Table 7. Variables Description
Variable
Name Description
VXThe voltage on Pin X.
VRS The regulation setpoint for the voltage across the
sense resistor (RS).
VBAT, EOC The battery voltage at the point charging current is
1/10 the current setpoint.
IMAX The charge current corresponding to VRS,
including the effects of ADJ pin voltage.
C rate The charge current (mA) expressed as a multiple of
the nominal battery capacity (mAh). A 900 mAh
capacity battery, charged at a 1/10 C rate, is
equivalent to a 90 mA charge current.
ADP2291
Rev. A | Page 17 of 20
OUTLINE DIMENSIONS
1
0.50
BSC
0.60 MAX PIN 1
INDICATO
R
1.50
REF
0.50
0.40
0.30
2.75
BSC SQ
TOP
VIEW
12° MAX 0.70 MAX
0.65 TYP
SEATING
PLANE
PIN 1
INDICATOR
0.90 MAX
0.85 NOM
0.30
0.23
0.18
0.05 MAX
0.01 NOM
0.20 REF
1.89
1.74
1.59
4
1.60
1.45
1.30
3.00
BSC SQ
5
8
Figure 28. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm x 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.60
0.40
8°
0°
4
8
1
5
PIN 1 0.65 BSC
SEATING
PLANE
0.38
0.22
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.08
3.20
3.00
2.80
5.15
4.90
4.65
0.15
0.00
0.95
0.85
0.75
Figure 29. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADP2291ARMZ-R71−40°C to +85°C 8-Lead MSOP RM-8 P08
ADP2291ACPZ-R71 −40°C to +85°C 8-Lead LFCSP_VD CP-8-2 P08
ADP2291-EVAL Evaluation Board
1 Z = Pb-free part.
ADP2291
Rev. A | Page 18 of 20
NOTES
ADP2291
Rev. A | Page 19 of 20
NOTES
ADP2291
Rev. A | Page 20 of 20
NOTES
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04873-0-11/05(A)
