74LCX374 Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs General Description Features The LCX374 consists of eight D-type flip-flops featuring separate D-type inputs for each flip-flop and TRI-STATEE outputs for bus-oriented applications. A buffered clock (CP) and Output Enable (OE) are common to all flip-flops. The LCX374 is designed for low-voltage (3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCX374 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. Y Y Y Y Y Y Y Y Y Y 5V tolerant inputs and outputs 8.5 ns tPD max, 10 mA ICCQ max Power-down high impedance inputs and outputs Supports live insertion/withdrawal 2.0V - 3.6V VCC supply operation g 24 mA output drive Implements patented Quiet SeriesTM noise/EMI reduction circuitry Functionally compatible with the 74 series 374 Latch-up performance exceeds 500 mA ESD performance: Human Body Model l 2000V Machine Model l 200V Logic Symbols Connection Diagram Pin Assignment for SOIC, SSOP and TSSOP IEEE/IEC TL/F/11996-1 TL/F/11996 - 3 TL/F/11996 - 2 Pin Names D0 - D7 CP OE O0 - O7 Order Number See NS Package Number Description Data Inputs Clock Pulse Input Output Enable Input TRI-STATE Outputs SOIC JEDEC SOIC EIAJ SSOP Type II TSSOP JEDEC 74LCX374WM 74LCX374WMX 74LCX374SJ 74LCX374SJX 74LCX374MSA 74LCX374MSAX 74LCX374MTC 74LCX374MTCX M20B M20D MSA20 MTC20 TRI-STATEE is a registered trademark of National Semiconductor Corporation. Quiet SeriesTM is a trademark of National Semiconductor Corporation. C1996 National Semiconductor Corporation TL/F/11996 RRD-B30M17/Printed in U. S. A. http://www.national.com 74LCX374 Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs November 1996 Functional Description Truth Table The LCX374 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flipflops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. Inputs Outputs Dn CP OE On H L X X L L L X L L L H H L O0 Z H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Z e High Impedance L e LOW-to-HIGH Transition O0 e Previous O0 before HIGH to LOW of CP Logic Diagram TL/F/11996 - 4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. http://www.national.com 2 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Symbol Parameter Value VCC Supply Voltage b 0.5 to a 7.0 VI DC Input Voltage b 0.5 to a 7.0 VO DC Output Voltage b 0.5 to a 7.0 Conditions Units V V Output in TRI-STATE b 0.5 to VCC a 0.5 V Output in High or Low State (Note 2) V IIK DC Input Diode Current b 50 VI k GND mA IOK DC Output Diode Current b 50 a 50 VO k GND VO l VCC mA IO DC Output Source/Sink Current ICC DC Supply Current per Supply Pin IGND DC Ground Current per Ground Pin TSTG Storage Temperature g 50 mA g 100 mA g 100 mA b 65 to a 150 C Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ``Electrical Characteristics'' table are not guaranteed at the Absolute Maximum Ratings. The ``Recommended Operating Conditions'' table will define the conditions for actual device operation. Note 2: IO Absolute Maximum Rating must be observed. Recommended Operating Conditions Symbol Parameter VCC Supply Voltage Operating Data Retention VI Input Voltage VO Output Voltage HIGH or LOW State TRI-STATE IOH/IOL Output Current VCC e 3.0V - 3.6V VCC e 2.7V TA Free-Air Operating Temperature Dt/DV Input Edge Rate, VIN e 0.8V-2.0V, VCC e 3.0V Min Max Units 2.0 1.5 3.6 3.6 V 0 5.5 V 0 0 VCC 5.5 V g 24 g 12 mA b 40 85 C 0 10 ns/V DC Electrical Characteristics Symbol Parameter Conditions VCC (V) VIH HIGH Level Input Voltage 2.7 - 3.6 VIL LOW Level Input Voltage 2.7 - 3.6 VOH HIGH Level Output Voltage VOL LOW Level Output Voltage TA e b40 C to a 85 C Min Max 2.0 Units V 0.8 V IOH e b100 mA 2.7 - 3.6 VCC b 0.2 V IOH e b12 mA 2.7 2.2 V IOH e b18 mA 3.0 2.4 V IOH e b24 mA 3.0 2.2 V IOL e 100 mA 2.7 - 3.6 0.2 V IOL e 12 mA 2.7 0.4 V IOL e 16 mA 3.0 0.4 V IOL e 24 mA 3.0 0.55 V II Input Leakage Current 0 s VI s 5.5V 2.7 - 3.6 g 5.0 mA IOZ TRI-STATE Output Leakage 0 s VO s 5.5V VI e VIH or VIL 2.7 - 3.6 g 5.0 mA IOFF Power-Off Leakage Current VI or VO e 5.5V ICC Quiescent Supply Current VI e VCC or GND DICC Increase in ICC per Input 0 10 mA 2.7 - 3.6 10 mA 3.6V s VI, VO s 5.5V 2.7 - 3.6 g 10 mA VIH e VCC b 0.6V 2.7 - 3.6 500 mA 3 http://www.national.com AC Electrical Characteristics TA e b40 C to a 85 C Symbol Parameter VCC e 3.3V g 0.3V Min VCC e 2.7V Max Min Max Units fMAX Maximum Clock Frequency 150 tPHL tPLH Propagation Delay CP to On 1.5 1.5 8.5 8.5 1.5 1.5 9.5 9.5 MHz ns tPZL tPZH Output Enable Time 1.5 1.5 8.5 8.5 1.5 1.5 9.5 9.5 ns tPLZ tPHZ Output Disable Time 1.5 1.5 7.5 7.5 1.5 1.5 8.5 8.5 ns ts Setup Time 2.5 2.5 ns tH Hold Time 1.5 1.5 ns tW Pulse Width 3.3 3.3 ns tOSHL tOSLH Output to Output Skew (Note 1) 1.0 1.0 ns Note 1: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Dynamic Switching Characteristics Symbol Parameter Conditions VCC (V) TA e 25 C Units Typical VOLP Quiet Output Dynamic Peak VOL CL e 50 pF, VIH e 3.3V, VIL e 0V 3.3 0.8 V VOLV Quiet Output Dynamic Valley VOL CL e 50 pF, VIH e 3.3V, VIL e 0V 3.3 b 0.8 V Capacitance Symbol Parameter Conditions Typical Units CIN Input Capacitance VCC e Open, VI e 0V or VCC 7 pF COUT Output Capacitance VCC e 3.3V, VI e 0V or VCC 8 pF CPD Power Dissipation Capacitance VCC e 3.3V, VI e 0V or VCC, F e 10 MHz 25 pF http://www.national.com 4 74LCX374 Ordering Information The device number is used to form part of a simplified purchasing code where the package type and temperature range are defined as follows: TL/F/11996 - 5 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead (0.300x Wide) Molded Small Outline Package, JEDEC Order Number 74LCX374WM or 74LCX374WMX NS Package Number M20B 5 http://www.national.com Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead (0.300x Wide) Molded Small Outline Package, EIAJ Order Number 74LCX374SJ or 74LCX374SJX NS Package Number M20D http://www.national.com 6 Physical Dimensions All dimensions are in millimeters (Continued) 20-Lead Molded Shrink Small Outline Package, EIAJ, Type II Order Number 74LCX374MSA or 74LCX374MSAX NS Package Number MSA20 7 http://www.national.com 74LCX374 Low-Voltage Octal D Flip-Flop with 5V Tolerant Inputs and Outputs Physical Dimensions All dimensions are in millimeters (Continued) 20-Lead Thin Shrink Small Outline Package, JEDEC Order Number 74LCX374MTC or 74LCX374MTCX NS Package Number MTC20 LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. 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