EMIF02-USB01 (R) 2 LINES EMI FILTER INCLUDING ESD PROTECTION IPADTM MAIN APPLICATION ESD protection and EMI filtering for USB port. DESCRIPTION The EMIF02-USB01 is a highly integrated array designed to suppress EMI / RFI noise for USB port filtering. The EMIF02-USB01 flip-chip packaging means the package size is equal to the die size. That's why EMIF02-USB01 is a very small device. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. ) s ( ct u d o r P e t e l o COMPLIES WITH THE FOLLOWING STANDARDS : IEC61000-4-2 level 4 15kV (air discharge) 8 kV (contact discharge) on input & output pins. s b O Flip Chip package e t le o r P PIN CONFIGURATION o s b O - BENEFITS 2 lines low-pass-filter + 2 lines ESD protection High efficiency in EMI filtering Very low PCB space consuming: 2.5 mm2 Very thin package: 0.65 mm High efficiency in ESD suppression (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. c u d ) s t( 3 2 1 A B C D E TM : ASD is trademark of STMicroelectronics. January 2003 - Ed: 5 1/6 EMIF02-USB01 SCHEMATIC A3 A1 1.3K 33R C3 C1 B2 D2 (gnd pin) 33R E1 E3 c u d Fig. 2: ESD response to IEC61000-4-2 Level 4 Fig. 1: Filtering behavior EMIF02-USB01: filtering response of lines C1/C3 and E1/E3 0.00 dB -5.00 e t le -10.00 -15.00 -20.00 -35.00 -40.00 ) s ( ct -45.00 -50.00 3.0M 10.0M E1_E3 30.0M 100.0M 300.0M 1.0G 3.0G r P e Fig. 3: Capacitance versus reverse applied voltage t e l o C (pF) Fig. 4: Digital crosstalk 0.00 dB -10.00 bs 35 Vout C1_C3 Frequency/Hz u d o 40 Vin b O - -30.00 O o r P so -25.00 1.0M ) s t( -20.00 30 -30.00 -40.00 25 -50.00 -60.00 20 -70.00 15 -80.00 -90.00 10 -100.0 0 2/6 0.5 1 1.5 2 2.5 3 VR (V) 3.5 4 4.5 5 1.0M 3.0M 10.0M 30.0M 100.0M f/Hz 300.0M 1.0G 3.0G EMIF02-USB01 ABSOLUTE MAXIMUM RATINGS (Tamb = 25 C) Symbol VPP Tj Parameter and test conditions Value Unit ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge 15 8 kV Junction temperature 125 C Top Operating temperature range -40 to + 85 C Tstg Storage temperature range -55 to +150 C ELECTRICAL CHARACTERISTICS (Tamb = 25 C) Symbol Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current Symbol c u d slope: 1/Rd e t le Test conditions VBR IR = 1 mA IRM VRM = 3V Cline @ 0V R1,R2 Tolerance 5% R3 Tolerance 5% o r P e du ) s ( ct o s b O - Min. ) s t( o r P Typ. Max. 6 Unit V 0.1 0.5 A 40 45 pF 33.0 1.30 k t e l o s b O 3/6 EMIF02-USB01 APLAC MODELS Fig. 5: Aplac model of resistors R_1k3 3.8nH A3 C1 Csub Csub rsub_1k3 rsub_1k3 bulk 0.15nH cap_33R R_33R 0.23nH C3 Csub rsub_33R Csub rsub_33R cap_33R bulk 0.3nH R_33R E3 cap_33R Csub rsub_33R Csub rsub_33R bulk Fig. 6: Aplac model of the diodes A1, A3, B2, C1, C3, E1, E3 0.15nH D02_usb o r P e t e l o D02_usb bs O 4/6 c u d 0.7nH E1 c u d cap_33R e t le ) s t( o r P o s b O - Fig. 7: Aplac model of bumps & ground connections (t s) D2 Cbump Rsubump I/O bulk Lbump 100m D2 bulk Rbump D02_Nw Lhole caphole Lgnd_D Rsub_D D2 bulk Rhole EMIF02-USB01 Fig. 9: Comparison between Aplac simulations and measured frequency response. Fig. 8: Aplac model parameters aplacvar R_33R 33.9 aplacvar cap_33R 1.2pF aplacvar R_1k3 1.3k aplacvar Cz 29pF aplacvar Rsub_D 100 Model D02_Nw BV=100 IBV=1m CJO=6.8p M=0.3333 RS=2 VJ=0.6 TT=100n Model D02_usb BV=16 IBV=1m CJO=Cz M=0.3333 RS=2 VJ=0.6 TT=100n 0.00 dB -5.00 -10.00 -15.00 -20.00 aplacvar Csub0.3pF aplacvar Rsub_33R 15 aplacvar Rsub_1k3 50 simulation -25.00 -30.00 aplacvar lhole 10pH aplacvar Rhole 400m aplacvar Caphole0.4pF aplacvar Lgnd Lgnd_D 150pH -35.00 -40.00 measure -45.00 -50.00 aplacvar Lbump 50pH aplacvar Rbump 50m aplacvar Cbump 1.5pF aplacvar Rsubump 150 1.0M 3.0M 10.0M 30.0M 100.0M f/Hz Aplac: C1/C3 300.0M ORDER CODE EMIF 02 - Electro Magnetic Interference Filter ) s ( ct u d o 700 50 c u d 01 o r P ) s t( Version 315 50 650m 65 m 5 49 r P e e t le 3.0G o s b USB port fonction O - Nb of lines PACKAGE MECHANICAL DATA USB 1.0G Meas: C1_C3_symm 50 1.97mm 50m t e l o 49 5 m 50 s b O 1.27mm 50m 5/6 EMIF02-USB01 MARKING PACKING 365 240 365 Dot identifying Pin A1 location* 1.5 +/- 0.1 4 +/- 0.1 (R) 1.75 +/- 0.1 3.5 +/- 0.1 ST xxx yww ST xxx yww 220 ST F F T y ww xxx yww 8 +/- 0.3 40 4 +/- 0.1 All dimensions in mm User direction of unreeling All dimensions in m c u d OTHER INFORMATION o r P ) s t( Ordering code Marking Package Weight Base qty Delivery mode EMIF02-USB01 FFT Flip Chip 3.35 mg 5000 Tape & reel (7") e t le o s b O - Note: More packing informations are available in the application note AN1235: ''Flip-Chip CSP: Package description and recommandations for use'' ) s ( ct u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in Italy - All rights reserved. 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