March 1999
FDV301N
Digital FET , N-Channel
General Description Features
Absolute Maximum Ratings TA = 25oC unless other wise noted
Symbol Parameter FDV301NUnits
VDSS, VCC Drain-Source Voltage, Power Supply Voltage 25 V
VGSS, VIGate-Source Voltage, VIN 8V
ID, IO Drain/Output Current - Continuous 0.22 A
0.5
PDMaximum Power Dissipation 0.35 W
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
ESD Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm) 6.0 kV
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient 357 °C/W
FDV301N Rev.F
25 V, 0.22 A continuous, 0.5 A Peak.
RDS(ON) = 5 Ω @ VGS= 2.7 V
RDS(ON) = 4 Ω @ VGS= 4.5 V.
Very low level gate drive requirements allowing direct
operation in 3V circuits. VGS(th) < 1.5V.
Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
Replace multiple NPN digital transistors with one DMOS
FET.
This N-Channel logic level enhancement mode field effect
transistor is produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance. This
device has been designed especially for low voltage
applications as a replacement for digital transistors. Since
bias resistors are not required, this one N-channel FET can
replace several different digital transistors, with different bias
resistor values.
Mark:301
SOT-23 SuperSOTTM-8 SOIC-16
SO-8 SOT-223
SuperSOTTM-6
D
GS
D
SG
IN
GND
Vcc
INVERTER APPLICATION
OUT
© 1999 Fairchild Semiconductor Corporation
Inverter Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units
IO (off) Zero Input Voltage Output Current VCC = 20 V, VI = 0 V 1µA
VI (off) Input Voltage VCC = 5 V, IO = 10 µA0.5 V
VI (on) VO = 0.3 V, IO = 0.005 A 1V
RO (on) Output to Ground Resistance VI = 2.7 V, IO = 0.2 A4 5 Ω
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 25 V
∆BVDSS/∆TJBreakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 o C25 mV / oC
IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V 1µA
TJ = 55°C 10 µA
IGSS Gate - Body Leakage Current VGS = 8 V, VDS= 0 V 100 nA
ON CHARACTERISTICS (Note)
∆VGS(th)/∆TJGate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 o C-2.1 mV / oC
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA0.65 0.85 1.5 V
RDS(ON) Static Drain-Source On-Resistance VGS = 2.7 V, ID = 0.2 A 3.8 5Ω
TJ =125°C 6.3 9
VGS = 4.5 V, ID = 0.4 A 3.1 4
ID(ON) On-State Drain Current VGS = 2.7 V, VDS = 5 V 0.2 A
gFS Forward Transconductance VDS = 5 V, ID= 0.4 A 0.2 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 10 V, VGS = 0 V,
f = 1.0 MHz 9.5 pF
Coss Output Capacitance 6 pF
Crss Reverse Transfer Capacitance 1.3 pF
SWITCHING CHARACTERISTICS (Note)
tD(on)Turn - On Delay Time VDD = 6 V, ID = 0.5 A,
VGS = 4.5 V, RGEN = 50 Ω3.2 8ns
trTurn - On Rise Time 6 15 ns
tD(off) Turn - Off Delay Time 3.5 8ns
tfTurn - Off Fall Time 3.5 8ns
QgTotal Gate Charge VDS = 5 V, ID = 0.2 A,
VGS = 4.5 V 0.49 0.7 nC
Qgs Gate-Source Charge 0.22 nC
Qgd Gate-Drain Charge 0.07 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
ISMaximum Continuous Drain-Source Diode Forward Current 0.29 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.29 A (Note)0.8 1.2 V
Note:
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDV301N Rev.F
FDV301N Rev.F
0 0.5 1 1.5 2 2.5 3
0
0.1
0.2
0.3
0.4
0.5
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
3.5
2.7
2.5
V = 4.5V
GS 4.0
2.0
1.5
DS
D
3.0
0 0.1 0.2 0.3 0.4 0.5
0.6
0.8
1
1.2
1.4
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 2.0V
GS
2.7
3.0
4.04.5
D
3.5
2.5
R DS(on ), NORMALIZED
Typical Electrical Characteristics
Figure 1. On-Region Characteristics.Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
-50 -25 0 25 50 75 100 125 150
0.6
0.8
1
1.2
1.4
1.6
1.8
T , JUNCTION TEMPERATURE (°C)
DRAIN-SOURCE ON-RESISTANCE
J
V = 2.7 V
GS
I = 0.2A
D
R , NORMALIZED
DS(ON)
Figure 3. On-Resistance Variation
with Temperature.
0.5 1 1.5 2 2.5
0
0.05
0.1
0.15
0.2
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
25°C
125°C
V = 5.0V
DS
GS
D
T = -55°C
J
Figure 5. Transfer Characteristics.
0.2 0.4 0.6 0.8 11.2
0.0001
0.001
0.01
0.1
0.2
0.5
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
T = 125°C
J
25°C
-55°C
V = 0V
GS
SD
S
Figure 6. Body Diode Forward Voltage
Variation with Source Current and Temperature.
Figure 4. On Resistance Variation with
Gate-To-Source Voltage.
22.5 33.5 4
0
3
6
9
12
15
V , GATE TO SOURCE VOLTAGE (V)
GS
R , ON-RESISTANCE (OHM)
DS(on)
125°C
25°C
I = 0.2A
D
FDV301N Rev.F
00.1 0.2 0.3 0.4 0.5 0.6
0
1
2
3
4
5
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 0.2A
D
15V
V = 5V
DS 10V
0.5 1 2 5 10 15 25 35
0.01
0.02
0.05
0.1
0.2
0.5
1
V , DRAI N-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
DS
D
DC
1s
100ms
10s
1ms
RDS(ON) LIMIT
V = 2.7V
SINGLE PULSE
R = 357 °C/W
T = 25°C
GS
A
θJA
0.001 0.01 0.1 1 10 100 300
0
1
2
3
4
5
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =357° C/W
T = 25°C
θJA
A
Figure 10. Single Pulse Maximum Power
Dissipation.
Figure 11. Transient Thermal Response Curve.
0.1 0.5 1 2 5 10 25
1
2
3
5
10
20
30
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C
iss
f = 1 MHz
V = 0V
GS
C
oss
C
rss
Figure 8. Capacitance Characteristics.
Figure 7. Gate Charge Characteristics.
Figure 9. Maximum Safe Operating Area.
Typical Electrical And Thermal Characteristics
0.0001 0.001 0.01 0.1 1 10 100 300
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
TRANSIENT THERMAL RESISTANCE
Duty Cycle, D = t /t
1 2
R (t) = r(t) * R
R = 357 °C/W
θJA
θJA
θJA
T - T = P * R (t)
θJAA
J
P(pk)
t
1 t
2
r(t), NORMALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
TRADEMARKS
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Definition of Terms
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Advance Information
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Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
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changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
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