1ED44176N01F Single-channel low-side gate driver IC with over-current protection Features Potential applications * * * * * * * * * * * * * * * * * Over-current detection with positive voltage input 0.5 V over-current threshold with accurate 5% tolerance Single pin for fault output and enable Programmable fault clear time Under voltage lockout CMOS Schmitt-triggered inputs 3.3 V, 5 V and 15 V input logic compatible Output in phase with input Separate logic and power ground 2 kV ESD HBM RoHS compliant Evaluation board available: EVAL-1ED44176N01F Digitally controlled PFC Air conditioner Home appliances Industrial applications General purpose low-side gate driver for single-ended topologies Description The 1ED44176N01F is a low-voltage, power MOSFET and IGBT non-inverting gate driver. Proprietary latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output. The output driver features a current buffer stage. The 1ED44176N01F has OCP pin for over current protection sense and a FAULT status output (Once it is active, EN/FLT pin is internally pulled down.). There is a dedicated pin (FLTC) to program fault clear time. The EN/FLT needs to be outside pulled up to provide normal operation, pulling EN/FLT low disable the driver. Internal circuitry on VCC pin provides an under voltage lockout protection that holds output low until Vcc supply voltage is within operating range. Vout Vin VCC 1ED44176N01F Vdd I/O1 IN VCC I/O2 EN/FLT VSS FLTC OUT OCP COM C Gnd Figure 1 (Refer to lead assignments for correct pin configuration). This diagram show electrical connections only. Please refer to our application notes and design tips for proper circuit board layout. Typical application Ordering information Product type 1ED44176N01F Package PG-DSO-8 Standard pack Form Orderable part number Quantity Tape and Reel 2500 1ED44176N01FXUMA1 Product validation Qualified for industrial applications according to the relevant tests of JEDEC JESD47/22 and J-STD-020. Datasheet Please read the Important Notice and Warnings at the end of this document www.infineon.com/gdLowSide 1 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Table of content Table of contents Features ........................................................................................................................................ 1 Table of contents ............................................................................................................................ 2 1 Block diagram........................................................................................................................ 3 2 2.1 2.2 Pin configuration and functionality .......................................................................................... 4 Pin configuration ..................................................................................................................................... 4 Input/output logic truth table ................................................................................................................ 5 3 Qualification information........................................................................................................ 6 4 4.1 4.2 4.3 4.4 Electrical parameters ............................................................................................................. 7 Absolute maximum ratings ..................................................................................................................... 7 Recommended operating conditions..................................................................................................... 7 Static electrical characteristics .............................................................................................................. 8 Dynamic electrical characteristics.......................................................................................................... 8 5 5.1 5.2 5.3 5.4 5.5 5.6 5.7 Application information and additional details.......................................................................... 9 IGBT/MOSFET gate driver........................................................................................................................ 9 Switching and timing relationships........................................................................................................ 9 Input logic compatibility ....................................................................................................................... 10 Undervoltage lockout (Vcc) .................................................................................................................. 10 Over current protection (OCP) .............................................................................................................. 11 Fault reporting and programmable fault clear timer .......................................................................... 13 Enable input .......................................................................................................................................... 14 6 Package outline .................................................................................................................... 15 7 Tape and reel details: PG-DSO8 ............................................................................................... 16 8 Part marking information ...................................................................................................... 17 9 Similar products ................................................................................................................... 18 10 Related documents ............................................................................................................... 18 Revision history............................................................................................................................. 19 Datasheet www.infineon.com/gdLowSide 2 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Block diagram 1 Block diagram IN PWM disable logic 4 VSS/COM level shift VOCT H 1 5 VCC 7 OUT 8 COM 3 EN/FLT 2 FLTC OCP OCP 1 S BLK UVLO Q QFLT R VFLTCTH UVLO & Filter VSS Figure 2 IFLTC 6 Block diagram Datasheet www.infineon.com/gdLowSide 3 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Pin configuration and functionality 2 Pin configuration and functionality 2.1 Pin configuration Table 1 Pin configuration Pin no. Name Function 1 OCP Current sense input 2 FLTC 3 EN/FLT 4 IN Fault clear time program input Enable and fault reporting pin, two functions: 1. Logic input to enable I/O functionality. I/O logic functions when ENABLE is high and enable function is not latched. 2. Fault reporting function like over-current or undervoltage lockout, this pin has negative logic and an open-drain output. Logic input for gate driver output (OUT), in phase 5 6 VCC VSS Supply voltage Logic ground 7 OUT Gate drive output 8 COM Gate drive return 1 OCP COM 8 2 FLTC OUT 7 VSS 6 VCC 5 3 EN/FLT 4 Figure 3 IN PG-DSO-8-70 (top view) Datasheet www.infineon.com/gdLowSide 4 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Pin configuration and functionality 2.2 Input/output logic truth table Table 2 Input/output logic truth table IN UVLO 1) OCP 2) L H H H L L / H H X L X L L X H H L L X H X L L 1) 2) 3) 3) OUT Note L H OUT = L OUT = H OUT = L, EN/FLT = L, (UVLO protection will disable I/O logic until EN/FLT returns to high level.) OUT = L, EN/FLT = L, (Over current protection will disable I/O logic until EN/FLT returns to high level.) OUT = L (Externally pull down EN/FLT pin will disable I/O logic until EN/FLT returns to high level.) UVLO "L" state is under-voltage protection. OCP "H" state is over-current protection. EN/FLT "H" state is EN/FLT pin externally pulling up and internally pull down MOSFET (QFLT) is off. (See block diagram.) Datasheet www.infineon.com/gdLowSide 5 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Qualification information 3 Qualification information Qualification level Moisture sensitivity level Charged device model ESD Human body model IC latch-up test RoHS compliant 1) 2) Industrial 1) Comments: This family of ICs has passed JEDEC's Industrial qualification. Consumer qualification level is granted by extension of the higher Industrial level. MSL3 2) 260C (per JEDEC standard J-STD-020) 1000 V (Class C3) (per ANSI/ESDA/JEDEC standard JS-002) Class 2 (per ANSI/ESDA/JEDEC standard JS-001) Class II, Level A (per JESD78) Yes Higher qualification ratings may be available should the user have such requirements. Please contact your Infineon sales representative for further information. Higher MSL ratings may be available for the specific package types listed here. Please contact your Infineon sales representative for further information. Datasheet www.infineon.com/gdLowSide 6 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Electrical parameters 4 Electrical parameters 4.1 Absolute maximum ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. The device may not function or not be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. All voltage parameters are absolute voltages referenced to VSS. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Table 3 Symbol VCC VO VOCP VEN/FLT VFLTC VIN COM PD RthJA TJ TS TL 4.2 Absolute maximum ratings Definition Fixed supply voltage Output voltage (OUT) Voltage at current sense pin (OCP) Voltage at enable and fault reporting pin (EN/FLT) Voltage at fault clear time program pin ( FLTC) Logic input voltage ( IN ) Driver return voltage Package power dissipation @ TA 25C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) PG-DSO-8 Min Max - 0.5 COM - 0.5 - 0.5 - 0.5 - 0.5 - 0.5 -5 -- -- - 40 - 55 -- 25 VCC + 0.5 VCC +0.5 VCC + 0.5 VCC + 0.5 VCC + 0.5 VCC + 0.5 0.625 200 150 150 300 Units V W C/W C Recommended operating conditions For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to VSS unless otherwise stated in the table. Table 4 Symbol VCC VO VOCP VEN/FLT VFLTC VIN COM TA Recommended operating conditions Definition Min Max Fixed supply voltage Output voltage Voltage at current sense pin (OCP) Voltage at enable and fault reporting pin (EN/FLT) Voltage at fault clear time program pin ( FLTC) Logic input voltage ( IN ) Logic ground with respect to VSS Ambient temperature 12.7 COM 0 0 0 0 -5 - 40 20 VCC VCC VCC VCC VCC +5 125 Datasheet www.infineon.com/gdLowSide 7 of 20 Units V C V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Electrical parameters 4.3 Static electrical characteristics VCC = 15 V, VSS=COM, TA = 25C unless otherwise specified. The VIN, VEN, VFLTCTH, VOCTH, IIN, I FLT , and IFLTC parameters are referenced to VSS and are applicable to input leads: IN,EN/FLT, FLTC and OCP. The VO and IO parameters are referenced to COM and are applicable to the output lead: OUT. Table 5 Static electrical characteristics Symbol Definition Min Typ Max Vcc supply undervoltage positive going threshold Vcc supply undervoltage negative going threshold Vcc supply undervoltage lockout hysteresis Logic "0" input voltage (OUT = LO) Logic "1" input voltage (OUT = HI) Logic "0" disable voltage Logic "1" enable voltage Fault clear threshold Voltage High level output voltage, VCC -VOUT Low level output voltage, VOUT Current limit threshold voltage Logic "1" input bias current IN pin Logic "0" input bias current IN pin Quiescent VCC supply current 11.2 10.7 -- 0.8 1.7 0.8 1.7 2.4 -- -- 475 35 -5 -- 11.9 11.4 0.5 1 2.1 1 2.1 2.7 0.05 0.02 500 50 -- -- 12.7 12.2 -- 1.2 2.5 1.2 2.5 3 0.2 0.1 525 70 -- 750 IO+ Output sourcing short circuit pulsed current 0.56 0.8 -- IO- Output sinking short circuit pulsed current 1.23 1.75 -- EN/FLT pull down sinking current 20 -40 -- -25 -- -15 VCCUV+ VCCUVVCCUVH VINL VINH VENL VENH VFLTCTH VOH VOL VOCTH IIN+ IINIQCC Units Test Conditions V IO = 2 mA IO = 2 mA mV A A IFLT IFLTC 4.4 Fault clear sourcing current mA A VIN = 5 V VIN = 0 V VIN = 0 V or 5 V VO = 0 V PW 10 s VO = 15 V PW 10 s VEN/FLT = 0.4 V VFLTC = 0 V Dynamic electrical characteristics VCC = 15 V, TA = 25C, and CL = 1000 pF unless otherwise specified. Table 6 Dynamic electrical characteristics Symbol Definition ton toff tr tf tEN tDISA tOCPDEL tOCPFLT tFLTC tBLK tvCCUV Min Typ Max Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Enable propagation delay Disable propagation delay Over current protection propagation delay -- -- -- -- -- -- -- 50 50 50 25 50 50 380 95 95 80 35 95 95 470 OCP to low level EN/FLT signal delay -- 350 440 FAULT clear time 75 110 180 s Over current protection blanking time 100 180 250 ns -- 2 -- s VCC supply UVLO filter time Datasheet www.infineon.com/gdLowSide 8 of 20 Units Test Conditions Figure 6 VIN pulse = 5 V ns Figure 14 VEN pulse = 5 V Figure 10 Figure 11 REN =10k to Vcc VOCP pulse = 1 V Figure 10 Figure 11 CFLTC =1nF to VSS Figure 11 RFLT =0, CFLT = NC VOCP pulse = 1V Figure 8 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Application information and additional details 5 Application information and additional details Information regarding the following topics is included as subsections within this section of the datasheet. * IGBT/MOSFET gate driver * Switching and timing relationships * Input logic compatibility * Undervoltage lockout protection * Over current protection (OCP) * Fault reporting and programmable fault clear timer * Enable input See the 1ED44176N01F application note AN2018-03 Low - Side Driver with Over Current Protection and Fault/Enable for interface circuit examples and recommended layout guidelines. 5.1 IGBT/MOSFET gate driver The 1ED44176N01F is designed to drive MOSFET or IGBT power devices. Figure 4 and Figure 5 illustrate several parameters associated with the gate driver functionality of the driver. The output current of the driver, used to drive the gate of the power switch, is defined as IO. The voltage that drives the gate of the external power switch is defined as VOUT. Figure 4 Gate output sourcing current Figure 5 5.2 Switching and timing relationships Gate output sinking current The relationships between the input and output signals of the 1ED44176N01F are illustrated below in Figure 6. From the figure, we can see the definitions of several timing parameters (i.e. ton, toff, tr, and tf) associated with this device. 50% 50% IN ton tr toff 90% OUT Figure 6 tf 90% 10% 10% Switching time waveforms Datasheet www.infineon.com/gdLowSide 9 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Application information and additional details 5.3 Input logic compatibility The input of this IC is compatible with standard CMOS and TTL outputs. The 1ED44176N01F has been designed to be compatible with 3.3 V, 5 V and 15 V logic-level signals. The input high threshold (VINH) is typ. 2.1 V and low threshold (VINL) is typ. 1 V. Input hysteresis offers enhanced noise immunity. The 1ED44176N01F includes an important feature: wherein, whenever the input pin is in a floating condition, the output is held in the low state. This is achieved using GND pull-down resistors on the input pin. Figure 7 illustrates an input signal to the 1ED44176N01F, its input threshold values, and the logic state of the IC as a result of the input signal. Figure 7 5.4 IN input thresholds Undervoltage lockout (Vcc) The 1ED44176N01F has an internal UVLO protection feature on the VCC pin supply circuit blocks.Upon power-up, if the VCC voltage fails to reach the VCCUV+ threshold, the driver cannot turn on. Additionally, if the VCC voltage decreases below the VCCUV- threshold and the VCC bias voltage remains lower than the VCCUV- threshold exceeding UVLO filter time (tVCCUV) during operation, the undervoltage lockout circuitry will recognize a fault condition and shut-down the drive output. The EN/FLT will then transit to the low state to inform the controller of the fault condition, regardless of the status of the IN input pin. The tVCCUV about 2s helps to suppress noise from the UVLO circuit, so that negative-going voltage spikes at the supply pin will avoid parasitic UVLO events. When VCC is higher than VCCUV+ and longer than tFLTC, EN/FLT becomes high and the OUT will follow the input signal IN. (Figure 8 shows the UVLO time is shorter than tFLTC.) VCC VCCUV+ VCCUV- IN tVCCUV OUT VFLTCTH FLTC EN/FLT Figure 8 tFLTC Vcc under voltage protection waveform definitions one Datasheet www.infineon.com/gdLowSide 10 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Application information and additional details Once EN/FLT enters UVLO mode, EN/FLT keeps low until tFLTC is over and VCC supply voltage higher than VCCUV+. (Figure 9 shows the UVLO time is longer than tFLTC.) VCC VCCUV+ VCCUV- IN tVCCUV OUT VFLTCTH FLTC EN/FLT Figure 9 5.5 tFLTC Vcc under voltage protection waveform definitions two Over current protection (OCP) The 1ED44176N01F has a function of over current protection with a threshold VOCTH at the OCP pin. The voltage at this pin is the voltage across the current sense resistor. To avoid false tripping due to the fast high current switch on transient that occurs at the switch on of MOSFET or IGBT resulting from the circuit parasitic capacitors, there is blanking interval which disables over current detection for the period of tBLK. (An additional RC filter is recommended, if the internal tBLK is not sufficient to suppress the noise.) After tBLK and the voltage of OCP pin is over VOCTH, the 1ED44176N01F causes fault logic to initiate a fault shutdown sequence. This sequence starts with the generation of a fault signal. The internal MOSFET QFLT is turned on and EN/FLT pin is pulled down. At the same time the 1ED44176N01F terminates the present cycle, and the gate output is immediately pulled down with internal propagation delay (tOCPDEL), see the Figure 10 and Figure 11. Figure 10 is the diagram of 1ED44176N01F in Boost application. And Figure 11 is the typical waveforms of the application. If EN/FLT pin enters over current protection mode, EN/FLT pin keeps low until fault clear time is over and OCP terminal voltage lower than over current threshold voltage. Figure 11 shows the OCP time is shorter than tFLTC. Figure 12 shows the OCP time is longer than tFLTC. Datasheet www.infineon.com/gdLowSide 11 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Application information and additional details Note: If OCP fault condition is removed and the time is longer than fault clear time (tFLTC), the internal pull down MOSFET QFLT of EN/FLT is released and EN/FLT will be pull up again with Vdd, then the OUT will follow the input signal IN. Vout Vin VCC Vdd 1ED44176N01F I/O1 IN I/O2 EN/FLT VSS FLTC OUT OCP COM C CFLTC Gnd Figure 10 CFLT VCC RFLT 1ED44176N01F in Boost application IN 50% OUT tOCPDEL Pulse < tBLK VOCTH OCP tOCPFLT EN/FLT QFLT off 50% QFLT on tFLTC VFLTCTH FLTC Figure 11 OCP fault detection and fault clear waveforms one Datasheet www.infineon.com/gdLowSide 12 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Application information and additional details IN 50% OUT tOCPDEL Pulse < tBLK VOCTH OCP tOCPFLT EN/FLT QFLT off 50% QFLT on tFLTC VFLTCTH FLTC Figure 12 5.6 OCP fault detection and fault clear waveforms two Fault reporting and programmable fault clear timer The 1ED44176N01F provides a dedicated fault reporting output pin (EN/FLT ) and a programmable fault clear time pin (FLTC). There are two situations which would cause the driver to report a fault via the EN/FLT pin. The first is an under voltage condition of VCC and the second is if the OCP pin recognizes a fault. Once the fault condition occurs, the EN/FLT pin is internally pulled down to VSS. The EN/FLT output stays in the low state until the fault condition has been removed and the fault clear timer expires; once the fault clear timer expires, the voltage on the EN/FLT pin will return to its external pull-up voltage. The length of the fault clear time period (tFLTC) is programmed by external capacitor which connected between FLTC and VSS (CFLTC). See Figure 10. The length of the fault clear time period can be determined by using the equation below. tFLTC= CFLTC*VFLTCTH/ IFLTC Note: If the OCP last time is longer than tFLTC, the EN/FLT output keeps low until the OCP input voltage lower than OCP threshold voltage. See Figure 12. Datasheet www.infineon.com/gdLowSide 13 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Application information and additional details 5.7 Enable input 1ED44176N01F provides an enable functionality that allows to shutdown or to enable the output. When EN/FLT is pulled up (the enable voltage is higher than VENH) the output is able to operate normally, pulling EN/FLT low (the enable voltage is lower than VENL) the output is disable. The enable function is not latched. The relationships between the input, output and enable signals of the 1ED44176N01F are illustrated below in Figure 13 - Figure 15. From these figures, we can see the definitions of several timing parameters and threshold voltages (i.e. tDISA, tEN, VENH and VENL) associated with this device. High IN IN VEN 50% 50% EN/FLT OUT tDISA tEN 90% OUT 10% Figure 13 Figure 15 Input/output/enable pins timing diagram Figure 14 EN pin switching time waveform EN input thresholds Datasheet www.infineon.com/gdLowSide 14 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Package outline 6 Figure 16 Package outline Package outline Datasheet www.infineon.com/gdLowSide 15 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Tape and reel details: PG-DSO8 7 Tape and reel details: PG-DSO8 LOADED TAPE FEED DIRECTION A B H D F C NOTE : CONTROLLING DIMENSION IN MM E G CARRIER TAPE DIMENSION FOR 8SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 11.70 12.30 0.46 0.484 D 5.45 5.55 0.214 0.218 E 6.30 6.50 0.248 0.255 F 5.10 5.30 0.200 0.208 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062 F D C B A E G H REEL DIMENSIONS FOR 8SOICN Metric Code Min Max A 329.60 330.25 B 20.95 21.45 C 12.80 13.20 D 1.95 2.45 E 98.00 102.00 F n/a 18.40 G 14.50 17.10 H 12.40 14.40 Figure 17 Imperial Min Max 12.976 13.001 0.824 0.844 0.503 0.519 0.767 0.096 3.858 4.015 n/a 0.724 0.570 0.673 0.488 0.566 Tape and reel details Datasheet www.infineon.com/gdLowSide 16 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Part marking information 8 Part marking information Front Side Part number 1D44176 Infineon logo H YYWW Pin 1 identifier Date code (may vary) Back Side XXX Lot code XXXX XXXX X Figure 18 Assembly site code Part marking information Datasheet www.infineon.com/gdLowSide 17 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Similar products 9 Similar products Channels Typ. gate Part drive number (Io+/Io-) Max UVLO supply (on/off) voltage Typ. prop. delay (on/off) V V ns IR44252L 20 5 / 4.15 50 / 50 IRS44273L 25 10.2 / 9.2 50 / 50 IR44273L 20 5 / 4.15 50 / 50 IR44272L 20 5 / 4.15 50 / 50 IRS4426S 25 50 / 50 Dual inverting channels SOIC-8L IRS44262S 20 10.2 / 9.2 50 / 50 Dual inverting channels SOIC-8L IRS4427S 25 50 / 50 Dual non-inverting channels SOIC-8L IRS4428S 25 50 / 50 Single inverting channel Single non-inverting channel SOIC-8L A 0.3 / 0.5 1 1.5 / 1.5 2 10 Logic Single non-inverting channel Dual OUT pins Single non-inverting channel Dual OUT pins Single non-inverting channel Dual OUT pins Single non-inverting channel ENABLE Package options SOT23-5L SOT23-5L SOT23-5L SOT23-5L 2.3 / 3.3 Related documents 1. AN2018-03 Low - Side Driver with Over Current Protection and Fault/Enable 2. AN2018-11 1ED44176N01F evaluation board Datasheet www.infineon.com/gdLowSide 18 of 20 V 2.1 2019-06-13 1ED44176N01F Single-channel low-side gate driver IC with over-current protection and fault/enable Revision history Revision history Document version 2.0 2.1 Date of release Description of changes 2018-06-27 2019-06-13 Create the document V 2.0 Optimize parameter in table 6 Datasheet www.infineon.com/gdLowSide 19 of 20 V 2.1 2019-06-13 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2019-06-13 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2019 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Email: erratum@infineon.com Document reference Z8F62869814 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie") . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. 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